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    • 2. 发明公开
    • 박막 트랜지스터 및 그 제조 방법
    • 薄膜晶体管及其制备方法可以缩短加氢氢化扩散距离
    • KR1020040081344A
    • 2004-09-21
    • KR1020040016407
    • 2004-03-11
    • 엔엘티 테크놀로지 가부시키가이샤
    • 타나카히로아키
    • H01L29/786
    • H01L29/66757H01L29/4908H01L29/78675Y10S438/91Y10S438/958
    • PURPOSE: A thin film transistor is provided to shorten a diffusion distance of hydrogen by forming a hydrogen supply layer for diffusing hydrogen to an interface between a polycrystalline silicon thin film and a gate insulation layer in a position between the gate insulation layer and a gate electrode. CONSTITUTION: A polycrystalline silicon thin film(3) has a source region(4) and a drain region(5). A gate electrode(9) is formed on the polycrystalline silicon thin film by interposing a gate insulation layer(7). A hydrogen supply layer(8) is formed between the gate insulation layer and the gate electrode to supply hydrogen to an interface between the polycrystalline silicon thin film and the gate insulation layer.
    • 目的:提供一种薄膜晶体管,通过在栅极绝缘层和栅电极之间的位置形成用于将氢扩散到多晶硅薄膜和栅极绝缘层之间的界面的氢供应层来缩短氢的扩散距离 。 构成:多晶硅薄膜(3)具有源极区(4)和漏极区(5)。 通过设置栅极绝缘层(7),在多晶硅薄膜上形成栅电极(9)。 在栅极绝缘层和栅电极之间形成氢供给层(8),以向多晶硅薄膜和栅绝缘层之间的界面供给氢。
    • 3. 发明授权
    • 능동 매트릭스 기판 제조 방법
    • 능동매트릭스기판제조방법
    • KR100441295B1
    • 2004-07-23
    • KR1020010041132
    • 2001-07-10
    • 엔엘티 테크놀로지 가부시키가이샤
    • 하야세타카스케타나카히로아키키도슈사쿠하라노토시히코
    • G02F1/136
    • H01L29/66765G02F1/136204G02F1/1368H01L27/12H01L29/41733H01L29/458H01L29/78633
    • The photolithography processes for connecting the first conductive film pattern, which is a lower layer such as a gate electrode of a TFT, to a second conductive film pattern, which is an upper layer such as a source/drain electrode of a TFT are reduced by utilizing laminated films and a resist pattern formed thereon having different film thicknesses. Laminated films constituting the source/drain electrode are formed by depositing films on an insulating substrate on which the first conductive film pattern is formed, and the resist pattern is formed on the top layer of the laminated films, and then utilizing the film thickness difference of the resist pattern and the film composition of the laminated films, the short circuited wiring between the gate electrode and the source/drain electrode for an Electro-Static-Discharge protection circuit of the active matrix substrate can be formed by less photolithography processes than that in the manufacturing of the conventional active matrix substrate.
    • 用于将诸如TFT的栅极电极之类的下层的第一导电膜图案连接至诸如TFT的源极/漏极电极之类的上层的第二导电膜图案的光刻工艺被减少 利用具有不同膜厚度的层压膜和形成在其上的抗蚀剂图案。 通过在形成有第一导电膜图案的绝缘基板上沉积膜形成构成源极/漏极电极的层压膜,并且在层压膜的顶层上形成抗蚀剂图案,然后利用膜厚度差 抗蚀剂图案和层压膜的膜组成,用于有源矩阵基板的静电放电保护电路的栅极电极和源极/漏极电极之间的短路布线可以通过较少的光刻工艺形成, 常规有源矩阵基板的制造。
    • 7. 发明公开
    • 능동 매트릭스 기판 제조 방법
    • 制作有源矩阵板的方法
    • KR1020020006450A
    • 2002-01-19
    • KR1020010041132
    • 2001-07-10
    • 엔엘티 테크놀로지 가부시키가이샤
    • 하야세타카스케타나카히로아키키도슈사쿠하라노토시히코
    • G02F1/136
    • H01L29/66765G02F1/136204G02F1/1368H01L27/12H01L29/41733H01L29/458H01L29/78633
    • PURPOSE: To enable an active matrix board mounted with an electrostatic protective circuit to be manufactured in four photolithography processes. CONSTITUTION: A method of forming a TFT on an insulating board comprises a first process of laminating material films that form the TFT on the insulating board, a second process of forming a resist pattern having regions (an opening, a first resist mask 15, and a second resist mask) different from each other in thicknesses on the uppermost layer of the laminated material films by patterning, and a third process of processing some material films out of the laminated material films, using the resist pattern as an etching mask. By this method, a photolithography process for connecting a lower first conductive layer such as the gate electrode of the TFT and an upper second conductive layer such as the diameter.drain electrode of the TFT together can be shortened.
    • 目的:使得安装有静电保护电路的有源矩阵板可以在四个光刻工艺中制造。 构成:在绝缘板上形成TFT的方法包括:在绝缘板上层叠形成TFT的材料膜的第一工艺,形成具有区域(开口,第一抗蚀剂掩模15和 第二抗蚀剂掩模),并且通过图案化在层压材料膜的最上层上的厚度彼此不同,以及使用抗蚀剂图案作为蚀刻掩模来处理层压材料膜中的一些材料膜的第三种处理。 通过该方法,可以缩短用于将诸如TFT的栅电极的下部第一导电层和诸如TFT的直径电极的上部第二导电层连接在一起的光刻工艺。
    • 9. 发明公开
    • 박막 트랜지스터 회로 장치 및 상기 박막 트랜지스터 회로 장치를 이용한 액정 표시 장치
    • 薄膜晶体管电路装置及其制造方法,以及使用薄膜晶体管电路装置的液晶显示装置,特别是关于提高莫尔氏合金在空气中的耐腐蚀性
    • KR1020050011725A
    • 2005-01-29
    • KR1020040057114
    • 2004-07-22
    • 엔엘티 테크놀로지 가부시키가이샤
    • 타나카히로아키야스다쿄우네이스즈키세이지
    • G02F1/136
    • G02F1/13458G02F1/136286G02F2001/13629H01L27/124H01L29/456H01L29/4908H01L29/66765H01L29/78669H01L29/78678
    • PURPOSE: A thin film transistor circuit device, a method for manufacturing the same, and a liquid crystal display device using the thin film transistor circuit device are provided to improve corrosion resistance of a molybdenum alloy in air by adding niobium to molybdenum at a certain rate, and improve the reliability of gate terminals/wires and drain terminals/wires. CONSTITUTION: Wires and thin film transistors are formed at a main circuit area formed in the center of a substrate, and an external circuit area formed on an outer peripheral part of the substrate. Electrodes(15,16) of the wires and the thin film transistors are coated with an insulating film. Via apertures are formed on the insulating film. Utmost upper surfaces of the electrodes of the wires and/or thin film transistors are exposed through the via apertures. The electrodes of the wires and/or thin film transistors are connected with a metal film. The exposed utmost upper surfaces are molybdenum alloy containing niobium.
    • 目的:提供一种薄膜晶体管电路器件及其制造方法以及使用薄膜晶体管电路器件的液晶显示器件,以通过以一定速率向钼中添加铌来提高钼合金在空气中的耐腐蚀性 ,并提高了栅极端​​子/导线和漏极端子/电线的可靠性。 构成:在形成在基板的中心的主电路区域和形成在基板的外周部分上的外部电路区域形成电线和薄膜晶体管。 导线的电极(15,16)和薄膜晶体管被涂覆有绝缘膜。 绝缘膜上形成通孔。 导线和/或薄膜晶体管的电极的最上表面通过通孔露出。 电线和/或薄膜晶体管的电极与金属膜连接。 暴露的最大上表面是含有铌的钼合金。