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    • 61. 发明公开
    • 연접 비씨에이치 부호, 복호 및 다계층 복호 회로 및 방법, 이를 이용한 플래쉬 메모리 장치의 오류 정정 회로 및 플래쉬 메모리 장치
    • 编码,解码和多级解码电路以及使用相同的BCH代码的闪存存储器件的错误校正电路和使用该存储器代码的闪速存储器件的方法
    • KR1020140006444A
    • 2014-01-16
    • KR1020120073370
    • 2012-07-05
    • 한국과학기술원
    • 하정석조성근
    • G11C29/42H03M13/15H03M13/27
    • G11C29/42G11C16/0483H03M13/152H03M13/27
    • The present invention relates to a connected BCH coding and decoding, a multi-layer decoding circuit, a method, an error correction circuit of a flash memory device, and the flash memory device, capable of controlling delay time according to error degrees using multi-layer decoding, decoding, and coding for the flash memory. The present invention relates to the connected BCH multi-layer decoding circuit comprising: a first stage decoding unit for outputting first output data protected by executing the BCH decoding by receiving a part of the connected BCH code; a deinterleaving unit for outputting the first output data or the first output BCH code by dividing the first output BCH code or the first output data into two or more blocks; a second stage decoding unit for outputting second output data protected by a second output BCH code by decoding the output of the deinterleaving unit; an interleaving unit for outputting the second output BCH code or the second output data by dividing the second BCH code or the second output data into two or more blocks; and a decoder power control unit for temporally blocking the power supply until a new BCH code is received for a decoding success block and by obtaining the decoding success block by monitoring the operation condition of the first and the second stage decoding unit.
    • 本发明涉及连接的BCH编码和解码,多层解码电路,方法,闪速存储器件的误差校正电路和闪速存储器件,能够根据误差度来控制延迟时间, 闪存的层解码,解码和编码。 本发明涉及连接的BCH多层解码电路,包括:第一级解码单元,用于通过接收所连接的BCH码的一部分来输出通过执行BCH解码保护的第一输出数据; 去交错单元,用于通过将第一输出BCH码或第一输出数据分成两个或更多个块来输出第一输出数据或第一输出BCH码; 第二级解码单元,用于通过对解交织单元的输出进行解码来输出由第二输出BCH码保护的第二输出数据; 交错单元,用于通过将第二BCH码或第二输出数据分成两个或更多个块来输出第二输出BCH码或第二输出数据; 以及解码器功率控制单元,用于暂时阻断电源,直到接收到用于解码成功块的新的BCH码,并且通过监视第一和第二级解码单元的操作条件来获得解码成功块。
    • 63. 发明公开
    • 개선된 비트 반전 알고리즘 기반의 저밀도 패리티 검사 부호를 위한 복호 방법, 장치 및 이를 위한 기록 매체
    • 使用改进的双向转移算法解码低密度奇偶校验代码和记录介质的装置和方法
    • KR1020120053122A
    • 2012-05-25
    • KR1020100114203
    • 2010-11-17
    • 한국과학기술원
    • 하정석강동협
    • H03M13/11
    • H03M13/1102H03M13/1111
    • PURPOSE: An apparatus and a method for decoding a low density parity check code using an improved bit reversal algorithm and a recording medium for the same are provided to renew the reliability of a variable node by using a bit reversal algorithm. CONSTITUTION: A decoder initializes an iteration number to be 0. The decoder sets a maximum iteration number(S11). The decoder calculates a weighted value according to a mathematical formula from received signals(S13). The decoder calculates an inversion function according to the mathematical formula(S15). The calculated inversion function is compared with a predetermined threshold value(S17). A hard decision vector is updated according to the value of controlled received signals(S19). A syndrome vector is calculated by applying the updated hard decision vector to the mathematical formula(S21). Decoding is successfully completed(S23). The iteration number is compared with the maximum iteration number(S25). The decoder is closed by declaring decoding failure(S27).
    • 目的:提供一种使用改进的位反转算法和用于其的记录介质来解码低密度奇偶校验码的装置和方法,以通过使用位反转算法来更新可变节点的可靠性。 构成:解码器将迭代次数初始化为0.解码器设置最大迭代次数(S11)。 解码器根据接收信号的数学公式计算加权值(S13)。 解码器根据数学公式计算反演函数(S15)。 将计算出的反转函数与预定阈值进行比较(S17)。 根据受控接收信号的值来更新硬判决矢量(S19)。 通过将更新的硬判决向量应用于数学公式来计算校正子向量(S21)。 解码成功完成(S23)。 将迭代次数与最大迭代次数进行比较(S25)。 解码器通过声明解码失败来关闭(S27)。
    • 64. 发明授权
    • 분산 비디오 압축 기법을 위한 가상 채널 모델링 방법 및 장치
    • 用于分布式视频编码方案的虚拟通道建模方法与装置
    • KR101038205B1
    • 2011-05-31
    • KR1020100004181
    • 2010-01-18
    • 한국과학기술원
    • 하정석오지은정천성전동산김웅환박현욱
    • H04N7/24
    • H04N19/395H04N19/137H04N19/172H04N19/61H04N19/625
    • PURPOSE: A method and device for modeling a virtual channel for dispersion video compression technique are provided to perform modeling of a virtual channel to coincide a Laplacian distribtuiosn of a channel parameter of a virtual channel with a Laplacian distribution. CONSTITUTION: A difference frame is generated(S100). A 4x4 DCT(Discrete Cosine Transform) conversion about the difference frame is operated(S110). Samples in predetermined reliable section among samples are selected(S120). A sample dispersion based on reliable section area is calculated(S130). A virtual channel parameter is calculated(S140). By modeling a virtual channel by using the virtual channel parameter, optimum probability distribution is obtainer(S150).
    • 目的:提供用于对用于色散视频压缩技术的虚拟通道进行建模的方法和装置,以执行虚拟通道的建模以将虚拟通道的通道参数的拉普拉斯算子与拉普拉斯分布相吻合。 构成:生成差分帧(S100)。 对差分帧进行4×4DCT(离散余弦变换)转换(S110)。 选择样品中预定可靠部分的样品(S120)。 计算出基于可靠截面面积的样本分散(S130)。 计算虚拟通道参数(S140)。 通过使用虚拟信道参数建模虚拟信道,获得最优概率分布(S150)。
    • 66. 发明授权
    • 반복 복호기, 반복 복호 방법 및 반도체 메모리 시스템
    • KR102226174B1
    • 2021-03-10
    • KR1020170060021
    • 2017-05-15
    • 에스케이하이닉스 주식회사한국과학기술원
    • 하정석김대성
    • G06F11/10G11C16/08
    • 구성부호의채널출력에대한로그우도비(Log Likelihood Ratio: LLR)를산출하는 LLR 산출기; 상기 LLR에대하여 ECC 복호를수행하여제1 ECC 복호데이터를출력하는제1 구성복호기; 상기제1 ECC 복호데이터에대하여 ECC 복호를수행하여제2 ECC 복호데이터를출력하는제2 구성복호기; 및소정의반복종료조건을만족할때까지, 상기제2 ECC 복호데이터를상기제1 구성복호기로피드백시키고, 상기반복종료조건을만족하는경우에는상기제2 ECC 복호데이터를최종 ECC 복호데이터로서출력하는반복제어기를포함하고, 상기제1 구성복호기는상기피드백되는상기제2 ECC 복호데이터에대하여 ECC 복호를수행하여상기제1 ECC 복호데이터를출력하고, 상기제1 및 2 구성복호기각각은, 수신된데이터에기초하여, 에러비트정정을통해상기수신된데이터에대응하는후보코드워드들을생성하는생성부; 상기후보코드워드들중에서상기수신된데이터와의거리가최소가되는최적코드워드를검출하는검출부; 상기최적코드워드와상기수신된데이터간의거리를소정의임계치(threshold value)와비교하여, 상기최적코드워드및 상기수신된데이터중 어느하나를 ECC 복호데이터로서출력하는출력부를포함하는반복복호기가개시된다.