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121. 发明授权

KR100358030B1 에피택셜과성장방법및수직전계효과디바이스 失效
公开(公告)号：KR100358030B1
公开(公告)日：2003-01-08
申请号：KR1019940009248
申请日：1994-04-29
申请人： 텍사스 인스트루먼츠 인코포레이티드
发明人： 도날드엘.플럼톤 , 태성김 , 한테쭝위엔
IPC分类号： H01L29/772
CPC分类号： H01L29/66924 , H01L21/02395 , H01L21/02433 , H01L21/02463 , H01L21/02546 , H01L21/02576 , H01L21/02579 , H01L21/0262 , H01L29/66318 , H01L29/7371 , H01L29/7722
摘要： Method of epitaxial overgrowth of A B semiconductor on non-planar A B substrate containing grooves, the sidewalls of which have an equivalent orientation to that of the substrate. This method is applied to the fabrication of an heterobipolar transistor and of a vertical field effect transistor (700) and with buried gates (704) having gate sidewall crystal orientation the same as the substrate surface and a low index substrate crystal orientation without tilt to a higher index direction. The gate (704) may have modulated doping along the channel (706), and the drain (708) may have a lighter doping level than the channel which may be accomplished by an epitaxial overgrowth of the gates (704) to form the channels (706).
摘要翻译： A III B V的外延过度生长方法半导体在非平面的A III B V结包含基材的凹槽，其侧壁具有与基材相同的取向。该方法应用于异质双极晶体管和垂直场效应晶体管（700）的制造，并且具有与衬底表面相同的栅极侧壁晶体取向和低折射率衬底晶体取向的掩埋栅极（704），而不倾斜于指数走高。栅极（704）可以具有沿着沟道（706）的调制掺杂，并且漏极（708）可以具有比可以通过栅极（704）的外延过度生长来形成沟道来实现的沟道更轻的掺杂水平 706）。

122. 发明公开

KR1020020009125A 이종접합 바이폴라 트랜지스터의 제조방법 无效
标题翻译：用于制造异质结双极晶体管的方法
公开(公告)号：KR1020020009125A
公开(公告)日：2002-02-01
申请号：KR1020000042488
申请日：2000-07-24
申请人： 한국과학기술원 , 에이치엔에스하이텍 (주)
发明人： 전상훈 , 홍성철 , 윤태호 , 구흥섭 , 조세형
IPC分类号： H01L29/737
CPC分类号： H01L29/66318 , H01L29/7304 , H01L29/7371
摘要： PURPOSE: A method for fabricating a hetero junction bipolar transistor is provided to improve productivity by simplifying a process for fabricating a hetero junction bipolar transistor. CONSTITUTION: An emitter metal(54) is deposited on a semiconductor substrate formed with an InGaAs/GaAs layer(51), an InGaP layer(52), and a GaAs layer(53). The InGaAs/GaAs layer(51) is etched selectively by using the emitter metal(54) as a masking material. A thin film(55) including Si3N4, SiO2, and TiW is deposited on a surface of the InGaP layer(52) and a surface of the emitter metal(54). A photo-resist is patterned on the thin film(55) by using a contact alignment device and a base opening is formed thereby. The thin film(55) located on the base opening is opened by using a dry etch method or a wet etch method. The wet etch process for the InGaP layer(52) is performed. A base metal(57) is deposited thereon. A base contact is formed by lifting off the photo-resist.
摘要翻译：目的：提供一种用于制造异质结双极晶体管的方法，通过简化用于制造异质结双极晶体管的工艺来提高生产率。构成：在由InGaAs / GaAs层（51），InGaP层（52）和GaAs层（53）形成的半导体衬底上沉积发射极金属（54）。通过使用发射极金属（54）作为掩模材料，选择性地蚀刻InGaAs / GaAs层（51）。包括Si 3 N 4，SiO 2和TiW的薄膜（55）沉积在InGaP层（52）的表面和发射极金属（54）的表面上。通过使用接触对准装置在薄膜（55）上形成光致抗蚀剂，由此形成基部开口。位于基座开口上的薄膜（55）通过使用干蚀刻法或湿式蚀刻法打开。执行InGaP层（52）的湿蚀刻工艺。贱金属（57）沉积在其上。通过剥离光致抗蚀剂形成基底接触。

123. 发明公开

KR1020010091919A 켄틸레버 베이스를 지닌 초고속 헤테로 접합 양극성트랜지스터 无效
标题翻译：超高频绝缘双极晶体管
公开(公告)号：KR1020010091919A
公开(公告)日：2001-10-23
申请号：KR1020010010497
申请日：2001-02-28
申请人： 티알더블류 인코포레이티드
发明人： 구티에레즈-아이트켄,오거스토엘. , 오키,아아론케이 , 카네시로,에릭엔. , 스트라이트,드와이트씨
IPC分类号： H01L29/737
CPC分类号： H01L29/66318 , H01L29/045 , H01L29/1004 , H01L29/7371
摘要： PURPOSE: A HBT(heterojunction bipolar transistor) is provided to possesse improved high frequency performance and a lower base to collector capacitance than previously thought possible. CONSTITUTION: A layer of dielectric material(17), suitably silicon nitride, covers the upper sides of the semiconductor die with openings in that material over the base metal and emitter metal. The collector metal(11) does not appear in this cross section view which is taken along the lines A-A' of a completed device. Using a photo-resist or other masking process, interconnection metal(19) is deposited into the openings in the silicon nitride dielectric and along the sloping side edges of the insulating portion of the transistor. The foregoing interconnection(19) serves as the electric leads to the respective base and emitter contacts(13,15).
摘要翻译：目的：提供HBT（异质结双极晶体管），以具有比以前认为可能的更高的高频性能和更低的基极与集电极电容。构成：一层介质材料（17）（合适的是氮化硅）覆盖半导体管芯的上侧，在该材料上开有基底金属和发射极金属。在沿着完成的装置的线A-A'截取的截面图中，集电体金属（11）不出现。使用光刻胶或其它掩模工艺，将互连金属（19）沉积在氮化硅电介质的开口中并沿着晶体管的绝缘部分的倾斜侧边缘沉积。上述互连（19）用作到各个基极和发射极触点（13,15）的电引线。

124. 发明公开

KR1020010062795A 바이폴라 트랜지스터 및 그 제조방법 失效
标题翻译：双极晶体管及其制造方法
公开(公告)号：KR1020010062795A
公开(公告)日：2001-07-07
申请号：KR1020000083515
申请日：2000-12-28
申请人： 파나소닉 주식회사
发明人： 야나기하라마나부 , 무라야마게이이치 , 후쿠이다케시 , 다나카츠요시
IPC分类号： H01L21/328
CPC分类号： H01L29/66318 , H01L29/0692 , H01L29/0817 , H01L29/7371
摘要： PURPOSE: To provide a bipolar transistor together with its manufacturing method, where parasitic capacity between base and collector is very low. CONSTITUTION: An n--GaAs collector layer 3, P+-GaAs base layer 4, n-InGaP emitter layer 5, and n-GaAs/n+-InGaAs emitter contact layer 6 are formed sequentially on a semi-insulating GaAs substrate 1. The n-GaAs/n+-InGaAs emitter contact layer 6 has an almost annular structure, while the outer-periphery form of the n-InGaP emitter layer 5 substantially equals the outer-periphery form of the n-GaAs/n+-InGaAs emitter contact layer 6.
摘要翻译：目的：提供双极晶体管及其制造方法，其中基极和集电极之间的寄生电容非常低。构成：在半绝缘GaAs衬底1上依次形成n-GaAs集电极层3，P + -GaAs基极层4，n-InGaP发射极层5和n-GaAs / n + -InGaAs发射极接触层6。 n-GaAs / n + -InGaAs发射极接触层6具有几乎环形结构，而n-InGaP发射极层5的外周形式基本上等于n-GaAs / n + -InGaAs发射极接触层的外周形式 6。

125. 发明授权

KR100277555B1 바이폴라 트랜지스터용 다층 콜렉터 구조물 및 그 제조 방법 失效
标题翻译：多层集电极结构的双极晶体管及其制造的方法
公开(公告)号：KR100277555B1
公开(公告)日：2001-02-01
申请号：KR1019920011344
申请日：1992-06-27
申请人： 텍사스 인스트루먼츠 인코포레이티드
发明人： 윌리엄위-청뤼
IPC分类号： H01L29/08
CPC分类号： H01L29/66318 , H01L29/0821 , H01L29/7371 , Y10S148/011 , Y10S148/072
摘要： 본발명의일반적인한 형태에있어서, 제공된다층콜렉터구조물은얇고고농도로도핑된층(12) 및두껍고저농도로도핑되거나비계획적으로도핑된층(14)을포함하고있다. 다른장치, 시스템및 방법도기술되어있다.
摘要翻译：在本发明的一般方面，提供了一种多层集电极结构是薄的重掺杂层12和掺杂有厚的，低密度，或包括掺杂有计划外的层（14）。其他设备，系统和方法也进行了描述。

126. 发明授权

KR100134095B1 열 전자 트랜지스터 失效
标题翻译：热电子晶体管
公开(公告)号：KR100134095B1
公开(公告)日：1998-04-20
申请号：KR1019880008871
申请日：1988-07-16
申请人： 에이티 앤드 티 코포레이션
发明人： 앤소니프레드릭죤레비
IPC分类号： H01L29/68 , H01L27/12 , H01L29/205
CPC分类号： H01L29/7378 , H01L29/155 , H01L29/201 , H01L29/205 , H01L29/7371 , H01L29/7606
摘要： 내용 없음.

127. 发明授权

KR100120927B1 헤테로접합형 바이폴라트랜지스터 失效
标题翻译：异质结双极晶体管
公开(公告)号：KR100120927B1
公开(公告)日：1997-10-20
申请号：KR1019880002868
申请日：1988-03-18
申请人： 소니 주식회사
发明人： 가와이히로지
IPC分类号： H01L29/72
CPC分类号： H01L27/0605 , H01L29/7371
摘要： 내용없음

128. 发明授权

KR1019890003379B1 화합물 반도체 집적회로장치 失效
标题翻译：化合物半导体集成电路设备
公开(公告)号：KR1019890003379B1
公开(公告)日：1989-09-19
申请号：KR1019840007656
申请日：1984-12-05
申请人： 후지쯔 가부시끼가이샤
发明人： 요꼬야마나오끼
IPC分类号： H01L29/16
CPC分类号： H01L21/8252 , H01L27/0605 , H01L29/205 , H01L29/7371 , H01L29/7787 , H01L29/80 , H01L29/802
摘要： A compound semiconductor integrated circuit device includes a bipolar transistor and a field effect transistor (FET) comprises a semi- insulating substrate having first and second areas, being over the first area, and FED being over the second area; a first cpd. semiconductor layer of a first concutivity on the substrate; a second cpd. semiconductor layer of a second conductivity on layer; a third cpd. semiconductor layer of the first conductivity on layer, at least one of layers and having a forbidden energy band gap larger than that of layer; and an electrode formed over layer.
摘要翻译：一种复合半导体集成电路器件，包括双极晶体管和场效应晶体管（FET），该场效应晶体管（FET）包括半绝缘衬底，该第一和第二区域位于第一区域之上，并且FED位于第二区域之上; 第一个cpd 在衬底上具有第一晶体的半导体层; 第二个cpd 第二层导电层的半导体层; 第三个cpd 第一导电层的半导体层，层中的至少一个并且具有比层的大的阻挡能带隙; 以及形成在层上的电极。

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