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1. 发明专利

JP4768300B2 Voltage level conversion circuit and semiconductor integrated circuit device 有权
公开(公告)号：JP4768300B2
公开(公告)日：2011-09-07
申请号：JP2005095442
申请日：2005-03-29
申请人：東芝マイクロエレクトロニクス株式会社 , 株式会社東芝
发明人：洋一佐藤 , 宏明鈴木
IPC分类号： H03K19/0185
CPC分类号： H03K3/356165 , H03K3/356113

2. 发明专利

JP3998553B2 Differential output circuit, and a circuit using the same 有权
公开(公告)号：JP3998553B2
公开(公告)日：2007-10-31
申请号：JP2002287929
申请日：2002-09-30
申请人： Necエレクトロニクス株式会社
发明人：泰青木
IPC分类号： H03K19/0948 , H03F3/45 , H03K3/356
CPC分类号： H03K3/356113 , H03K3/356165

3. 发明专利

JP2003309462A Level shifting circuit 审中-公开
标题翻译：水平移位电路
公开(公告)号：JP2003309462A
公开(公告)日：2003-10-31
申请号：JP2002112486
申请日：2002-04-15
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： KOBAYASHI TOSHIFUMI
IPC分类号： H03K19/0185 , H03K3/356
CPC分类号： H03K3/356165 , H03K3/356113
摘要： PROBLEM TO BE SOLVED: To obtain a level shifting circuit in which a convertible potential difference is large, a delay time is short and a through current is small.
SOLUTION: A charging means is composed of a charge control circuit. In the charge control circuit, when a node N0103 is changed from logic 'H' to logic 'L' due to a change in an input signal IN
- L, a P type transistor MP0104 is set to on to charge a node N0104 into logic 'H', and the P type transistor MP0104 is then returned to an off state. When the node N0104 is changed from logic 'H' to logic 'L' due to a change the input signal IN
- L, the P type transistor MP0103 is set to on to charge the node N0103 into logic 'H' and the P type transistor MP0103 is then returned to an off state.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题为了获得可转换电位差大的电平移动电路，延迟时间短，通电电流小。解决方案：充电装置由充电控制电路组成。在充电控制电路中，由于输入信号IN - L的变化，当节点N0103从逻辑“H”变为逻辑“L”时，P型晶体管MP0104被设置为将节点N0104充电为逻辑“H”，然后P型晶体管MP0104返回到关闭状态。由于输入信号IN - L的改变，当节点N0104从逻辑“H”变为逻辑“L”时，P型晶体管MP0103被设置为接通，以将节点N0103充电为逻辑 'H'和P型晶体管MP0103然后返回到关闭状态。版权所有（C）2004，JPO

4. 发明专利

JP2018042077A レベルシフト回路および半導体装置审中-公开
公开(公告)号：JP2018042077A
公开(公告)日：2018-03-15
申请号：JP2016174272
申请日：2016-09-07
申请人：ルネサスエレクトロニクス株式会社
发明人：紙丸大
IPC分类号： H03K19/0948 , H03K19/0185
CPC分类号： H03K3/356113 , H03K3/356165 , H03K3/356182
摘要：【課題】レベルシフト動作を行える電源電位範囲を拡大することが可能なレベルシフト回路および半導体装置を提供する。【解決手段】レベルシフト回路は、振幅増幅回路AMPt1,AMPb1と、サブレベルシフト回路SLSC1とを有する。振幅増幅回路AMPt1,AMPb1は、基準電源電位GNDおよび外部電源電位VDD2が供給され、内部電源電圧振幅(VDD1(
【選択図】図2A

5. 发明专利

JP5530344B2 Level shift circuit and a drive circuit having the same 有权
公开(公告)号：JP5530344B2
公开(公告)日：2014-06-25
申请号：JP2010273562
申请日：2010-12-08
申请人：ルネサスエレクトロニクス株式会社
发明人：弘土
IPC分类号： H03K19/0185
CPC分类号： G09G3/3696 , G09G3/3258 , G09G5/00 , G09G2310/027 , G09G2310/0289 , H03K3/356165 , H03K19/0175
摘要： A level shift circuit includes first and second NMOS transistors that are coupled between a first supply terminal, and first and second output nodes, respectively, and have respective control terminals receiving input signals of a low amplitude, third and fourth PMOS transistors which are coupled between a second supply terminal, and the first and second output nodes outputting signals of high amplitude, respectively, a fifth PMOS transistor which is coupled between a gate of the third PMOS transistor and the second output node, and has a gate coupled to the first output node, a sixth PMOS transistor which is coupled between a gate of the fourth PMOS transistor and the first output node, and has a gate coupled to the second output node, and first and second load elements which are coupled between the second supply terminal and the gates of the third and fourth PMOS transistors, respectively.

6. 发明专利

JP2011124990A Level shifter, and testing device using the same 审中-公开
标题翻译：水平移位器，以及使用其的测试装置
公开(公告)号：JP2011124990A
公开(公告)日：2011-06-23
申请号：JP2010253499
申请日：2010-11-12
申请人： Advantest Corp , 株式会社アドバンテスト
发明人： KOJIMA SHOJI
IPC分类号： H03K19/0185 , G01R31/28 , H03K3/354 , H03K3/356
CPC分类号： H03K3/356165
摘要： PROBLEM TO BE SOLVED: To provide a level shifter of a type different from a conventional one.
SOLUTION: This level shifter 200 shifts the level of an input signal In taking either of the level of a first lower voltage VssL and that of a first upper voltage VddL to the level of an output signal Out taking either of the level of a second lower voltage VssH and that of a second upper voltage VddH. The output signal Out of an SR flip flop 100 transits to the second upper voltage VddH in response to a positive edge of a signal to a set terminal thereof, and transits to the second lower voltage VssH in response to a positive edge of a signal to a reset terminal thereof. An AND gate 202 outputs, to the set terminal of the SR flip flop 100, a logical product of a feedback signal FBQ having an inverted logical level with respect to the output signal Q of the SR flip flop 100 and the input signal In. A NOR gate 204 outputs, to the reset terminal of the SR flip flop 100, a negative logical sum of the feedback signal FBQ and the input signal In.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种不同于常规电平的电平移位器。解决方案：该电平移位器200将输入信号In的电平以将第一低电压VssL和第一高电压VddL的电平中的任一个移位到输出信号Out的电平中，第二较低电压VssH和第二较高电压VddH的电压。 SR触发器100的输出信号Out响应于到其设定端子的信号的上升沿而转换到第二高电压VddH，并且响应于信号的上升沿而转变到第二较低电压VssH 其复位端。与门202向SR触发器100的设定端输出相对于SR触发器100的输出信号Q和输入信号In具有反相逻辑电平的反馈信号FBQ的逻辑积。或非门204向SR触发器100的复位端输出反馈信号FBQ和输入信号In的负逻辑和。版权所有（C）2011，JPO＆INPIT

7. 发明专利

JP4451442B2 Bus hold circuit having a power drop and overvoltage tolerance 有权
公开(公告)号：JP4451442B2
公开(公告)日：2010-04-14
申请号：JP2006517520
申请日：2004-06-22
申请人：フェアチャイルドセミコンダクターコーポレイション
发明人：ミスケ，マイロン，ジェイ , ロンバード，ステファン，ビー
IPC分类号： H03K3/356 , H03K3/037 , H03K19/0948
CPC分类号： H03K3/356165 , H03K3/35613 , H03K2217/0018

8. 发明专利

JP2007228470A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2007228470A
公开(公告)日：2007-09-06
申请号：JP2006049730
申请日：2006-02-27
申请人： Sony Corp , ソニー株式会社
发明人： OIKE YUSUKE
IPC分类号： H03K5/14
CPC分类号： H04N5/372 , G11C7/12 , G11C8/08 , G11C11/4085 , H03K3/356165 , H03K17/04 , H03K19/01 , H04N5/374 , H04N5/378
摘要： PROBLEM TO BE SOLVED: To enable the reduction of delay difference and the high speed operation of a circuit with effective reduction of a circuit scale by providing a means for accelerating the drive.
SOLUTION: The semiconductor device 1 is provided with a drive circuit 20 to drive a circuit 10. Moreover, this semiconductor device 1 is also provided with an auxiliary drive circuit 30 for accelerating the drive of the drive circuit 20 using the drive signal of the drive circuit 10 as an input signal.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：通过提供用于加速驱动的装置，可以有效地减少电路规模，从而减少电路的延迟差和高速运行。解决方案：半导体器件1设置有用于驱动电路10的驱动电路20.此外，该半导体器件1还设置有辅助驱动电路30，用于使用驱动信号来加速驱动电路20的驱动作为输入信号。版权所有（C）2007，JPO＆INPIT

9. 发明专利

JP2007047785A Level shifter and display device having the same 审中-公开
标题翻译：水平移位器和显示装置
公开(公告)号：JP2007047785A
公开(公告)日：2007-02-22
申请号：JP2006213593
申请日：2006-08-04
申请人： Samsung Electronics Co Ltd , 三星電子株式会社Samsung Electronics Co.,Ltd.
发明人： PARK TAE-HYUNG , BUN KOKUTETSU , KIM IL-GON , KIM CHUL-HO , MAENG HO-SUK , KIM KYUNG-HOON
IPC分类号： G09G3/36 , G02F1/133 , G09G3/20
CPC分类号： H03K3/356165
摘要： PROBLEM TO BE SOLVED: To provide a level shifter having a single input terminal for driving a liquid crystal panel with low electric power consumption and a display device having the same.
SOLUTION: The level shifter has a first transistor including a gate electrode connected to a first power supply voltage and a source electrode receiving the supply of an input signal through an input terminal; a second transistor including a drain electrode connected to the first power supply voltage through a first node, and connected to the drain electrode of the first transistor; a third transistor including a source electrode connected to a second power supply voltage, a drain electrode connected to the gate electrode of the second transistor through a second node and a gate electrode receiving the supply of the input signal through an input terminal; a fourth transistor including a source electrode connected to the first power supply voltage, a gate electrode connected to the drain electrode of the first transistor through a first node and a source electrode connected to the drain electrode of the third transistor through the second node; and an inverter inverting the signal of the second node and outputting the same through an output terminal.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种电平移位器，具有用于驱动具有低功耗的液晶面板的单个输入端子和具有该电平移位器的显示装置。解决方案：电平移位器具有第一晶体管，其包括连接到第一电源电压的栅极电极和通过输入端子接收输入信号的源极的源极电极; 第二晶体管，包括通过第一节点连接到第一电源电压并连接到第一晶体管的漏电极的漏电极; 第三晶体管，包括连接到第二电源电压的源电极，通过第二节点连接到第二晶体管的栅电极的漏极和通过输入端接收输入信号的栅电极; 第四晶体管，包括连接到第一电源电压的源电极，通过第一节点连接到第一晶体管的漏电极的栅电极和通过第二节点连接到第三晶体管的漏电极的源电极; 以及逆变器，反相第二节点的信号并通过输出端输出。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2005244956A Flip-flop, shift register, and active matrix type display device 有权
标题翻译： FLIP-FLOP，SHIFT寄存器和主动矩阵型显示设备
公开(公告)号：JP2005244956A
公开(公告)日：2005-09-08
申请号：JP2005017432
申请日：2005-01-25
申请人： Sharp Corp , シャープ株式会社
发明人： WASHIO HAJIME , MURAKAMI YUICHIRO , BROWNLOW MICHAEL JAMES
IPC分类号： G02F1/133 , G09G3/20 , G09G3/30 , G09G3/36 , G11C11/412 , G11C19/00 , H03K3/012 , H03K3/037 , H03K3/356 , H03K23/00
CPC分类号： H03K3/356165 , G09G3/3677 , G09G3/3688 , G11C19/00 , H03K3/012 , H03K3/356113 , H03K3/356147
摘要： PROBLEM TO BE SOLVED: To improve both of rising characteristics and falling characteristics of an output signal in a flip-flop, and to reduce the signal delay of a shift register constituted by this flip-flop. SOLUTION: A latch unit 22 has a latch circuit for latching a signal inputted from a gating unit 21 configured by an inverter 24 and an inverter 25, and an analog switch ASW2 for switching an on/off state, in response to a High/Low state of a reset signal R is disposed between the inverter 24 of the latch circuit and an output terminal OUT. A switching element Mn6 for switching the on/off state, according to the High/Low state of the reset signal between an input of a low potential VSS of an operating power source of the flip-flop and the output terminal OUT. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提高触发器中的输出信号的上升特性和下降特性，并减少由该触发器构成的移位寄存器的信号延迟。解锁方案：闩锁单元22具有锁存电路，用于锁存由逆变器24和逆变器25构成的门控单元21输入的信号和用于响应于开关状态的开关状态的模拟开关ASW2 复位信号R的高/低状态被设置在锁存电路的反相器24和输出端子OUT之间。根据触发器的工作电源的低电位VSS的输入和输出端OUT之间的复位信号的高/低状态来切换导通/截止状态的开关元件Mn6。版权所有（C）2005，JPO＆NCIPI

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