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    • 1. 发明专利
    • 試験装置及び試験方法
    • 测试设备和测试方法
    • JP2015190923A
    • 2015-11-02
    • JP2014069758
    • 2014-03-28
    • トヨタ自動車株式会社
    • 岩橋 洋平
    • G01R31/26
    • G01R31/26G01R31/2608G01R31/2621G01R31/261
    • 【課題】半導体素子に十分に負荷を与えることができるとともに、半導体素子が破壊した場合に半導体素子の破壊の進行を適切に抑制することができる技術を開示する。 【解決手段】試験装置2は、電源10と、インダクタ20と、ダイオード30と、試験対象素子40と、遮断用素子50とを有している。遮断用素子50は、電源10と試験対象素子40との間に設けられ、試験対象素子40への電流の流入を遮断可能である。遮断用素子50は、試験対象素子40のターンオフに起因して試験対象素子40に印加される電圧がサージ電圧まで上昇した後に安定するタイミングより先に試験対象素子40への電流の流入の遮断を開始し、そのタイミング以降に遮断を完了する。 【選択図】図1
    • 要解决的问题:为了公开一种能够充分地向半导体器件施加负载的技术,并且如果半导体器件损坏则适当地抑制半导体器件的断裂进展。解决方案:测试装置2包括:电源10; 电感器20; 二极管30; 测试对象设备40; 和切断装置50.切断装置50设置在电源10和被检查物体装置40之间,并且可以截断流入测试目标装置40的电流。截止装置40开始切断 在通过关闭测试对象装置40之后,施加到被测试对象装置40的电压的时刻提高到浪涌电压,然后在定时之后稳定并完成截止,在测试对象装置40内的电流。
    • 2. 发明专利
    • Test device
    • 测试设备
    • JP2012127809A
    • 2012-07-05
    • JP2010279625
    • 2010-12-15
    • Advantest Corp株式会社アドバンテスト
    • HASHIMOTO KENJI
    • G01R31/28
    • G01R31/2637G01R31/261
    • PROBLEM TO BE SOLVED: To detect whether or not energy accumulated in an inductive load part is discharged.SOLUTION: A test device tests a device to be tested. This test device is provided which includes: a power supply part which generates a power supply voltage to be supplied to the device to be tested; an inductive load part provided on a path between the power supply part and the device to be tested; a storage part in which a substrate including at least the inductive load part is stored; and a lock maintaining part which maintains a locked state of an opening/closing part for allowing an operator to access to the substrate in the storage part when the voltage at a predetermined point on the substrate is higher than the set voltage.
    • 要解决的问题:检测积分在感性负载部件中的能量是否被排出。

      解决方案:测试设备测试要测试的设备。 该测试装置包括:电源部分,其产生要提供给待测试装置的电源电压; 设置在电源部件和被测试装置之间的路径上的感性负载部件; 存储至少包括感性负载部的基板的存储部; 以及锁定保持部,其保持打开/关闭部的锁定状态,以便当基板上的预定点处的电压高于设定电压时,允许操作者访问存储部中的基板。 版权所有(C)2012,JPO&INPIT

    • 8. 发明专利
    • Semiconductor test jig and breakdown voltage measurement method using the same
    • 半导体测试电极和断电电压测量方法
    • JP2013096837A
    • 2013-05-20
    • JP2011239841
    • 2011-11-01
    • Mitsubishi Electric Corp三菱電機株式会社
    • IKEGAMI MASAAKI
    • G01R31/26G01R1/06
    • G01R1/07314G01R31/129G01R31/261G01R31/2623
    • PROBLEM TO BE SOLVED: To provide a semiconductor test jig capable of performing the breakdown voltage measurement of a semiconductor chip without generating atmospheric discharge at low cost and a breakdown voltage measurement method using the semiconductor test jig.SOLUTION: A semiconductor test jig according to the present invention includes: a susceptor 1 installed with a probe pin 3 and an insulator 2 provided so as to surround the probe pin 3 in plan view, and a lower electrode stage 7 disposed opposite the surface of the susceptor 1 on the side at which the probe pin 3 and the insulator 2 are provided and capable of mounting a semiconductor chip 4 on the surface on the susceptor 1 side, while causing the probe pin 3 to contact a surface electrode 5 formed on the semiconductor chip 4, and causing the insulator 2 to contact both of the semiconductor chip 4 and the lower electrode state 7 when the susceptor 1 and the lower electrode stage 7 move in a direction to approach each other with the semiconductor chip 4 mounted on the lower electrode stage 7.
    • 要解决的问题:提供能够以低成本产生大气排放并且使用半导体测试夹具的耐压测试方法能够执行半导体芯片的击穿电压测量的半导体测试夹具。 解决方案:根据本发明的半导体测试夹具包括:安装有探针3和设置成围绕探针3的平面图的绝缘体2的基座1和与电极平面相对配置的下电极级7 在探针3和绝缘体2的一侧设置基座1的表面,并且能够将探针3与表面电极5接触的方式将半导体芯片4安装在基座1侧的表面上 形成在半导体芯片4上,并且当基座1和下电极级7在安装了半导体芯片4的方向上彼此接近的方向上移动时,使绝缘体2接触半导体芯片4和下电极状态7 在下电极级7上。版权所有(C)2013,JPO&INPIT
    • 9. 发明专利
    • Method for measuring transistor
    • 测量晶体管的方法
    • JPS59125079A
    • 1984-07-19
    • JP23375182
    • 1982-12-29
    • Fujitsu Ltd
    • NAKATANI YASUTAKA
    • G01R31/26
    • G01R31/261
    • PURPOSE: To measure easily and non-destructively a reverse bias breakdown rating of a bipolar transistor, and to measure a fall time of a collector current by measuring an S parameter of a bipolar transistor to be tested, and executing an operation.
      CONSTITUTION: A mean impurity density of a base and depth of the base are varied as parameters, and other all design conditions are not varied but are kept constant, by which plural bipolar transistors are manufactured. An S parameter is measured with respect to each of these bipolar transistors. An absolute value of one element S
      11 of the S parameter is denoted as ρ and an angle ∠S made by S
      11 is denoted as θ, by which an input reflection coefficient Γ is derived by the expression [ I ]. By using the S parameter, the maximum single direction power gain MSG is derived by the expression [II]. In the same way, by using the S parameter, a stable coefficient K is derived by the expression [III]. By using said MSG and K, the maximum competent power gain MAG is derived by the expression [IV].
      COPYRIGHT: (C)1984,JPO&Japio
    • 目的:简单,无损地测量双极晶体管的反向偏压击穿等级,并通过测量待测试的双极晶体管的S参数并执行一个操作来测量集电极电流的下降时间。 构成:基底的平均杂质浓度和基底的深度作为参数而变化,并且其他所有设计条件不变,但保持恒定,由此制造多个双极晶体管。 相对于这些双极晶体管中的每一个测量S参数。 S参数的一个元素S11的绝对值表示为rho,由S11表示的角度锐角S表示为θ,由式[I]导出输入反射系数GAMMA。 通过使用S参数,最大单向功率增益MSG由表达式[II]导出。 以相同的方式,通过使用S参数,通过表达式[III]导出稳定系数K。 通过使用所述MSG和K,最大能量功率增益MAG由表达式[IV]导出。