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    • 2. 发明专利
    • TIME CORRECTING MECHANISM FOR CLOCK
    • JPH06109877A
    • 1994-04-22
    • JP26094392
    • 1992-09-30
    • TOSHIBA CORP
    • HIRASAWA YUTAKA
    • G04C11/04G04C9/04G04G5/00
    • PURPOSE:To make it possible to set the time automatically and initially and to correct the time by correcting the time of a clock in correspondence with the time data taken out of the speech time information, which is received through the public line of telecommunication. CONSTITUTION:The time information, which is provided in speech from the public line of telecommunication 17 based on the instruction from a communication part 13, is received through a modem with NEW 16. The time data are taken out with a speech recognizing part 14. The time corresponding to the time data is set in a clock 20 with a correcting part 15. At this time, a correcting timer is reset, e.g. by reading the present time out of the clock 20 and storing the time into a memory 12 as the previously set time so as to measure the time of the time correction to be performed next. When the time is corrected, e.g. the present time is read out at every time when interruption occurs at every specified time (e.g. one minute), the time difference from the previously set time stored in the memory 12 is obtained and the difference is compared with the time interval for the time correction. The elapsed time is measured, and the time of the clock 20 is reset 15.
    • 3. 发明专利
    • SIGNAL TRANSMISSION SYSTEM IN CSMA/CD TRANSMISSION SYSTEM
    • JPS61251251A
    • 1986-11-08
    • JP9098785
    • 1985-04-30
    • TOSHIBA CORP
    • HIRASAWA YUTAKA
    • PURPOSE:To prevent the lowering of signal transmission efficiency in a high load time by starting a signal transmission after an appropriate time is elapsed from when any signal is not existed on a transmission line and reducing the times of collision on the transmission line. CONSTITUTION:An interface control part 51 informs, with booking a data transmission request from a data process device, the occurrence of a transmission request to a controller 57 and also, stores transmission data which is transmitted to at a buffer 52. The controller 57 instructs the transmission of the signal to a transmission part 53 when a transmission inhibit signal 100 from a transmission inhibiting part 56 is not existed. The transmission inhibiting part 56 holds, with receiving a receiving completion message from a receiving part 54, the output of the transmission inhibit signal 100 from a certain delay and after that, it operates to terminate the outputting of the signal.
    • 4. 发明专利
    • LAN CONTROL SYSTEM
    • JPH04263537A
    • 1992-09-18
    • JP2441591
    • 1991-02-19
    • TOSHIBA CORP
    • HIRASAWA YUTAKA
    • G06F13/38H04L12/40H04L12/407
    • PURPOSE:To increase a processing amount by masking the transmission source address of a received frame by a communicating party address mask value, comparing a communicating party address and processing the frame for each frame of the various address at each controller. CONSTITUTION:The frame on a LAN 11 is monitored and when the frame is completed, it is fetched into a LAN controller LCP 3. The LCP 3 compares the destination address of the frame with the own address and when those addresses are not compared, the frame is abandonned. When they are coincident, the transmission source address of the frame is masked by the mask value set at communicating party address mask storage memories 6-1-6-8. Each LCP 3 compares the obtained value with the value set at communicating party address storage memories 5-1-5-8. At such a time, the values are coincident only at the memory 5-5 of the LCP 3-5, for example. Namely, only the LCP 3-5 is advanced to the next step, and the other LCP abandon the frames. The LCP 3-5 executes various frame processings and executes the announcement, etc., of the received frame to an information processor 1. Thus, loads are equally distributed to the respective LCP.
    • 5. 发明专利
    • LOCAL AREA NETWORK SYSTEM
    • JPS63316538A
    • 1988-12-23
    • JP15134987
    • 1987-06-19
    • TOSHIBA CORP
    • HIRASAWA YUTAKA
    • G06F15/16G06F15/177H04L29/00
    • PURPOSE:To receive transferred data without fail without being conscious of the condition of other computer with respective computers by making preparations for a local area network control device LAN for respective computers of a complex computer system and adopting a system to execute the high speed of the data transmission of a corresponding computer and a LAN control device. CONSTITUTION:When a computer 31-1 of a complex computer system 31 goes to the operating condition, a LAN address setting command and a flag on command are sent from a bus 34-1 to a LAN control device 32-1 in the sequence. A command from the computer 31-1 is received by an interface control part 41 and a LAN address common to all computers 31-1-31-n to constitute the system 31 is set to a LAN address memory part 46. The flag on command from the computer 31 is set to a flag 45 in the device 32-1 in the initial condition. Respective address and flag 45 of the memory part 46 are sent through a LAN access part 42 to a LAN cable 30.
    • 6. 发明专利
    • ALIGNMENT CORRECTION SYSTEM
    • JPS63163930A
    • 1988-07-07
    • JP31533086
    • 1986-12-26
    • TOSHIBA CORP
    • HIRASAWA YUTAKA
    • G06F9/45G06F5/00G06F9/30G06F9/44
    • PURPOSE:To attain program conversion irrespective of the system of a structure by means of a common routine by converting the structure based on alignment information of the structure. CONSTITUTION:Since the number of bytes differ in an integer, a real number, character data, and the like on storing data on the structure, an idle space occurs in a memory. Since the directions of the idle space differ in respective computers, the structure also needs to be converted at the time of program conversion. Consequently, an alignment information storage part 13 is provided, and '1' is assigned as to the significant byte of the structure, and '0' is to the byte inserted for alignment. The byte length of the structure stored in a structure storage part for correction 11 is stored in a register part 14, and alignment information is in the alignment information storage part 13. The byte whose alignment information is '0' is ignored, and only the significant byte is fetched, converted into the structure of a new system, and stored in a structure storage part 12 after it is corrected.
    • 8. 发明专利
    • ELECTRONIC MAIL SYSTEM
    • JPH05130137A
    • 1993-05-25
    • JP29109091
    • 1991-11-07
    • TOSHIBA CORP
    • HIRASAWA YUTAKA
    • G06F13/00H04L12/54H04L12/58
    • PURPOSE:To select automatically an 0/R name in kanji or in alphanumerics by retrieving a user definition file whose 0/R name is registered by plural forms and selecting the same form as the 0/R name of an identified recipient. CONSTITUTION:The 0/R name of each user is registered in a user definition file 2 in plural forms in kanji and in alphanumerics. When a sender being a user sends an electronic mail, the transmission mail is generated by using a mail command 5 of a computer 1 and the mail is given to a mail transfer program 6. The program 6 identifies the form of the 0/R name of the recipient designated by the user and selects the 0/R name of the same form by retrieving the file 2 and a network information file 4 decides the computer 1 being a mail distribution destination. Thus, the user sends a domestic or an international mail without notifying the form of its own 0/R name thereby improving the operability of the user.