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1. 发明专利

JP2014165670A Oscillation stop detection circuit and electronic apparatus 有权
标题翻译：振荡停止检测电路和电子设备
公开(公告)号：JP2014165670A
公开(公告)日：2014-09-08
申请号：JP2013035061
申请日：2013-02-25
申请人： Seiko Instruments Inc , セイコーインスツル株式会社
发明人： WATANABE KOTARO , MITANI MAKOTO
IPC分类号： H03K5/19
CPC分类号： H03K5/19 , G01R29/02
摘要： PROBLEM TO BE SOLVED: To provide an oscillation stop detection circuit that can detect an oscillation stop irrespective of whether an input signal stops at a High or Low signal, accurately measures an oscillation stop detection time, and consumes less current.SOLUTION: The oscillation stop detection circuit includes: a pulse generation circuit 50 for outputting a one-shot pulse in synchronism with an oscillation signal input from an input terminal 3; a capacitor 40 having one terminal connected to a first power terminal 1 and the other terminal connected to an input terminal of an inverter 12; a constant current circuit connected to the first power terminal and the other terminal of the capacitor; and a switch circuit connected between an output terminal of the pulse generation circuit and the other terminal of the capacitor to connect the other terminal of the capacitor to a second power terminal 2 in response to the one-shot pulse.
摘要翻译：要解决的问题：为了提供能够检测振荡停止的振荡停止检测电路，无论输入信号是否以高或低信号停止，都能精确地测量振荡停止检测时间，并且消耗更少的电流。解决方案：振荡停止检测电路包括：脉冲发生电路50，用于与从输入端子3输入的振荡信号同步输出单触发脉冲; 一个电容器40，其一个端子连接到第一电源端子1，另一个端子连接到逆变器12的输入端子; 连接到电容器的第一电源端子和另一端子的恒流电路; 以及连接在脉冲发生电路的输出端子和电容器的另一端子之间的开关电路，以响应于单次脉冲将电容器的另一端子连接到第二电源端子2。

2. 发明专利

JP2014068249A Readout circuit and semiconductor device 有权
标题翻译：读出电路和半导体器件
公开(公告)号：JP2014068249A
公开(公告)日：2014-04-17
申请号：JP2012212942
申请日：2012-09-26
申请人： Seiko Instruments Inc , セイコーインスツル株式会社
发明人： WATANABE KOTARO , MITANI MAKOTO
IPC分类号： H03K3/013 , G11C16/06 , H03K3/037
CPC分类号： G11C29/04 , G11C7/02 , G11C7/106 , G11C7/1063
摘要： PROBLEM TO BE SOLVED: To provide a readout circuit that can detect an inversion of data held owing to noise such as static electricity.SOLUTION: The readout circuit is configured to hold opposite data in a first latch circuit and a second latch circuit in a readout period and to detect an anomaly in the data held by making use of an inversion of the data in the same direction owing to noise such as static electricity.
摘要翻译：要解决的问题：提供一种可以检测由于静电等噪声而保持的数据的反转的读出电路。解决方案：读出电路被配置为将第一锁存电路和第二锁存电路中的相反数据保存在读出并且由于诸如静电的噪声，通过利用数据在相同方向上的反转来检测所保持的数据中的异常。

3. 发明专利

JP2013077913A Oscillation device 审中-公开
标题翻译：振荡器件
公开(公告)号：JP2013077913A
公开(公告)日：2013-04-25
申请号：JP2011215469
申请日：2011-09-29
申请人： Seiko Instruments Inc , セイコーインスツル株式会社
发明人： MURATA MASAYA , MITANI MAKOTO , WATANABE KOTARO
IPC分类号： H03B5/32
摘要： PROBLEM TO BE SOLVED: To provide an oscillation device capable of stably oscillating by suppressing a variation of an oscillation frequency caused by a variation of a power supply voltage.SOLUTION: In the oscillation device, a drain of a NMOS transistor of an electrostatic protective circuit having an input terminal and an output terminal connected to a crystal oscillator is connect to a ground potential. A gate, a source, and a substrate are connected to the input and output terminals of the crystal oscillator. An electrostatic protective circuit is provided between the ground potential and a power supply. Thus, it is possible to stably oscillate by suppressing a variation of an oscillation frequency without changing a parasitic capacitance value of a crystal oscillation circuit caused by a variation of a power supply voltage.
摘要翻译：解决的问题：提供能够通过抑制由电源电压的变化引起的振荡频率的变化而能够稳定地振荡的振荡装置。解决方案：在振荡装置中，具有输入端子和连接到晶体振荡器的输出端子的静电保护电路的NMOS晶体管的漏极连接到地电位。栅极，源极和基板连接到晶体振荡器的输入和输出端子。在地电位和电源之间设有静电保护电路。因此，可以通过抑制振荡频率的变化而稳定地振荡，而不改变由电源电压的变化引起的晶体振荡电路的寄生电容值。版权所有（C）2013，JPO＆INPIT

4. 发明专利

JP2010198092A Constant current circuit 有权
标题翻译：恒流电流
公开(公告)号：JP2010198092A
公开(公告)日：2010-09-09
申请号：JP2009039335
申请日：2009-02-23
申请人： Seiko Instruments Inc , セイコーインスツル株式会社
发明人： MITANI MAKOTO , UTSUNOMIYA FUMIYASU
IPC分类号： G05F3/26 , H03F3/343
摘要： PROBLEM TO BE SOLVED: To provide a constant current circuit requiring no start circuit, and for reducing a circuit scale.
SOLUTION: A depletion type NMOS transistor ND1 whose gate and source are connected flows a start current for starting a constant current circuit to the gates of an NMOS transistor N2 and the NMO transistor NL3, thereby making it unnecessary to provide any start circuit for starting the constant current circuit to reduce the circuit scale of the constant current circuit.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供不需要启动电路的恒流电路，并且用于减小电路规模。解决方案：其栅极和源极连接的耗尽型NMOS晶体管ND1流过用于将恒定电流电路启动到NMOS晶体管N2和NMO晶体管NL3的栅极的起始电流，从而不需要提供任何启动电路用于启动恒流电路以减小恒流电路的电路规模。版权所有（C）2010，JPO＆INPIT

5. 发明专利

JP2009268208A Switching regulator 有权
标题翻译：开关稳压器
公开(公告)号：JP2009268208A
公开(公告)日：2009-11-12
申请号：JP2008112942
申请日：2008-04-23
申请人： Seiko Instruments Inc , セイコーインスツル株式会社
发明人： MITANI MAKOTO , TSUZAKI TOSHIYUKI
IPC分类号： H02M3/155
摘要： PROBLEM TO BE SOLVED: To provide a switching regulator which prevents a rush current immediately after the input of power supply.
SOLUTION: The switching regulator has: a power supply terminal 31, a grounding terminal 32, an input terminal 33, and an output terminal 34. The switching regulator further has: a battery 11; a switching transistor 12; a coil 13; a capacitor 14; a load 15; resistors 16, 17; a diode 18; a reference voltage circuit 19; a soft starting circuit 20; an error amplifier 21; a PWM control circuit 22; and a buffer 23. Even if an abnormal signal is inputted to the input terminal of the buffer 23 immediately after the input of the power supply, the buffer 23 outputs a high output voltage to turn off the switching transistor 12, so that a rush current is not caused to flow.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种在电源输入之后立即防止冲击电流的开关调节器。
解决方案：开关调节器具有：电源端子31，接地端子32，输入端子33和输出端子34.开关调节器还具有：电池11; 开关晶体管12; 线圈13; 电容器14; 一个负载15; 电阻16,17; 二极管18; 参考电压电路19; 软启动电路20; 误差放大器21; PWM控制电路22; 和缓冲器23.即使在输入电源之后立即将缓冲器23的输入端子输入异常信号，缓冲器23输出高输出电压，使开关晶体管12截止，从而使冲击电流不会流动。版权所有（C）2010，JPO＆INPIT

6. 发明专利

JP2013078082A Oscillator 有权
标题翻译：振荡器
公开(公告)号：JP2013078082A
公开(公告)日：2013-04-25
申请号：JP2011218244
申请日：2011-09-30
申请人： Seiko Instruments Inc , セイコーインスツル株式会社
发明人： MURATA MASAYA , WATANABE KOTARO , MITANI MAKOTO
IPC分类号： H03B5/32 , H03B5/04
CPC分类号： G05F1/567
摘要： PROBLEM TO BE SOLVED: To provide a constant voltage circuit capable of achieving low current consumption, and to provide a crystal oscillation circuit using the same.SOLUTION: When a constant voltage circuit 10 is provided with a temperature characteristics adjustment element, the difference between an inclination becoming negative for the temperature change of constant voltage and an inclination becoming negative for the temperature change of minimum oscillatory operation voltage in a crystal oscillation circuit 20 can be minimized. Consequently, current consumption of the crystal oscillation circuit 20 can be reduced, and when the constant voltage generated in the constant voltage circuit 10 is reduced, current consumption of the constant voltage circuit 10 can be reduced, and thereby current consumption of the entire oscillator 100 can be reduced.
摘要翻译：要解决的问题：提供一种能够实现低电流消耗的恒压电路，并提供使用该恒定电压的晶体振荡电路。解决方案：当恒压电路10设置有温度特性调节元件时，对于恒定电压的温度变化的倾斜变为负的斜率与对于最小振荡操作电压的温度变化的倾斜变为负可以使晶体振荡电路20最小化。因此，可以降低晶体振荡电路20的电流消耗，并且当恒压电路10中产生的恒定电压降低时，可以降低恒压电路10的电流消耗，从而整个振荡器100的电流消耗可以减少版权所有（C）2013，JPO＆INPIT

7. 发明专利

JP2013074749A Overcharge prevention circuit and semiconductor device 审中-公开
标题翻译：超大规模预防电路和半导体器件
公开(公告)号：JP2013074749A
公开(公告)日：2013-04-22
申请号：JP2011213020
申请日：2011-09-28
申请人： Seiko Instruments Inc , セイコーインスツル株式会社
发明人： MITANI MAKOTO , WATANABE KOTARO
IPC分类号： H02J7/35 , H01M10/44
CPC分类号： H02J7/00 , H02J7/0029 , H02J2007/0037 , Y02E10/566
摘要： PROBLEM TO BE SOLVED: To provide an overcharge prevention circuit, clamping a voltage value of power generation means in an overcharge state to be constant, capable of reducing the number of elements and preventing electric power from being wastefully consumed.SOLUTION: A gate is connected to a cathode of a counterflow prevention diode, a source is connected to an anode, a clamp transistor connected with a drain is provided at an overcharge prevention switch, and an electric current is discharged through the clamp transistor and the overcharge prevention switch in detecting overcharge, thereby to clamp a potential of power generation means to a voltage of substantial storage means.
摘要翻译：要解决的问题：为了提供一种过充电防止电路，将过充电状态下的发电装置的电压值钳制为恒定，能够减少元件的数量并防止电力被浪费地消耗。解决方案：栅极连接到防逆二极管的阴极，源极连接到阳极，在过充电保护开关处提供与漏极连接的钳位晶体管，并且电流通过钳位件放电晶体管和过充电防止开关检测过充电，从而将发电装置的电位钳位到实质的存储装置的电压。版权所有（C）2013，JPO＆INPIT

8. 发明专利

JP2014149896A Nonvolatile semiconductor memory device and semiconductor device 有权
标题翻译：非易失性半导体存储器件和半导体器件
公开(公告)号：JP2014149896A
公开(公告)日：2014-08-21
申请号：JP2013018757
申请日：2013-02-01
申请人： Seiko Instruments Inc , セイコーインスツル株式会社
发明人： MITANI MAKOTO , WATANABE KOTARO
IPC分类号： G11C29/14 , G11C29/00
CPC分类号： G11C29/028 , G11C7/1057 , G11C7/106 , G11C7/1066 , G11C7/222 , G11C29/021
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor nonvolatile memory device which creates a state after writing before writing data to the nonvolatile memory element, and can enhance accuracy of trimming, and the like.SOLUTION: A nonvolatile semiconductor memory device includes: a write data transmission circuit which transmits write data to a nonvolatile memory element; a first switch connected between the nonvolatile memory element and a data output terminal; a third switch connected to an output terminal of the write data transmission circuit; and a control circuit which controls each of the switches. The control circuit controls the switches so that only the first switch and the third switch are turned on when a test mode signal is input, and the write data is output to the data output terminal before the date is written to the nonvolatile memory element.
摘要翻译：要解决的问题：提供一种在向非易失性存储元件写入数据之前在写入之后产生状态并且可以提高修整精度等的半导体非易失性存储器件。解决方案：非易失性半导体存储器件包括：写入数据发送电路，其将写入数据发送到非易失性存储元件; 连接在所述非易失性存储元件和数据输出端子之间的第一开关; 连接到写数据传输电路的输出端的第三开关; 以及控制每个开关的控制电路。控制电路控制开关，使得只有第一开关和第三开关在测试模式信号被输入时被接通，并且写入数据在日期被写入到非易失性存储元件之前被输出到数据输出端。

9. 发明专利

JP2014142248A Constant voltage circuit and analog electronic timepiece 有权
标题翻译：恒定电压电路和模拟电子定时器
公开(公告)号：JP2014142248A
公开(公告)日：2014-08-07
申请号：JP2013010533
申请日：2013-01-23
申请人： Seiko Instruments Inc , セイコーインスツル株式会社
发明人： WATANABE KOTARO , MITANI MAKOTO
IPC分类号： G04C10/00
CPC分类号： G04G19/06 , G04C10/00 , G04G19/02
摘要： PROBLEM TO BE SOLVED: To provide a constant voltage circuit which performs stable operation with low current consumption, and to provide an analog electronic timepiece including the constant voltage circuit.SOLUTION: A constant voltage circuit includes: a differential amplifier circuit in which ON/OFF is switched by a predetermined signal and which controls voltage of a gate of an output transistor on the basis of a reference voltage and a feedback voltage to be input; a switch circuit connected to an output terminal of the differential amplifier circuit and made to be turned on/off by a predetermined signal; and a voltage holding circuit connected between the gate of the output transistor and a power supply terminal and including a resistor and a capacitor connected in series. An analog electronic timepiece includes the constant voltage circuit to supply voltage at least to an oscillation circuit and a frequency divider circuit.
摘要翻译：要解决的问题：提供一种以低电流消耗进行稳定运行的恒压电路，并提供包括恒压电路的模拟电子时钟。解决方案：恒压电路包括：差分放大电路，其中ON / OFF 基于参考电压和要输入的反馈电压来控制输出晶体管的栅极的电压; 开关电路，连接到所述差分放大器电路的输出端子并通过预定信号导通/截止; 以及电压保持电路，连接在输出晶体管的栅极和电源端子之间，并且包括串联连接的电阻器和电容器。模拟电子表包括至少向振荡电路和分频器电路提供电压的恒压电路。

10. 发明专利

JP2013195375A Analogue electronic timepiece 有权
标题翻译：模拟电子计时器
公开(公告)号：JP2013195375A
公开(公告)日：2013-09-30
申请号：JP2012065985
申请日：2012-03-22
申请人： Seiko Instruments Inc , セイコーインスツル株式会社
发明人： MITANI MAKOTO , WATANABE KOTARO
IPC分类号： G04C10/00 , G04C3/14 , G04G19/08
CPC分类号： G04G3/00 , G04G19/04
摘要： PROBLEM TO BE SOLVED: To provide an analogue electronic timepiece which does not malfunction in a crystal-oscillator circuit even when a battery voltage drops in a loaded state of a motor.SOLUTION: An analogue electronic timepiece includes: a crystal oscillator; an oscillation circuit; a divider circuit; an output control circuit for generating a drive pulse of an external motor; a constant voltage circuit; and a battery. The constant voltage circuit and the output control circuit are supplied with power from the battery, the oscillation circuit and the divider circuit are supplied with power from the constant voltage circuit, and the output of the constant voltage circuit can be switched to a first constant voltage and a second constant voltage. The first constant voltage is a voltage smaller in absolute value than the battery voltage, and the second constant voltage is a voltage lower than or equal to the battery voltage and is a voltage larger in absolute value than the first constant voltage. On normal oscillation time, a constant voltage is the first constant voltage, and switches the constant voltage to the second constant voltage in a period when the motor drive pulse is outputted.
摘要翻译：要解决的问题：提供即使在电动机的负载状态下电池电压下降的情况下也不会在晶体振荡器电路中发生故障的模拟电子钟表。解决方案：模拟电子钟表包括：晶体振荡器; 振荡电路; 分频电路; 输出控制电路，用于产生外部电动机的驱动脉冲; 恒压电路; 和电池。恒压电路和输出控制电路由电池供电，振荡电路和分频电路由恒压电路供电，恒压电路的输出可切换到第一恒压和第二恒定电压。第一恒定电压是绝对值比电池电压小的电压，第二恒定电压是低于或等于电池电压的电压，并且是绝对值大于第一恒定电压的电压。在正常振荡时间下，恒定电压是第一恒定电压，并且在输出电动机驱动脉冲的时段内将恒定电压切换到第二恒定电压。

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