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1. 发明专利

JP2003115560A SEMICONDUCTOR DEVICE, LAMINATED SEMICONDUCTOR DEVICE, MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD OF LAMINATED SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：JP2003115560A
公开(公告)日：2003-04-18
申请号：JP2002005836
申请日：2002-01-15
申请人： SONY CORP
发明人： KOIKE TOSHIHIKO , HONDA MANABU , KATO MASUO
IPC分类号： H01L23/12 , H01B1/22 , H01L21/56 , H01L23/31 , H01L23/498 , H01L25/065 , H01L25/10 , H01L25/11 , H01L25/18 , H05K1/09 , H05K3/40
摘要： PROBLEM TO BE SOLVED: To make thin a semiconductor device and a laminated semiconductor device. SOLUTION: A semiconductor device 1 is equipped with a substrate 2 having electrodes 7 and 8 for connecting substrates that are formed on both the front and back and are connected by a through hole 9, a semiconductor chip 3 where an electrode that is connected to a wiring pattern formed on the substrate is provided and a surface opposite to a surface where the electrode is formed is cut flat, a bump 4 for connecting substrates that is provided on the electrode for connecting substrates of the substrates and has a surface that is opposite to the substrate and is cut flat, and resin 5 for sealing that is provided on the substrate seals the semiconductor chip and the bump for connecting substrates, and at the same time, has the surface that is opposite to the substrate and is cut flat. In this case, a cutting plane 3a of the semiconductor chip, a cutting plane 4a of the bump for connecting the substrates, and a cutting plane 5a of the resin for sealing are made to be positioned in the same plane, and the semiconductor chip and the bump for connecting substrates are sealed in the resin for sealing those other than the cutting plane.

2. 发明专利

JP2001144218A SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURE 失效
公开(公告)号：JP2001144218A
公开(公告)日：2001-05-25
申请号：JP32740099
申请日：1999-11-17
申请人： SONY CORP
发明人： MURAYAMA TOSHIHIRO , KATO MASUO , TATENO YASUSHI
IPC分类号： H01L23/12 , H01L21/304 , H01L23/24 , H01L23/52 , H01L25/065 , H01L25/07 , H01L25/10 , H01L25/18
摘要： PROBLEM TO BE SOLVED: To obtain a semiconductor device having wiring for layer connection on the surface and rear of a substrate in which reliability of layer connection can be enhanced by designing the profile of wiring on the surface layer arbitrarily and a semiconductor element can be protected against damage. SOLUTION: The method for manufacturing a semiconductor device 1 comprises a step for mounting a semiconductor element 10 formed on the surface of a substrate 2', having wiring patterns 5, 6 connected through through holes 8 on the surface and rear where the thickness H of wiring on the surface is thicker than the thickness of wiring on the rear surface, upside down in a recess 9 shallower than the thickness of the semiconductor element 10, a step for sealing the semiconductor element in the recess with synthetic resin 11, and a step for grinding the substrate and the semiconductor element up to the surface wiring.

3. 发明专利

JP2000174163A MOUNTING SUBSTRATE AND MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2000174163A
公开(公告)日：2000-06-23
申请号：JP34758998
申请日：1998-12-07
申请人： SONY CORP
发明人： SAKURAI TSUTOMU , MURA MITSURU , KATO MASUO , SASAKI MASARU , TSURUMI MASAMI
IPC分类号： H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a highly reliable mounting substrate on which a semiconductor chip can be mounted surely and a semiconductor device manufacturing method. SOLUTION: Patterns 1 formed on a circuit board are formed in such a way that the front ends of the patterns 1 are extended into a chip mounting section 2 for mounting a semiconductor chip. The patterns 1 have extended patterns 4 the front ends of which are extended into the chip mounting section 2 and expanded patterns 5 having broad sections (protruded in the widthwise direction) at the front ends. The patterns 1 are formed in such a way that the patterns 4 and 5 are alternately arranged. In addition, the front ends of the patterns 4 are extended toward the center of the chip mounting section 2 in such a way that the patterns 4 are extended longer as going to the centers of the side sections of the section 2.

4. 发明专利

JP2004063622A Semiconductor device, laminated semiconductor device and manufacturing method thereof 审中-公开
公开(公告)号：JP2004063622A
公开(公告)日：2004-02-26
申请号：JP2002217782
申请日：2002-07-26
申请人： Sony Corp , ソニー株式会社
发明人： KATO MASUO
IPC分类号： H01L23/12 , H01L21/60
CPC分类号： H01L2224/73204
摘要： PROBLEM TO BE SOLVED: To prevent a semiconductor element from being destroyed in the case of flip chip bonding the semiconductor element made into a thin film, or in the case of making the semiconductor element into a thin film after flip chip bonding.
SOLUTION: For a semiconductor device 1, in the state of interposing adhesion resin 7 between a substrate 3 and the semiconductor element 4, the electrode 5 of the semiconductor element whose thickness is turned to 100 μm or less by cutting is connected to a wiring pattern 2 formed on the substrate by flip chip bonding. The thickness of the connection end of the wiring pattern, that is a part to connect the electrode of the semiconductor element, is 20 μm or less. By reducing the thickness of the part to connect the electrode of the wiring pattern, the thickness of the adhesion resin is reduced, the contraction force of the adhesion resin is reduced, and deformation stress relating to the semiconductor element made into the thin film by the contraction force of the adhesion resin is reduced.
COPYRIGHT: (C)2004,JPO

5. 发明专利

JP2000183237A SEMICONDUCTOR DEVICE, PRINTED WIRING BOARD, AND MANUFACTURE THEREOF 失效
公开(公告)号：JP2000183237A
公开(公告)日：2000-06-30
申请号：JP35160198
申请日：1998-12-10
申请人： SONY CORP
发明人： MURA MITSURU , KATO MASUO , SASAKI MASARU , TSURUMI MASAMI , SAKURAI TSUTOMU
IPC分类号： H01L23/28
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device of higher-density mounting by preventing an adhesive resin from spreading from around a semiconductor chip. SOLUTION: A prescribed wiring pattern 3 is formed on a printed wiring board 5. A groove part 6 for adhesive resin flow is formed near the mounting region of a semiconductor chip 1 in the wiring pattern 3. The groove part 6 comprises an extension part 8 which radially extends from the mounting region of the semiconductor chip, and a through-hole 7 which penetrates the printed wiring board 5 is formed at the bottom part of groove of the extension part 8. The semiconductor chip 1 is mounted on the wiring pattern 3 through a bump 2 of a protruding electrode. An insulating adhesive resin 4 is supplied to a region comprising a connection part between the bump 2 and the wiring pattern 3. The insulating adhesive resin 4 flows into the groove part 6 and the through-hole 7.

6. 发明专利

JPH0852952A PRINTING PLATE 失效
公开(公告)号：JPH0852952A
公开(公告)日：1996-02-27
申请号：JP19297694
申请日：1994-08-17
申请人： SONY CORP
发明人： KATO MASUO , TAKEDA WATARU
IPC分类号： B41N1/24 , H05K3/12 , H05K3/34
摘要： PURPOSE:To prevent the bleeding of solder paste (cream solder) when the solder paste is continuously printed on a print substrate by a metal screen and a squeezee. CONSTITUTION:The part of each of the edges 3a on the side of a print substrate 10 of the aperture parts 3 of a metal screen 1 is allowed to protrude by thick film plating to form an annular protruding part 4. The gap between each of the edges 3a of the aperture parts 3 of the metal screen 1 and the print substrate 10 is eliminated by the annular protruding part 4 and the bleeding of solder paste toward the print substrate at the time of repeated continuous printing is suppressed to the utmost.

7. 发明专利

JP2006140351A Circuit board, circuit board manufacturing method and semiconductor device 有权
标题翻译：电路板，电路板制造方法和半导体器件
公开(公告)号：JP2006140351A
公开(公告)日：2006-06-01
申请号：JP2004329447
申请日：2004-11-12
申请人： Sony Corp , ソニー株式会社
发明人： KATO MASUO , SUZUKI HIDETADA , OZAKI HIROTAKA
IPC分类号： H01L25/16
CPC分类号： H01L2224/16225 , H01L2924/18161
摘要： PROBLEM TO BE SOLVED: To access a plurality of laminated semiconductor devices on each predetermined group without complicating the circuit pattern of an electric wiring board.
SOLUTION: Almost the same circuit patterns 51 and 52 are printed to sides A and B of an electric wiring board 41, respectively. Semiconductor devices 21 and 22 are connected to these circuit patterns 51 and 52, respectively. The electric wiring board 41 to which the semiconductor devices 21 and 22 are connected is called a unit 31. A circuit board 1 is created by reflowing and laminating four units 31-34 to a main circuit board 12. When laminating the units 31-34, they are rotated at angles of 180° by a top view.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：在每个预定组上访问多个层叠半导体器件，而不会使电气布线板的电路图形复杂化。解决方案：几乎相同的电路图案51和52分别印刷到电气布线板41的侧面A和B. 半导体器件21和22分别连接到这些电路图案51和52。将半导体装置21,22连接的电气布线板41称为单元31.通过将四个单元31-34回流并层压到主电路板12而形成电路板1.当层叠单元31-34 ，它们以180°的角度旋转顶视图。版权所有（C）2006，JPO＆NCIPI

8. 发明专利

JP2006140198A Wiring board and semiconductor device using it 审中-公开
标题翻译：使用它的接线板和半导体器件
公开(公告)号：JP2006140198A
公开(公告)日：2006-06-01
申请号：JP2004326281
申请日：2004-11-10
申请人： Sony Corp , ソニー株式会社
发明人： SUZUKI HIDETADA , KATO MASUO , OZAKI HIROTAKA
IPC分类号： H01L25/18 , H01L23/12 , H01L25/065 , H01L25/07
CPC分类号： H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a wiring board which reduces a burden to a semiconductor chip and which can prevent the damage of the semiconductor chip and to provide a semiconductor device using it.
SOLUTION: A connection pad 14A of one surface and circuit wiring 13A are located so that it may not be made to counter with the connection pad 14B of another side surface and circuit wiring 13B.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种减少对半导体芯片的负担并且可以防止半导体芯片的损坏并提供使用它的半导体器件的布线板。解决方案：一个表面的连接焊盘14A和电路布线13A被定位成使得它不能与另一侧面的连接焊盘14B和电路布线13B相对。版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2006135091A Wiring board and semiconductor device using the same 审中-公开
标题翻译：使用相同的接线板和半导体器件
公开(公告)号：JP2006135091A
公开(公告)日：2006-05-25
申请号：JP2004322621
申请日：2004-11-05
申请人： Sony Corp , ソニー株式会社
发明人： OZAKI HIROTAKA , KATO MASUO , SUZUKI HIDETADA
IPC分类号： H01L21/60
CPC分类号： H01L2224/16225 , H01L2224/73204 , H01L2224/81 , H01L2224/83192
摘要： PROBLEM TO BE SOLVED: To provide a wiring board capable of preventing a semiconductor chip from being damaged by reducing the load on the semiconductor chip, and to provide a semiconductor device that uses the wiring board.
SOLUTION: A wiring pattern 13A having a connection pad 14 is arranged at a position corresponding to the bump of the semiconductor chip, and a wiring pattern 13B is arranged near the connection pad 14 that includes a region 12 where the semiconductor chip is packaged.
COPYRIGHT: (C)2006,JPO&NCIPI

10. 发明专利

JP2001284760A ELECTRONIC CIRCUIT DEVICE AND CONNECTION MEMBER 失效
公开(公告)号：JP2001284760A
公开(公告)日：2001-10-12
申请号：JP2000092519
申请日：2000-03-29
申请人： SONY CORP
发明人： IMAI YOSHIHIKO , MURAYAMA TOSHIHIRO , KATO MASUO , TATENO YASUSHI
IPC分类号： H05K1/11 , H05K1/14 , H01R12/16 , H01R12/18
摘要： PROBLEM TO BE SOLVED: To provide a thin electronic circuit device constituted of a plurality of circuit boards which can be separated without heating them. SOLUTION: In the electronic circuit device, terminal boards 23 and 24 at both ends of the circuit board 20 where electronic parts 30 and semiconductor chips 31 are mounted are inserted into the grooves 11 of connection members 10 by using the connection members 10 having connector structures and the circuit boards 20 are connected in vertically overlapped states.

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