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    • 4. 发明专利
    • ANALOG ARITHMETIC CIRCUIT FOR PARTIALLY DIFFERENTIAL EQUATION
    • JPH07146907A
    • 1995-06-06
    • JP29538493
    • 1993-11-25
    • SAKATA DENKI KKREIDEITSUKU KK
    • SAKATA FUMIO
    • G06G7/40
    • PURPOSE:To dynamically analyze the phenomenon which is described by the partially differential equation by using a resistance network. CONSTITUTION:This analog arithmetic circuit for the partially differential equation as to a partially differential equation of 2nd order is equipped with a Poisson circuit 11 which is connected to each intersection through a resistance R and a subtracting circuit 12 which subtracts a specific voltage from the voltage at the intersection and applies to the other end of the resistance connected to the intersection and a peripheral voltage is applied to the periphery of the resistance network. Further, this is an analog arithmetic circuit for a partially differential equation of 4th order constituted by adding a Laplace circuit, connecting the respective intersections of both the networks 11, and adding an arithmetic circuit. Consequently, the same result as a solution found by a differential method as one of numeric analyzing methods is obtained and the analysis can be taken extremely easily and fast.
    • 10. 发明专利
    • ANALOG ARITHMETIC CIRCUIT
    • JPH0877282A
    • 1996-03-22
    • JP21567794
    • 1994-09-09
    • RADIC KKSAKATA DENKI KK
    • SAKATA FUMIOENDO SHINICHI
    • G06G7/12H03M3/02
    • PURPOSE: To provide the inexpensive, high-performance analog arithmetic circuit which does not require highly precise components. CONSTITUTION: This circuit consists of a 1st 1-bit D/A converter 11 which receives a DC voltage as the denominator of correction arithmetic, a subtracter 12 which receives the output of the 1-bit D/A converter 11 and a reference voltage and performs subtraction, an integrator 13 which receives and integrates the output of the subtracter 12, a comparator 14 which receives the output of the integrator 13 and decides the polarity, and a 2nd 1-bit D/A converter 15 which receives a DC voltage as the numerator of the correction arithmetic; and the output of the comparator 14 is used as a switching signal for the 1st and 2nd 1-bit D/A converters 11 and 15. The output of the 2nd 1-bit D/A converter 15 is used as a correction arithmetic output. Therefore, there is no place to be adjusted, so good precision and superior stability are obtained and neither special components nor severe selecting operation is required.