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JP2014075557A Manufacturing method for semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：JP2014075557A
公开(公告)日：2014-04-24
申请号：JP2012223643
申请日：2012-10-05
申请人： Renesas Electronics Corp , ルネサスエレクトロニクス株式会社
发明人： MAEKAWA TAKASHI , MIHARA TATSUYOSHI
IPC分类号： H01L21/8234 , H01L27/088
CPC分类号： H01L21/823468 , H01L21/26513 , H01L21/266 , H01L21/31116 , H01L21/823418 , H01L21/823462 , H01L29/0615 , H01L29/36 , H01L29/66477 , H01L29/6653 , H01L29/66553 , Y10S257/90 , Y10S438/90
摘要： PROBLEM TO BE SOLVED: To improve performance and reliability of a semiconductor device.SOLUTION: After an insulating film IL6 and other insulating film are sequentially formed on a semiconductor substrate SUB so as to cover gate electrodes GE1, GE2, and GE3, a sidewall spacer SW1 is formed on a side surface IL6a of the insulating film IL6 by etching back the other insulating film. The sidewall spacer SW1 on the side surface IL6a of the insulating film IL6 corresponding to the side walls of the gate electrodes GE1 and GE2 is removed, and the sidewall spacer SW1 on the side surface IL6a of the insulating film IL6 corresponding to the side wall of the gate electrode GE3 remains. Thereafter, the sidewall spacer SW1 and the insulating film IL6 are etched back, and the sidewall spacer made of the insulating film IL6 is formed on the side walls of the gate electrodes GE1, GE2, and GE3. The width of the sidewall spacers on the side walls of the gate electrodes GE1 and GE2 is smaller than the width of the sidewall spacer on the side wall of the gate electrode GE3.
摘要翻译：要解决的问题：提高半导体器件的性能和可靠性。解决方案：在绝缘膜IL6和其它绝缘膜依次形成在半导体衬底SUB上以覆盖栅电极GE1，GE2和GE3之后，侧壁间隔物通过蚀刻另一绝缘膜，在绝缘膜IL6的侧表面IL6a上形成SW1。除去与栅电极GE1，GE2的侧壁对应的绝缘膜IL6的侧面IL6a上的侧壁间隔物SW1，与绝缘膜IL6的侧壁对应的绝缘膜IL6的侧面IL6a上的侧壁间隔物SW1 栅电极GE3残留。此后，侧壁间隔物SW1和绝缘膜IL6被回蚀刻，并且由绝缘膜IL6制成的侧壁间隔物形成在栅电极GE1，GE2和GE3的侧壁上。栅电极GE1和GE2的侧壁上的侧壁间隔物的宽度小于栅电极GE3的侧壁上的侧壁间隔物的宽度。

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