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1. 发明专利

JP2009010767A Encoder and decoder, and transmission apparatus and reception apparatus 有权
标题翻译：编码器和解码器，以及传输装置和接收装置
公开(公告)号：JP2009010767A
公开(公告)日：2009-01-15
申请号：JP2007171094
申请日：2007-06-28
申请人： Nippon Hoso Kyokai , Sony Corp , ソニー株式会社 , 日本放送協会
发明人： YOKOGAWA MINESHI , YAMAMOTO MAKIKO , SHINTANI OSAMU , NAKANE MISA , OKADA SATOSHI , HASHIMOTO AKINORI , SUZUKI YOICHI , SHIYOUGEN KAZUYOSHI , TANAKA YOSHIJI , SUJIKAI HISASHI , KIMURA TAKESHI , KOJIMA MASAAKI
IPC分类号： H03M13/19
CPC分类号： H03M13/1185 , H03M13/1102 , H03M13/1165 , H03M13/152 , H03M13/255 , H03M13/2707 , H03M13/2906 , H03M13/6356
摘要： PROBLEM TO BE SOLVED: To provide an encoder and decoder for performing LDPC (low density parity check) encoding/decoding optimal for a slot structure, and a transmission apparatus and a reception apparatus, in a transmission system for multiplexing, in a time division manner, a plurality of kinds of digital modulation systems. SOLUTION: Encoders 11-1, 11-2 perform LDPC encoding on predetermined data using a specific check matrix. The specific check matrix is generated by disposing one element of a partial matrix corresponding to an information length N-P corresponding to an encoding rate in a cycle for the unit of 374 columns in a column direction with a predetermined check matrix initial value table as an initial value. The check matrix initial value table is predetermined for each encoding rate of 11/40, 41/120, 49/120, 61/120, 73/120, 27/40, 89/120, 97/120, 101/120, 7/8, 109/120 with the identical code length N. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种编码器和解码器，用于在用于多路复用的传输系统中执行针对时隙结构的LDPC（低密度奇偶校验）编码/解码以及发送装置和接收装置，在时分方式，多种数字调制系统。解决方案：编码器11-1,11-2使用特定的校验矩阵对预定数据执行LDPC编码。特定的校验矩阵是通过将预定的校验矩阵初始值表作为初始值的列方向的374列的单位的循环中的与编码率相对应的信息长度NP对应的部分矩阵的一个元素。校验矩阵初始值表对于11 / 40,41 / 120,49 / 120,61 / 120,73 / 120,27 / 40,89 / 120,97 / 120,101 / 120,7的每个编码率是预先确定的 / 8,109/120，代码长度N相同。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2009081821A Transmitter, receiver, and transmitting method 有权
标题翻译：发射机，接收机和发射方法
公开(公告)号：JP2009081821A
公开(公告)日：2009-04-16
申请号：JP2007252889
申请日：2007-09-28
申请人： Nippon Hoso Kyokai , Sony Corp , ソニー株式会社 , 日本放送協会
发明人： HASHIMOTO AKINORI , SUZUKI YOICHI , SHIYOUGEN KAZUYOSHI , TANAKA YOSHIJI , SUJIKAI HISASHI , KIMURA TAKESHI , KOJIMA MASAAKI , YAMAMOTO MAKIKO , YOKOGAWA MINESHI , FUTAMI TETSUHIRO , MATSUMOTO HIDEYUKI , IKEDA TAMOTSU
IPC分类号： H03M13/25 , H03M13/19 , H04L1/00 , H04L27/00 , H04L27/34
摘要： PROBLEM TO BE SOLVED: To prevent degradation of transmission characteristics by arranging signal points most suitably for each error correction code. SOLUTION: An LDPC (Low Density Parity Check) coding section 11-1 carries out error correction coding by using an LDPC code such that its coding rate is a specific value such as 27/40. The LDPC code is subjected to, e.g., 16 APSK modulation or 32 APSK modulation and transmitted. The signal points of the 16 and 32 APSK modulation are arranged in positions most suitable for the LDPC code of each coding rate. The invention can be applied to, e.g., a BS digital broadcast system. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：通过最适合于每个纠错码布置信号点来防止传输特性的劣化。解决方案：LDPC（低密度奇偶校验）编码部分11-1通过使用LDPC码进行纠错编码，使得其编码率是诸如27/40的特定值。对LDPC码进行例如16 APSK调制或32 APSK调制并发送。 16和32 APSK调制的信号点被布置在最适合于每个编码率的LDPC码的位置。本发明可以应用于例如BS数字广播系统。版权所有（C）2009，JPO＆INPIT

3. 发明专利

JP2012114527A Data processing apparatus and data processing method 有权
标题翻译：数据处理设备和数据处理方法
公开(公告)号：JP2012114527A
公开(公告)日：2012-06-14
申请号：JP2010259665
申请日：2010-11-22
申请人： Sony Corp , ソニー株式会社
发明人： SHINTANI OSAMU , YOKOGAWA MINESHI , LACHLAN BRUCE MICHAEL
IPC分类号： H03M13/29 , H04L1/00
CPC分类号： H04L1/004 , H03M13/1102 , H03M13/152 , H03M13/253 , H03M13/255 , H03M13/618 , H03M13/6362 , H03M13/6552 , H04L1/0043 , H04L1/0052 , H04L1/0057 , H04L1/0065 , H04L1/0068 , H04L1/0072
摘要： PROBLEM TO BE SOLVED: To facilitate processing of control data with an improved PAPR.SOLUTION: In a transmission apparatus, a padder 21 pads control data necessary for demodulation with dummy data of zero, and a scrambler 101 scrambles the control data with the padding (padded control data). A replacement section 121 replaces the scrambled dummy data in the scrambled, padded control data with the dummy data, and a BCH encoder 22 and an LDPC encoder 23 apply BCH coding and LDPC coding as error correction coding to the replacement data resulting from the replacement. A shortening section 24 applies shortening, including deletion of the dummy data included in the LDPC code and puncturing of parity bits of the LDPC code. The present invention is applicable, for example, to the transmission of error-correction-coded control data.
摘要翻译：要解决的问题：为了便于利用改进的PAPR处理控制数据。解决方案：在发送装置中，填充器21用零的伪数据填充解调所需的控制数据，并且加扰器101用填充（填充的控制数据）对控制数据进行加扰。替换部分121用伪数据替换经加扰的填充的控制数据中的加密伪数据，并且BCH编码器22和LDPC编码器23将BCH编码和LDPC编码作为纠错编码应用于由替换产生的替换数据。缩短部分24应用缩短，包括删除包括在LDPC码中的伪数据和对LDPC码的奇偶校验位的删余。本发明可以应用于例如错误校正编码控制数据的发送。版权所有（C）2012，JPO＆INPIT

4. 发明专利

JP2012095063A Decoding apparatus and method, and program 有权
标题翻译：解码设备和方法，程序
公开(公告)号：JP2012095063A
公开(公告)日：2012-05-17
申请号：JP2010240242
申请日：2010-10-27
申请人： Sony Corp , ソニー株式会社
发明人： YOKOGAWA MINESHI , NAKADA YUTAKA , IKETANI RYOJI
IPC分类号： H03M13/19
CPC分类号： H03M13/1105 , H03M13/11 , H03M13/1102 , H03M13/1128 , H03M13/3753 , H03M13/65 , H03M13/6552 , H03M13/6555
摘要： PROBLEM TO BE SOLVED: To increase the accuracy of decoding by implementing iterative decoding ensuring a uniform iteration count.SOLUTION: An LDPC code word segmentation section 51 segments input data into single code words of LDPC decoding and outputs them to a memory 53. The memory 53 is instructed by a control section 52 to output the code words one by one to an LDPC decoding section 54. The control section 52 calculates a decoding time per code word determined by the number of code words per unit time, and controls the memory 53 such that the memory 53 outputs the code words at the time intervals. The time set by the control section 52 is the same for every code word included in one unit time, so that an iteration count of decoding in the LDPC decoding section 54 is also the same. The invention can be applied to a reception apparatus for receiving a digital broadcast wave.
摘要翻译：要解决的问题：通过实现迭代解码来提高解码的准确性，确保均匀的迭代次数。解码：LDPC码字分割部分51将输入数据分解成LDPC解码的单个码字，并将它们输出到存储器53.存储器53由控制部分52指示以逐个输出到一个 LDPC解码部分54.控制部分52计算由每单位时间的码字数确定的每个码字的解码时间，并且控制存储器53，使得存储器53以时间间隔输出码字。由控制部52设定的时间对于包含在一个单位时间内的每个码字是相同的，因此LDPC解码部54中的解码的迭代次数也相同。本发明可以应用于接收数字广播波的接收装置。版权所有（C）2012，JPO＆INPIT

5. 发明专利

JP2012015688A Data processing device and data processing method 审中-公开
标题翻译：数据处理设备和数据处理方法
公开(公告)号：JP2012015688A
公开(公告)日：2012-01-19
申请号：JP2010148688
申请日：2010-06-30
申请人： Sony Corp , ソニー株式会社
发明人： SHINOHARA YUJI , YAMAMOTO MAKIKO , YOKOGAWA MINESHI
IPC分类号： H03M13/19
CPC分类号： H03M13/036 , H03M13/1165 , H03M13/152 , H03M13/255 , H03M13/2707 , H03M13/271 , H03M13/356 , H03M13/6552
摘要： PROBLEM TO BE SOLVED: To enhance durability to errors.SOLUTION: LDPC codes having a code length of 4320 bits are written in a column direction of a memory 31, and read out in a row direction. A code bit of 2, 4 or 6 bits read out from the memory 31 is set as 1 symbol, and mapped at signal points of 2, 2or 2. A column twist interleaver performs column twist interleave of changing the writing start position for writing code bits in the column direction of the memory 31 every column of the memory 31 as rearrangement processing of rearranging the code bits of the LDPC code so that plural code bits corresponding to 1 on any raw of an inspection matrix of the LDPC code are not contained in 1 symbol. The present invention is applicable for transmitting the LDPC code.
摘要翻译：要解决的问题：提高对错误的耐久性。解码方法：将码长4320位的LDPC码写入存储器31的列方向，并沿行方向读出。将从存储器31读出的2,4或6位的码位设置为1个符号，并在2 2 ，2 4 或2 6 。列扭转交织器执行列扭转交错，用于改变写入开始位置，用于在存储器31的每一列的存储器31的列方向上写入码位，作为重新排列LDPC码的码位的重排处理，使得对应的多个码位对于LDPC码的检查矩阵的任何原始码，不包含在1个符号中。本发明适用于发送LDPC码。版权所有（C）2012，JPO＆INPIT

6. 发明专利

JP2012015687A Data processing device and data processing method 审中-公开
标题翻译：数据处理设备和数据处理方法
公开(公告)号：JP2012015687A
公开(公告)日：2012-01-19
申请号：JP2010148687
申请日：2010-06-30
申请人： Sony Corp , ソニー株式会社
发明人： SHINOHARA YUJI , YAMAMOTO MAKIKO , SAKAI RUI , YOKOGAWA MINESHI
IPC分类号： H03M13/19
CPC分类号： H03M13/036 , H03M13/1165 , H03M13/152 , H03M13/255 , H03M13/2707 , H03M13/271 , H03M13/356
摘要： PROBLEM TO BE SOLVED: To enhance durability to data errors.SOLUTION: An LDPC encoder 115 performs encoding based on any LDPC code which has an encoding length of 4320 bits and has one of seven encoding rates of 1/4, 1/3, 5/12, 1/2, 7/12, 2/3 and 3/4. Elements of 1 of an information matrix determined by an inspection matrix initial value table which represents the positions of the elements of 1 of the information matrix corresponding to the information length corresponding to the encoding length and the encoding rate every 60 columns are arranged at a period of every 60 columns in a column direction to thereby construct an inspection matrix H of the LDPC code. The inspection matrix initial value table is set for digital broadcasting for portable terminals. The present invention is applicable for performing LDPC coding.
摘要翻译：要解决的问题：提高数据错误的耐久性。解码：LDPC编码器115基于具有4320比特的编码长度的任何LDPC码进行编码，并且具有1/4，1/3,5/12，1/2，7 / 12，2/3和3/4。由表示每60列对应于与编码长度对应的信息长度和编码率对应的信息矩阵的信息矩阵的1的元素的位置的检查矩阵初始值表确定的信息矩阵的1的元素被布置在周期每列60列的列方向，从而构成LDPC码的检查矩阵H. 为便携式终端的数字广播设定检查矩阵初始值表。本发明适用于执行LDPC编码。版权所有（C）2012，JPO＆INPIT

7. 发明专利

JP2012010213A Reception device, reception method and reception system 有权
标题翻译：接收装置，接收方法和接收系统
公开(公告)号：JP2012010213A
公开(公告)日：2012-01-12
申请号：JP2010145804
申请日：2010-06-28
申请人： Sony Corp , ソニー株式会社
发明人： YOKOGAWA MINESHI , SAKAI HITOSHI , MATTHEW TAYLOR
IPC分类号： H04J11/00
CPC分类号： H04L25/0232 , H04L5/0007 , H04L5/0048 , H04L25/0226 , H04L27/2647
摘要： PROBLEM TO BE SOLVED: To prevent the prediction accuracy of transmission path characteristics from being degraded.SOLUTION: A filter center control unit 111 filters transmission path characteristic data which is a predicted value on transmission path characteristics with respect to the transmission symbol of a P2 pilot signal included in a P2 symbol with a built-in interpolation filter while adjusting the center position of the filter to calculate frequency direction interpolation characteristic data which is interpolated in the frequency direction, and performs distortion correction of the transmission symbol of an L1pre included in the P2 symbol by using the frequency direction interpolation characteristic data to calculate the signal quality of the transmission symbol of the L1pre after the distortion correction. Then, the filter center control unit 111 calculates an optimum position which is a filtering position achieving the best signal quality to perform control so that the center position of the filter in an interpolation filter 39 (relatively) matches the optimum position. The present invention can be applied to, for example, a reception device receiving an OFDM signal and the like.
摘要翻译：要解决的问题：为了防止传输路径特性的预测精度降低。滤波器中心控制单元111滤波传输路径特性数据，该传输路径特性数据是通过内置插值滤波器在包含在P2符号中的P2导频信号的传输路径特性上的预测值，同时调节滤波器的中心位置，用于计算频率插值的频率插值特征数据，并使用频率方向插值特征数据对频率方向插值特性数据进行包含在P2符号中的L1pre的发送符号的畸变校正，以计算信号质量的失真校正后的L1pre的发送符号。然后，滤波器中心控制单元111计算作为实现最佳信号质量的滤波位置的最佳位置，以进行控制，使得内插滤波器39（相对）中的滤波器的中心位置与最佳位置匹配。本发明可以应用于例如接收OFDM信号的接收装置等。版权所有（C）2012，JPO＆INPIT

8. 发明专利

JP2011182073A Data processing apparatus, and data processing method 审中-公开
标题翻译：数据处理设备和数据处理方法
公开(公告)号：JP2011182073A
公开(公告)日：2011-09-15
申请号：JP2010042416
申请日：2010-02-26
申请人： Sony Corp , ソニー株式会社
发明人： SAKAI RUI , YAMAMOTO MAKIKO , YOKOGAWA MINESHI
IPC分类号： H03M13/19
摘要： PROBLEM TO BE SOLVED: To raise resistance to an error of data such as LDPC (Low Density Parity Check) code. SOLUTION: A demultiplexer 25 performs replacement, when a code bit of 6×2 bit, and i+1-th bit from the highest order bit of the 6×2 bit of two continuous symbols are considered as bit b#1 and y#1, respectively, according to an assignment rule for assigning the code bit of an LDPC code whose code length N is 64,800 bits, and an encoding ratio is 1/4, and which is specified to the standard of DVB-T.2 to a symbol bit showing a symbol for assigning, for example, b0 to y11, b1 to y10, b2 to y5, b3 to y4, b4 to y2, b5 to y6, b6 to y3, b7 to y8, b8 to y7, b9 to y1, b10 to y9, b11 to y0, respectively. The present invention is applicable, for example, to a transmission system which transmits the LDPC code etc. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提高对诸如LDPC（低密度奇偶校验）码的数据的误差的抵抗。解决方案：当来自两个连续符号的6×2位的最高位的6×2位的码位和第i + 1位被解码为位b＃1时，解复用器25执行替换和y＃1，根据用于分配码长N为64,800位的LDPC码的码位的分配规则，编码率为1/4，并且被指定为DVB-T的标准。 2表示用于分配例如b0至y11，b1至y10，b2至y5，b3至y4，b4至y2，b5至y6，b6至y3，b7至y8，b8至y7的符号的符号位， b9〜y1，b10〜y9，b11〜y0。本发明例如适用于传输LDPC码等的传输系统。（C）2011，JPO＆INPIT

9. 发明专利

JP2010283554A Receiving device and method, program, and receiving system 有权
标题翻译：接收设备和方法，程序和接收系统
公开(公告)号：JP2010283554A
公开(公告)日：2010-12-16
申请号：JP2009134666
申请日：2009-06-04
申请人： Sony Corp , ソニー株式会社
发明人： HOCHI TAKU , YOSHIMOCHI NAOKI , OKAMOTO TAKUYA , GOTO TOMONORI , YOKOGAWA MINESHI
IPC分类号： H04J11/00 , H04B7/06 , H04J99/00
CPC分类号： H04L27/2662 , H04L5/0023 , H04L5/0048 , H04L25/0204 , H04L25/0226 , H04L25/0232 , H04L25/03159 , H04L27/2649 , H04L27/2675 , H04L2025/03414 , H04L2025/03426
摘要： PROBLEM TO BE SOLVED: To efficiently demodulate a signal sent out by MISO (Multiple Input, Single Output). SOLUTION: A time interpolation unit 84 performs time interpolation using an extracted Sum Pilot signal to generate a time-interpolated SP (Scattered Pilot) (Sum). A symbol synchronization unit 85 performs IFFT processing using only the time-interpolated SP(Sum) including the Sum Pilot signal to obtain two transmission line profiles indicating two transmission line characteristics. The symbol synchronization unit 85 calculates a trigger position of an optimal FFT arithmetic operation from the obtained two transmission line profiles and supplies information on the trigger position to an FFT unit 82. The present invention can be applied to a receiver that receives signals transmitted from a plurality of transmitters by one antenna. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：有效地解调由MISO发送的信号（多输入，单输出）。解决方案：时间插值单元84使用提取的Sum导频信号来执行时间插值，以产生时间插值的SP（分散导频）（Sum）。符号同步单元85仅使用包括和导频信号的时间内插的SP（Sum）来执行IFFT处理，以获得指示两个传输线特性的两个传输线路轮廓。符号同步单元85从所获得的两个传输线简档中计算最佳FFT运算的触发位置，并将关于触发位置的信息提供给FFT单元82.本发明可以应用于接收从一个多个发射机由一个天线。版权所有（C）2011，JPO＆INPIT

10. 发明专利

JP2010087747A Information processing apparatus and method, display apparatus, and program 有权
标题翻译：信息处理装置和方法，显示装置和程序
公开(公告)号：JP2010087747A
公开(公告)日：2010-04-15
申请号：JP2008253296
申请日：2008-09-30
申请人： Sony Corp , ソニー株式会社
发明人： HATTORI MASAYUKI , YOKOGAWA MINESHI , KAWAUCHI TOSHIKI , KAMATA HIROYUKI , IKETANI RYOJI
IPC分类号： H04J11/00
CPC分类号： H04L27/2656 , H04L27/2665
摘要： PROBLEM TO BE SOLVED: To suppress an increase in a circuit scale without deteriorating the reception quality of demodulation data, in an OFDM (Orthogonal Frequency Division Multiplexing) receiving apparatus for receiving an OFDM signal.
SOLUTION: An FFT (First Fourier Transform) circuit is employed for only one of demodulation FFT sections 106 for executing FFT in a demodulation FFT window. The difference calculation block 1021 of a control FFT section 111 calculates difference data between: a signal out of the section of the demodulation FFT window and within the section of the control FFT window and separated from a signal within the section of the demodulation FFT window and out of the section of the control FFT window by effective symbol length; and the latter signal. The difference processing block 1021 outputs a frequency signal to be obtained by performing the FFT to the difference data. An addition block 1022 adds the output signal of the demodulation FFT processing section 106 to the frequency signal. The output signal of an FFT result in the demodulation FFT window having the same frequency as that of the signal obtained by performing DFT is added. The invention is applicable, for example, to the OFDM receiving apparatus.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：在用于接收OFDM信号的OFDM（正交频分复用）接收装置中，抑制电路规模的增加而不降低解调数据的接收质量。解决方案：在解调FFT窗口中仅对解调FFT部分106中的一个执行FFT执行FFT（第一傅里叶变换）电路。控制FFT部分111的差分计算块1021计算解调FFT窗口的部分之间的信号和控制FFT窗口的部分之间的差分数据，并且与解调FFT窗口的部分内的信号分离;以及通过有效符号长度在控制FFT窗口的部分之外; 和后一个信号。差异处理块1021将通过对差数据执行FFT获得的频率信号输出。加法块1022将解调FFT处理部分106的输出信号加到频率信号上。 FFT的输出信号产生与通过执行DFT获得的信号频率相同的解调FFT窗口。本发明例如适用于OFDM接收装置。版权所有（C）2010，JPO＆INPIT

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