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1. 发明专利

JPS6151944A Package for semiconductor ic device 失效
标题翻译：半导体IC器件封装
公开(公告)号：JPS6151944A
公开(公告)日：1986-03-14
申请号：JP17473784
申请日：1984-08-22
申请人： Nec Corp , Nippon Telegr & Teleph Corp
发明人： ASHIDA SHIGEAKI , NODA YUJI , OBARA MAMORU , KIKUCHI HIROYUKI
IPC分类号： H01L23/02 , H01L21/60 , H01L23/66
CPC分类号： H01L23/66 , H01L2224/48 , H01L2224/48091 , H01L2224/48237 , H01L2224/49 , H01L2224/49171 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/3011 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PURPOSE:To reduce the impendance of the electrical connection means by a method wherein the mount surface is provided with a continuous projection which surrounds a chip, and the chip is bonded to each of package lead extensions provided on the mount surface outside the projection. CONSTITUTION:Bonding pads 6 and 4 of the same potential on the chip 1 are connected to the package lead extensions 19 and 20 with bonding wires 13 and 16, respectively. The projection 18 surrounding the chip 1 is provided on the surface where each electrode of the mount part 2 is present, and set to such as suitable level that solder does not flow out of the projection at the mount part and does not block bonding work. Besides, the electrical bonding between package leads 21 and 22 and between 23 and 24 is made dense by providing package lead extensions 19 and 20 made of metallic film. This reduces the DC and high- frequency impedance between the bonding pad 4 or 6 and the mount part 2.
摘要翻译：目的：通过一种方法来减小电连接装置的阻抗，其中安装表面设置有围绕芯片的连续突起，并且芯片被接合到设置在突出部外部的安装表面上的每个封装引线延伸部。构成：芯片1上具有相同电位的接合焊盘6和4分别用接合线13和16连接到封装引线延伸部19和20。围绕芯片1的突起18设置在安装部2的每个电极存在的表面上，并且被设置为使得焊料不会从安装部分处的突起流出并且不阻挡接合作业的适当水平。此外，通过提供由金属膜制成的封装引线延伸部19和20，封装引线21和22以及23和24之间的电接合变得致密。这降低了接合焊盘4或6与安装部件2之间的直流和高频阻抗。

2. 发明专利

JPH06169033A METHOD FOR MOUNTING SEMICONDUCTOR CHIPS 失效
公开(公告)号：JPH06169033A
公开(公告)日：1994-06-14
申请号：JP31955492
申请日：1992-11-30
申请人： NEC CORP
发明人： NODA YUJI
IPC分类号： H01L21/66 , H01L23/29 , H01L23/31 , H05K1/18 , H05K3/32
摘要： PURPOSE:To make safe testing of the electrical characteristics possible and also to realize high density mounting with good moisture resistance in the method of directly mounting semiconductor chips on a printed circuit board. CONSTITUTION:After covering a semiconductor chip 1, an interconnection terminal part 22, and a bonding wire 3 with a first resin 19, electrical tests are conducted by contacting the probes to electrical testing parts 21 that are exposed outside the first resin 19, and the final sealing is done by covering the first resin 19 and the electrical testing parts 21 with a second resin 29.

3. 发明专利

JPH02165649A PROBE CARD 失效
公开(公告)号：JPH02165649A
公开(公告)日：1990-06-26
申请号：JP32245488
申请日：1988-12-20
申请人： NEC CORP
发明人： NODA YUJI
IPC分类号： G01R31/26 , G01R1/073 , H01L21/66
摘要： PURPOSE:To prevent damage of a probe needle by a pin for marking during position adjustment of the pin for marking and marking work by providing an opening for marking at a position different from the opening for position adjustment. CONSTITUTION:A probe card has an opening 13 for marking which is opened at a position different from an opening 12 for position adjustment that is opened in conformity with the position of a probe needle 15. Accordingly, an electrical characteristics test is done in such a method that the probe needle 15 is brought into contact with a semiconductor pellet located at the position of the opening for position adjustment and then electrical characteristic test is done so as to sort good semiconductor pellets from defective semiconductor pellets. At the same time, the position on a semiconductor wafer is stored in a memory, and when a defective semiconductor pellet comes to the position of the opening 13 for marking, a scratch to show that it is defective pellet is made by a pin 16 for marking. Hereby, the damage of the probe needle 15 can be prevented by the pin 16 for marking during marking work.

4. 发明专利

JPS61136325A Moving body communication system 失效
标题翻译：移动身体通信系统
公开(公告)号：JPS61136325A
公开(公告)日：1986-06-24
申请号：JP25825284
申请日：1984-12-06
申请人： Nec Corp
发明人： NODA YUJI
IPC分类号： H04B1/56 , H04B1/54
CPC分类号： H04B1/54
摘要： PURPOSE:To prevent a transmitter and a receiver from being operated simultaneously, by radiating alternately an electromagnetic wave from one of radio communication equipments, between said equipments provided with a transmitter and a receiver, and setting its switching frequency to a signal frequency or above. CONSTITUTION:In case an electromagnetic wave is radiated from a radio communication equipment 31 and a radio communication equipment 41 receives it, a transmitter 32 of the equipment 31 is operated and a receiver 33 stops the operation for the time of 1/2fs when an electromagnetic wave of the frequency f4 is being radiated. At the same time, a receiver 43 of the equipment 41 is operated and receives the electromagnetic wave of the frequency f4, and a transmitter 42 stops an operation. In the same way, when the transmitter 42 is operated and an electromagnetic wave of a frequency f5 is radiated, the transmitter 32 stops an operation. Also, a frequency fs for switching the electromagnetic wave f4 and f5 is set to above a signal frequency of a data or a voice, etc. to be sent out. Accordingly, it does not occur that the equipme4nt 31 and 41 radiate simultaneously the electromagnetic wave, and the function for reducing a mutual influence in case the transmitter and the receiver are operated simultaneously is made unnecessary.
摘要翻译：目的：为了防止发射机和接收机同时工作，通过在设置有发射机和接收机的所述设备之间交替地辐射来自无线电通信设备之一的电磁波，并将其开关频率设置为信号频率或以上。构成：在无线电通信设备31发射电磁波并且无线电通信设备41接收到电磁波的情况下，设备31的发射机32被操作，当电磁波的时间为1 / 2fs时，接收机33停止操作频率f4的波被辐射。同时，操作设备41的接收器43并接收频率f4的电磁波，并且发送器42停止操作。以相同的方式，当发射机42被操作并且频率f5的电磁波被辐射时，发射器32停止操作。此外，用于切换电磁波f4和f5的频率fs被设置为高于要发送的数据或语音等的信号频率。因此，不会发生装置31和41同时辐射电磁波，并且在发送器和接收器同时操作的情况下减少相互影响的功能是不必要的。

5. 发明专利

JP2000156564A PRINTED WIRING BOARD AND PRODUCTION THEREOF 失效
公开(公告)号：JP2000156564A
公开(公告)日：2000-06-06
申请号：JP33178798
申请日：1998-11-20
申请人： NEC CORP
发明人： NODA YUJI
IPC分类号： H05K1/02 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To bond a conductor wiring film and an insulating resin layer with high strength while patterning the wiring finely by forming a build-up wiring part only in a specified region of a printed wiring board. SOLUTION: After a conductor wiring layer 102 is formed on a core wiring board 101, an insulating resin layer 103 is applied thereon and then unnecessary part thereof is removed in developing process. Subsequently, a conductor wiring film 105 is formed using a sputtering mask opened at a part for depositing the conductor wiring film 105 and then the sputtering mask is removed. Thereafter, photoresist 106 is applied on the entire surface and subjected to anisotropic dry etching to form conductor wiring 109 thus forming build-up wiring 107 only in a required part. According to the method, the conductor wiring and the photo via can be patterned finely and the conductor wiring layer 102 and the an insulating resin layer 103 can be bonded with high strength.

6. 发明专利

JPH11233531A STRUCTURE AND METHOD FOR PACKAGING ELECTRONIC PART 失效
公开(公告)号：JPH11233531A
公开(公告)日：1999-08-27
申请号：JP4997798
申请日：1998-02-17
申请人： NEC CORP
发明人： NODA YUJI
IPC分类号： H01L23/28 , H01L21/52 , H01L21/60 , H01L23/12 , H01L23/31
摘要： PROBLEM TO BE SOLVED: To provide a structure and a method for packaging an electronic part which reduces manufacturing costs and having no influence on the number of a mounted electronic part such as semiconductor chip or on increasing the density of built-up wirings by preventing the flow of mounting resin by a comparatively easy method. SOLUTION: In a packaging technology for an electronic part in which an electronic part 103 such as a semiconductor chip or the like is mounted on a substrate through mounting resin 108, and the electrode of the electronic part 103 is connected to the wire bonding electrode 207 of the substrate with a thin metal wire 104, a frame 230 for the mounting resin for preventing the mounting resin 108 from flowing is formed between an electronic part mounting portion 111 on the substrate and the wire bonding electrode 207.

7. 发明专利

JPH11150351A MOUNTING STRUCTURE AND METHOD OF MOUNTING PART 失效
公开(公告)号：JPH11150351A
公开(公告)日：1999-06-02
申请号：JP31724497
申请日：1997-11-18
申请人： NEC CORP
发明人： NODA YUJI
IPC分类号： H01L21/60 , H05K1/18 , H05K3/32
摘要： PROBLEM TO BE SOLVED: To restrain a connection failure from occurring between a printed board and a mounting part due to a thermal expansion coefficient difference between them and to easily replace a part mounted on a printed board with another. SOLUTION: A board-side electrode 2a is formed on the surface of a printed board 2, and a part-side electrode 3a connected to the board-side electrode 2a is formed on a chip-size package 3. The printed board 2 and the chip-size package 3 are bonded together with adhesive agent making the board-side electrode 2a and the part-side electrode 3a pinch a metal fine wire 6 between them.

8. 发明专利

JPH09321439A LAMINATION CIRCUIT BOARD 失效
公开(公告)号：JPH09321439A
公开(公告)日：1997-12-12
申请号：JP13927696
申请日：1996-05-31
申请人： NEC CORP
发明人： NODA YUJI
IPC分类号： H05K1/02 , H01L25/065 , H05K1/18 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a compact and light lamination circuit board which realize easy manufacturing operation. SOLUTION: Since cut-out holes 21, 22, 31, 32 for preventing interference with mounted components 41, 42, 51, 52 on adjacent boards are formed for laminating printed boards 10, 20, 30, the thickness does not increase when they are laminated. Furthermore, since bumps are formed in parts to be connected by continuity in the printed circuits between adjacent boards to hold anisotropic conductive film 60, 70 therebetween, it makes continuity in only bum parts during thermo-compression. Since sealing resin is applied to a circumferential edge of the semiconductor chips 41, 42, 51, 52 alone, an application amount thereof can be reduced, thus realizing miniaturization.

9. 发明专利

JPH07122320A HEAT SEAL CONNECTOR 失效
公开(公告)号：JPH07122320A
公开(公告)日：1995-05-12
申请号：JP26387493
申请日：1993-10-21
申请人： NEC CORP
发明人： OKONOGI ISAO , NODA YUJI
IPC分类号： H01R11/01
摘要： PURPOSE:To avoid a mounting forbidden band, simplify the shape of wiring, and prevent performance deterioration. CONSTITUTION:A second conductive layer 7 serving as a leading circuit is wired on the back side of a base film 10 (the opposite side of a first conductive layer 4). A press-bonding part 1 is covered with graphite material with high migration resistance in place of a cover film of the second conductive layer 7. In a portion, where there is no overlap with the first conductive layer 4, of the press-bonding part 1 and the region of the second conductive layer 7 in a press-bonding part 2, a through hole 11 is installed in the base film 10 and covered through the second conductive layer 7.

10. 发明专利

JPS6286821A SEMICONDUCTOR MANUFACTURING EQUIPMENT 失效
公开(公告)号：JPS6286821A
公开(公告)日：1987-04-21
申请号：JP22809685
申请日：1985-10-14
申请人： NEC CORP
发明人： NODA YUJI
IPC分类号： G03F1/00 , G03F1/76 , H01L21/027 , H01L21/30
摘要： PURPOSE:To form several kinds of pellets on one wafer by using plural masks and by selecting a combination of the selection of a mask the driving method of the wafer. CONSTITUTION:A mask controller 21 selects specific one mask among plural masks 11-14 supported by a susceptor 61 and switches to an optical system for copying and exposure. For the exposure, a required mask is selected among the masks installed on the susceptor 61 by rotating the susceptor 61 a required angle with the controller 21. By selecting a combination of selecting the masks and the driving method of a wafer, the arrangement of pellets on the wafer can be changed. This enables forming several kinds of the pellets on one wafer.

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