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1. 发明专利

JP2005062111A Wiring connection inspection device and wiring connection inspection method 有权
标题翻译：接线连接检查装置和接线连接检查方法
公开(公告)号：JP2005062111A
公开(公告)日：2005-03-10
申请号：JP2003295748
申请日：2003-08-20
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ITAKURA SHOTARO , ISHIKAWA YUICHI , TANAKA KAZUTO , TERAI KATSUMI
IPC分类号： G01R31/28
摘要： PROBLEM TO BE SOLVED: To provide a wiring connection inspection device and a wiring connection inspection method, capable of inspecting easily and accurately both the connection state between a plurality of integrated circuits in actual operation and the connection state at the generation time of a mounting failure in the market. SOLUTION: A digital signal and an error detection signal (1), generated based on the digital signal by an operation device (1)102, are outputted from an integrated circuit (1)101, and the signals are inputted into an integrated circuit (2)107 via each board bonding part, from 103 to 108 and from 104 to 109. An error detection signal (2) is generated based on the inputted digital signal by an operation device (2)110 and is compared with the error detection signal (1) by a comparison device 111. When both signals always agree with each other, it is determined that a connection failure between the integrated circuits does not exist, and when a disagreement in timing exists, it is determined that a connection failure exists. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了提供一种布线连接检查装置和布线连接检查方法，能够容易且准确地检查实际操作中的多个集成电路之间的连接状态和发电时的连接状态在市场上出现了失败。解决方案：从集成电路（1）101输出基于操作装置（1）102的数字信号产生的数字信号和误差检测信号（1），并将信号输入到集成电路（2）107经由每个板结合部分，从103到108和104到109.基于由操作装置（2）110输入的数字信号产生错误检测信号（2），并与错误检测信号（1）。当两个信号总是彼此一致时，确定不存在集成电路之间的连接故障，并且当定时存在不一致时，确定连接存在故障版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2004120050A Block distortion detecting apparatus 审中-公开
公开(公告)号：JP2004120050A
公开(公告)日：2004-04-15
申请号：JP2002277009
申请日：2002-09-24
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ISHIKAWA YUICHI
IPC分类号： H04N19/60 , H04N19/423 , H04N19/44 , H04N19/80 , H04N19/86 , H04N7/30
摘要： PROBLEM TO BE SOLVED: To provide an apparatus capable of improving the image quality by making a distorted part of a video signal including distortion caused by digital compression inconspicuous.
SOLUTION: The apparatus delays an input video signal subjected to encoding and decoding processing for each block in horizontal and vertical directions of pixels and performs calculation between the input video signal and the delayed video signal for each pixel so as to detect a block distortion border and a block distortion frequency depending on the arrangement and the size of differences between the pixel values. Further, an adder for adding the detected block distortion frequency signals calculates the block distortion frequency.
COPYRIGHT: (C)2004,JPO

3. 发明专利

JP2003032512A Video signal contour corrector 有权
标题翻译：视频信号轮廓校正器
公开(公告)号：JP2003032512A
公开(公告)日：2003-01-31
申请号：JP2002134453
申请日：2002-05-09
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ISHIKAWA YUICHI , SHINBA MITSUAKI
IPC分类号： H04N5/208
摘要： PROBLEM TO BE SOLVED: To provide a gradation corrector which purposes to prevent reflected noises or the collapse of the gradation performance in a gradation part.
SOLUTION: The gradation corrector controls a correction value adaptively according to the gradient of a video signal, senses reflected noises, suppresses noises, sharpens the edge of a large amplitude without a deterioration in image quality, and improves the space frequency of a video signal.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：提供一种灰度校正器，其用于防止灰度部分中的反射噪声或灰度等级性能的崩溃。解决方案：灰度校正器根据视频信号的梯度自适应地控制校正值，感测反射的噪声，抑制噪声，锐化大幅度的边缘而不会降低图像质量，并且提高视频信号的空间频率。

4. 发明专利

JP2004266431A Display 审中-公开
公开(公告)号：JP2004266431A
公开(公告)日：2004-09-24
申请号：JP2003052836
申请日：2003-02-28
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： HIROHATA SHIGEKI , NIO HIROSHI , ISHIKAWA YUICHI
IPC分类号： H04N5/208 , G09G5/00 , G09G5/36
摘要： PROBLEM TO BE SOLVED: To solve the problem that a contour correction processing taken for cross line noise enhances the cross line noise to deteriorate display quality.
SOLUTION: The cross line noise is detected, but the contour correction processing is not applied to pixels where the cross line noise is detected. This avoids deteriorating the display quality due to the cross line noise. To detect the cross line noise exactly, a low-pass filter is inserted in the input, and the contour correction is adaptively applied to such pixels having a low luminance or a little luminance change, apt to be remarkable about the noise.
COPYRIGHT: (C)2004,JPO&NCIPI

5. 发明专利

JP2005012642A Video signal processing apparatus 审中-公开
标题翻译：视频信号处理设备
公开(公告)号：JP2005012642A
公开(公告)日：2005-01-13
申请号：JP2003176466
申请日：2003-06-20
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ISHIKAWA YUICHI , HIROHATA SHIGEKI
IPC分类号： H04N5/208
摘要： PROBLEM TO BE SOLVED: To solve the problem that resolution which is actually perceived is damaged occasionally by doubly applying an enhancer to an intersection of horizontal and vertical directions as illustrated, since horizontal, vertical, oblique or two-dimensional filtering is individually performed and all the results are added.
SOLUTION: A picture pattern is detected two-dimensionally to select a plurality of filters, and a filtered signal which is processed by each of the filters is added to a video signal, so that the contour of the video signal is enhanced by an optimal contour enhancement filter which is selected from the picture pattern.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：为了解决实际感知到的分辨率偶尔会因水平和垂直方向的交叉而施加增强器而被损坏的问题，因为水平，垂直，倾斜或二维滤波是单独的执行，并添加所有结果。解决方案：二维地检测图像图案以选择多个滤波器，并且由每个滤波器处理的滤波信号被添加到视频信号，使得视频信号的轮廓通过从图像图案中选择的最佳轮廓增强滤波器。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2002374538A Video signal processing circuit 审中-公开
标题翻译：视频信号处理电路
公开(公告)号：JP2002374538A
公开(公告)日：2002-12-26
申请号：JP2002104109
申请日：2002-04-05
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ITAKURA SHOTARO , NIO HIROSHI , OKUMURA NAOJI , ISHIKAWA YUICHI
IPC分类号： H04N9/44
摘要： PROBLEM TO BE SOLVED: To enable a television receiver to share one memory in a three- dimensional Y/C separation employing a burst lock clock and a scanning line interpolation processing employing a line lock clock as a system clock.
SOLUTION: The difference between the number of the burst lock clocks and the number of the line lock clocks for one horizontal period is calculated. Phase correction is applied to a video signal on the basis of the difference. Thus, the three-dimensional Y/C separation can be conducted by using the line lock clock to share the memory in common.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：为了使电视接收机能够以使用脉冲串锁定时钟的三维Y / C分离和采用线路锁定时钟作为系统时钟的扫描线内插处理共享一个存储器。解决方案：计算突发锁定时钟数与一个水平周期的线路锁定时钟数之间的差异。基于差异将相位校正应用于视频信号。因此，三维Y / C分离可以通过使用线锁时钟共同共享存储器来进行。

7. 发明专利

JP2002190966A IMAGE QUALITY IMPROVING APPARATUS 失效
公开(公告)号：JP2002190966A
公开(公告)日：2002-07-05
申请号：JP2000390076
申请日：2000-12-22
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： ISHIKAWA YUICHI , NIO HIROSHI
IPC分类号： H04N5/208
摘要： PROBLEM TO BE SOLVED: To create high-frequency component for a dulled image without high- frequency component. SOLUTION: An image quality improving apparatus a takes out frequency component from the image and reduces it at a certain pixel as a center, and adds these components to create an image having a high-frequency component which has not been contained in the original image to improve the image quality.

8. 发明专利

JP2002101365A VIDEO SIGNAL PROCESSOR 失效
公开(公告)号：JP2002101365A
公开(公告)日：2002-04-05
申请号：JP2000290373
申请日：2000-09-25
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TERAI KATSUMI , NIO HIROSHI , ISHIKAWA YUICHI
IPC分类号： H04N5/14 , G09G5/00 , G09G5/36 , H04N3/23 , H04N5/66
摘要： PROBLEM TO BE SOLVED: To correct video distortion in a video display device. SOLUTION: The video distortion is corrected in the video display device by using a storing means 1, an interpolating means 2 and a controlling means 5 and changing a filter characteristic at the time when a compression/extension operation is performed by digital signal processing in accordance with a compression/extension ratio.

9. 发明专利

JP2002032052A PLASMA DISPLAY DEVICE 失效
公开(公告)号：JP2002032052A
公开(公告)日：2002-01-31
申请号：JP2001138542
申请日：2001-05-09
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KASAHARA MITSUHIRO , ISHIKAWA YUICHI , MORITA TOMOKO
IPC分类号： G09G3/28 , G09G3/20 , G09G3/288 , G09G3/291 , G09G3/294 , G09G3/296 , G09G3/30 , G09G3/32 , H04N5/57
摘要： PROBLEM TO BE SOLVED: To improve accuracy in the automatic control of power consumption in a luminescent display device such as plasma display device, electroluminescent display device, light emitting diode display device. SOLUTION: This picture display device is provided with integration circuits 11 to 13 which integrate respectively input video signals R, G, B of a prescribed period and output respective averaged levels of the signals R, G, B, multiplying circuits 14 to 16 which multiplies parameters KR, KG, KB which are obtained when respective colors of R, G, B are monochromically displayed based on power consumption ratio and the area ratio of phosphor to respective average levels of the signals R, G, B, an adding circuit 17 which calculates the prediction signal of power consumption by adding output signals from these multiplying circuits 14 to 16 and a controller 18 which inputs the prediction signal of power consumption and outputs a control signal controlling the emitted light quantity (luminance) per a unit area in accordance with the value of the signal.

10. 发明专利

JP2000181400A DISPLAY DEVICE 失效
公开(公告)号：JP2000181400A
公开(公告)日：2000-06-30
申请号：JP35444898
申请日：1998-12-14
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KASAHARA MITSUHIRO , ISHIKAWA YUICHI , MORITA TOMOKO , KAWACHI MAKOTO , MASUMORI TADAYUKI , WAKITANI TAKAO , WAKAHARA TOSHIO , HACHIMAN AKIRA
IPC分类号： G09G3/20 , G02F1/133 , G09G3/28 , G09G3/282 , G09G3/288 , G09G3/291 , G09G3/293 , G09G3/294 , G09G3/296
摘要： PROBLEM TO BE SOLVED: To surely execute writing discharge in respective sub-fields by widening the writing pulse widths at all gradation levels relating to the sub- fields where time delays are liable to occur in the writing discharge. SOLUTION: A video signal sub-field corresponding device 4 receives a sub- field number Z and a weighting multiple N and converts the 8-bit signal sent from an A/D converter 2 to a Z-bit signal. A sub-field unit pulse number setter 6 receives the number Z of the sub-fields and the weighting multiple N and specifies the necessary weighting and the number of the necessary maintaining pulses in the respective sub-fields. A writing pulse width setter 8 imparts the writing pulses of the pulse width widened with respect to the sub-fields selected to satisfy the specified conditions. In such a case, a drive pulse controllers makes the width of the writing pulses wider than usual with respect to the sub-fields where a writing defect is liable to occur.

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