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1. 发明专利

JP2013098771A High frequency switch 有权
标题翻译：高频开关
公开(公告)号：JP2013098771A
公开(公告)日：2013-05-20
申请号：JP2011240263
申请日：2011-11-01
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： KOMARU RYUTA , NAKAHARA KAZUHIKO , YAMANAKA KOJI , OTSUKA HIROSHI , NAKAYAMA MASATOSHI
IPC分类号： H01P1/15
摘要： PROBLEM TO BE SOLVED: To provide a high frequency switch which does not require a high withstand voltage transistor when the transmission with a high withstanding power characteristic is necessary, and is effective for loss reduction when the reception with a low loss characteristic is necessary.SOLUTION: A transistor 2a is connected in series between input/output terminals 1a and 1b. A series circuit consisting of a high-frequency line 3a and a transistor 2b is shunt-connected between the transistor 2a and the input/output terminal 1b. A high-frequency line 3b is connected in series between input/output terminals 1a and 1c. A transistor 2c is shunt-connected between the high-frequency line 3b and the input/output terminal 1c. All transistors 2a-2c are turned on during the transmission. The power resistance of high-frequency switches is not dependent on the breakdown voltage of transistors and hence a high withstand voltage transistor is not required. All transistors 2a-2c are turned off during the reception. There is no on-state transistor on a passage route of input signal and hence loss reduction of passage loss is achieved during the reception.
摘要翻译：要解决的问题：提供一种当需要具有高耐受功率特性的传输时不需要高耐压晶体管的高频开关，并且当低损耗特性的接收为必要。解决方案：晶体管2a串联连接在输入/输出端子1a和1b之间。由高频线3a和晶体管2b构成的串联电路在晶体管2a和输入输出端子1b之间分流连接。高频线3b串联连接在输入/输出端子1a和1c之间。晶体管2c在高频线3b和输入/输出端子1c之间分流连接。所有晶体管2a-2c在透射期间导通。高频开关的电源电阻不依赖于晶体管的击穿电压，因此不需要高耐压晶体管。在接收期间，所有晶体管2a-2c被截止。在输入信号的通路上没有通态晶体管，因此在接收期间实现了通道损耗的减少。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP2012109713A BIAS CIRCUIT 审中-公开
公开(公告)号：JP2012109713A
公开(公告)日：2012-06-07
申请号：JP2010255738
申请日：2010-11-16
申请人： MITSUBISHI ELECTRIC CORP
发明人： YAMANAKA KOJI , KUWATA EIGO , YAMAUCHI KAZUHISA , NAKAHARA KAZUHIKO , CHAGI SHIN
IPC分类号： H03F1/52 , H03F3/193
摘要： PROBLEM TO BE SOLVED: To provide a bias circuit that protects a receiving transistor against damage from excessive input in a simple configuration and shortens time for recovery to a steady state operation after the resolution of the excessive input.SOLUTION: The bias circuit for use with a receiving amplifier is so constructed that a resistor is connected in series between a drain electrode of a field effect transistor and a drain bias terminal, at least two resistors are connected in series between the drain electrode and a gate bias terminal, and a junction connecting two of the two or more series-connected resistors is connected to a gate electrode.

3. 发明专利

JP2009252794A High-frequency module 审中-公开
标题翻译：高频模块
公开(公告)号：JP2009252794A
公开(公告)日：2009-10-29
申请号：JP2008095154
申请日：2008-04-01
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： HATAMOTO MIKIO , NAKAHARA KAZUHIKO
IPC分类号： H01L23/02
摘要： PROBLEM TO BE SOLVED: To overcome the problem of a microwave amplifier with an extra harmonic suppression circuit that when part of electromagnetic wave is radiated from the output end of the microwave amplifier into a module housing space, the radiated wave propagates in waveguide mode and is coupled to the joint with a module output connector thus causing leakage of harmonics.
SOLUTION: A disk-like cavity resonator 30 is constituted by forming a disk-like cut 11 having a radius substantially equal to a quarter of wavelength of a harmonic and centering at the inner conductor 9 of a coaxial connector 20 in a module housing 3, and fixing a metal plate 10 to the cut 11. Harmonics are reflected into a module by the cavity resonator 30.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了克服具有额外谐波抑制电路的微波放大器的问题，当电磁波的一部分从微波放大器的输出端辐射到模块容纳空间中时，辐射波在波导中传播模式，并与模块输出连接器联接，从而引起谐波泄漏。解决方案：盘形空腔谐振器30通过形成具有基本上等于谐波波长的四分之一的半径的盘状切口11并且在模块中的同轴连接器20的内部导体9处居中壳体3，并将金属板10固定到切割部11.谐振器通过腔谐振器30反射到模块中。版权所有（C）2010，JPO＆INPIT

4. 发明专利

JP2008311859A High-frequency switch 有权
标题翻译：高频开关
公开(公告)号：JP2008311859A
公开(公告)日：2008-12-25
申请号：JP2007156555
申请日：2007-06-13
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： HANYA MASAKI , NISHINO TAMOTSU , MIYAZAKI MORIYASU , NAKAHARA KAZUHIKO , ENDO KUNIHIRO , YAMAGUCHI MAMIKO
IPC分类号： H01P1/15 , H03K17/10 , H03K17/693
摘要： PROBLEM TO BE SOLVED: To provide a high-frequency switch which makes a low loss at the time of reception and obtains a high-frequency characteristic of a high power durability at the time of transmission, without increasing the gate width of a switching element.
SOLUTION: The high-frequency switch comprises: a first high-frequency line 3a connected between an input terminal 1 and a first output terminal 2a; a second high-frequency line 3b with its one end connected to the first output terminal; a third high-frequency line 3c connected between the input terminal 1 and a second output terminal 2b; a first switching element 4a connected between the other end of the second high-frequency line 3b and a first ground terminal 5a; and a second switching element 4b connected between the second output terminal 2b and a second ground terminal 5b.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供在接收时具有低损耗的高频开关，并且在传输时获得高功率耐久性的高频特性，而不增加一个开关元件解决方案：高频开关包括：连接在输入端子1和第一输出端子2a之间的第一高频线路3a; 第二高频线3b，其一端连接到第一输出端; 连接在输入端子1和第二输出端子2b之间的第三高频线路3c; 连接在第二高频线3b的另一端和第一接地端子5a之间的第一开关元件4a; 以及连接在第二输出端子2b和第二接地端子5b之间的第二开关元件4b。版权所有（C）2009，JPO＆INPIT

5. 发明专利

JP2008277336A Semiconductor package 审中-公开
标题翻译：半导体封装
公开(公告)号：JP2008277336A
公开(公告)日：2008-11-13
申请号：JP2007115761
申请日：2007-04-25
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： NAKAHARA KAZUHIKO , INAMI KAZUYOSHI
IPC分类号： H01L23/12 , H01L23/02
摘要： PROBLEM TO BE SOLVED: To obtain a package structure which can control an unnecessary resonance frequency without taking account of the nonreflection conditions of a resistor or an electric wave absorber. SOLUTION: Unnecessary resonance waves are suppressed by arranging a convex conductor rod 7 having a length equal to a quarter of a wavelength of an unnecessary resonance wave 5 and a convex conductor rod 8 having a length equal to a quarter of a wavelength of the other unnecessary resonance wave 6 in the vertical direction from a lid 2 toward an MIC substrate 3 at the peak position of the electric field of each corresponding unnecessary resonance wave. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了获得可以控制不必要的共振频率而不考虑电阻器或电波吸收器的不反射条件的封装结构。解决方案：通过布置长度等于不必要的共振波5的波长的四分之一的凸形导体棒7和长度等于波长的四分之一的凸形导体棒8来抑制不必要的谐振波。在每个相应的不必要的共振波的电场的峰值位置处从盖2朝向MIC基板3的垂直方向上的另一个不必要的共振波6。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2008005128A Microwave amplifier 有权
标题翻译：微波放大器
公开(公告)号：JP2008005128A
公开(公告)日：2008-01-10
申请号：JP2006171454
申请日：2006-06-21
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： OTSUKA HIROSHI , YUGAWA HIDENORI , NAKAYAMA MASATOSHI , NAKAHARA KAZUHIKO , ENDO KUNIHIRO
IPC分类号： H03F3/60 , H03F1/26 , H03F1/42
摘要： PROBLEM TO BE SOLVED: To obtain a microwave amplifier wherein a bias circuit has small loss over a wide band and which has excellent noise characteristics.
SOLUTION: The microwave amplifier is provided with a field-effect transistor 1 whose gate is connected to an input terminal 2 and whose drain is connected to an output terminal 3, and the bias circuit 4 connected to a signal line connecting the input terminal 2 and output terminal 3, and the bias circuit 4 includes a 1/4-wavelength transmission line 41 having one end connected to the signal line, a 1/4-wavelength open stub 42 connected to the other end of the 1/4-wavelength transmission line 41, a resistor 43 connected to the other end of the 1/4-wavelength transmission line 41, a 1/4-wavelength transmission line 46 having one end connected to the resistor 43, and a capacitor 44 which has one end connected to the other end of the 1/4-wavelength transmission line 46 and the other end grounded.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：解决的问题：为了获得微波放大器，其中偏置电路在宽带上具有小的损耗并且具有优异的噪声特性。
解决方案：微波放大器设置有场效应晶体管1，其栅极连接到输入端子2，其漏极连接到输出端子3，偏置电路4连接到连接输入端的信号线端子2和输出端子3，并且偏置电路4包括一端连接到信号线的1/4波长传输线41，1/4波长的开路短截线42连接到1/4的另一端波长传输线41，连接到1/4波长传输线41的另一端的电阻器43，一端连接到电阻器43的1/4波长传输线46和具有一个电阻器的电容器44 端连接到1/4波长传输线46的另一端，另一端接地。版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2007251264A Phase adjustment circuit, and matching circuit 有权
标题翻译：相位调整电路和匹配电路
公开(公告)号：JP2007251264A
公开(公告)日：2007-09-27
申请号：JP2006068058
申请日：2006-03-13
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： NAKAHARA KAZUHIKO
IPC分类号： H01P5/02
摘要： PROBLEM TO BE SOLVED: To provide a phase adjustment circuit and a matching circuit, wherein a phase adjustment range and an impedance matching range are sufficiently secured and an increase in a scale of an apparatus is suppressed.
SOLUTION: The phase adjustment circuit is provided with: a 1/4 wavelength coupling line 3 with a length of about 1/4 of a wavelength equivalent to a designed center frequency; an open stub connected to the other end of one line configuring the 1/4 wavelength coupling line 3 wherein the one end of the one line is used for an input terminal 1; and an open stub connected to the other end of another line configuring the 1/4 wavelength coupling line 3 wherein the one end of the another line is used for an output terminal, wherein the stub length of each open stub is properly adjusted in response to the designed center frequency.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种相位调整电路和匹配电路，其中充分确保了相位调节范围和阻抗匹配范围，并且抑制了设备规模的增加。解决方案：相位调整电路设有：1/4波长耦合线3，其长度约等于设计中心频率的波长的1/4; 连接到配置1/4波长耦合线3的一条线的另一端的开路短路，其中一条线的一端用于输入端1; 以及连接到构成1/4波长耦合线3的另一条线的另一端的开路短路，其中另一条线的一端用于输出端子，其中每个开路短截线的短截线长度根据设计中心频率。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2004282241A Multistage amplifier 有权
公开(公告)号：JP2004282241A
公开(公告)日：2004-10-07
申请号：JP2003068523
申请日：2003-03-13
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： SUGAYA KAZUNORI , INAMI KAZUYOSHI , NAKAHARA KAZUHIKO
IPC分类号： H03F3/60 , H03F1/52 , H03F3/68
摘要： PROBLEM TO BE SOLVED: To solve problems of the conventional multistage amplifier that a fluctuated output takes place in the amplifier caused by a fluctuation in the bias level of a drain (gate) due to leakage, of a pulse applied to a gate (drain) of each FET (field effect transistor), to a drain (gate) bias of an adjacent FET when the multistage amplifier is pulse-driven and the FET is damaged due to an overcurrent flowing to the FET when level variations in the bias due to the leaked pulse are excessive.
SOLUTION: A pulse shut-off circuit 7 comprising two capacitors 13, 14 connected in series and a resistor 15 whose one terminal is connected to a transmission path between the two capacitors 13, 14 and whose other terminal is connected to ground is configured in an inter-stage matching circuit 12 for the FETs 1, 2 in multi-stage connection to shut off a pulse component of the bias.
COPYRIGHT: (C)2005,JPO&NCIPI

9. 发明专利

JP2002246802A SEMICONDUCTOR SWITCH AND PHASE SHIFT CIRCUIT AND ATTENUATOR 失效
公开(公告)号：JP2002246802A
公开(公告)日：2002-08-30
申请号：JP2001035455
申请日：2001-02-13
申请人： MITSUBISHI ELECTRIC CORP
发明人： NAKAHARA KAZUHIKO , MIYAGUCHI KENICHI , HIEDA MORISHIGE , TAKAGI SUNAO , IYAMA YOSHITADA , NAKAAZE HIROAKI
IPC分类号： H01P1/15 , H01P1/18 , H01P1/22 , H03K17/00
摘要： PROBLEM TO BE SOLVED: To provide a compact semiconductor switch whose isolation is high capable of using the on/off operation of a semiconductor element for switching. SOLUTION: This semiconductor switch is provided with a semiconductor element which is turned into an on-resistance state or off-capacity state by performing its on operation or off operation based on a control signal from an outside part between a main line and ground, a capacitive element serially connected to the ground side electrode of the semiconductor element, and a high resistance connected in parallel with the capacitive element.

10. 发明专利

JP2002076844A PHASE SHIFT CIRCUIT AND PHASE SHIFTER 失效
公开(公告)号：JP2002076844A
公开(公告)日：2002-03-15
申请号：JP2001049293
申请日：2001-02-23
申请人： MITSUBISHI ELECTRIC CORP
发明人： MIYAGUCHI KENICHI , HIEDA MORISHIGE , NAKAHARA KAZUHIKO , TAKAGI SUNAO , TANIGUCHI EIJI , IYAMA YOSHITADA , KASAHARA MICHIAKI
IPC分类号： H01P1/185 , H03H7/20 , H03H11/20
摘要： PROBLEM TO BE SOLVED: To solve a problem of a conventional phase shift circuit that has caused mismatching due to the effect of a sub line and inter-base capacitance resulting in deteriorating its reflection characteristic when the longer sub line is configured. SOLUTION: In the phase shift circuit provided with a FET 5 that is placed between an input terminal 2 and an output terminal 3 and ON/OFF-switched in response to a control signal and with the sub line 4b connected in parallel between an input electrode and an output electrode of the FET 5, a capacitive element is connected between at least either of the input electrode and the output electrode of the FET 5 and ground.

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