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1. 发明专利

JPH01293555A ELECTRONIC COMPONENT 失效
公开(公告)号：JPH01293555A
公开(公告)日：1989-11-27
申请号：JP12381488
申请日：1988-05-23
申请人： HITACHI LTD , HITACHI TOBU SEMICONDUCTOR LTD
发明人： WATANABE NORIHIDE , AKEYAMA KENJI
IPC分类号： H01L25/18 , H01L25/00 , H01L25/04 , H05K1/18
摘要： PURPOSE:To obtain an electronic component with a safety function for scarcely decoding a program software and protecting the profit of the software by mounting a SRAM chip or the like in the bottom of the cavity of a circuit board, covering it with a sealer, and connecting the interconnection layer of a power source circuit including a backup battery to the board through a leaf spring. CONSTITUTION:Mounting components such as a microcomputer chip 4 mounted on a circuit board 17, a SRAM chip 3, a random logic IC chip 2, etc., and an electronic component associated with a program software having a power source circuit including the backup battery 14 of the chip 3 are formed in a structure in which the chips 2 to 4 are mounted in the bottom of the cavity 16 of the board 17 of a multilayer structure, so covered with a sealer 7 as not to be visually observed for its interconnecting state, the power source circuit is composed of interconnection layers 21, 25 provided over the front and rear faces of a ceramic board 22, and a ground interconnection layer 23 is superposed on the layer 25 through an insulating film 24 at least on one side face, and the layer 21 is so composed as to be electrically connected to the board 17 through a connecting terminal 20 of a leaf spring.

2. 发明专利

JPS58216449A Semiconductor device and substrate used for assembling therefor 失效
标题翻译：用于组装的半导体器件和衬底
公开(公告)号：JPS58216449A
公开(公告)日：1983-12-16
申请号：JP9782182
申请日：1982-06-09
申请人： Hitachi Ltd , Hitachi Tobu Semiconductor Ltd
发明人： HAGIWARA YOSHIMI , TANAKA NOBUKATSU , AKEYAMA KENJI , YOSHIHARA NORIO
IPC分类号： H01L23/48 , H01L23/28 , H01L23/31 , H01L23/495
CPC分类号： H01L23/49562 , H01L23/3135 , H01L2224/48 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/181 , H01L2924/00014 , H01L2924/00012 , H01L2924/00
摘要： PURPOSE:To reduce the number of manufacturing steps and the cost of a product by hardly flowing out undercoating resin from an undercoated region which is formed with a groove extending in an endless shape. CONSTITUTION:After a semiconductor element 14 is secured onto the semiconductor element mounting region 2 of a header 5, the prescribed electrodes of the element 14 are connected via wirings 15 to the inner ends of the leads 8 at both sides, and the element 14 is covered with undercoating resin 16. Since a sharp corner which is produced due to the flowout of resin is not present at the peripheral edge of an undercoated region 4 in this case, the resin does not flow out. After the resin 16 is then hardened, a resin molding region 17 is molded with epoxy resin, and the prescribed part is covered with a resin package 18. Thereafter, unnecessary frame 11 and dam 12 are cut and removed, and a semiconductor device 19 is manufactured. Since the undercoating resin does not override to flow out in the assembly in this manner, the sampling work for flow- out resin can be eliminated.
摘要翻译：目的：通过从形成有环状延伸的槽的底涂层区域难以流出底涂层树脂来减少制品的制造步骤和成本。构成：在将半导体元件14固定在集管5的半导体元件安装区域2上之后，元件14的规定电极经由布线15连接到引线8的两端的内端，元件14为由于在这种情况下在底涂区域4的周缘处不存在由于树脂流出而产生的尖角，因此树脂不会流出。树脂16然后硬化后，用环氧树脂模制树脂成型区域17，并用树脂封装18覆盖规定的部分。之后，将不必要的框架11和堤坝12切割并移除，半导体装置19 制造。由于底涂层树脂不以这种方式超过组装流出，因此可以消除流出树脂的取样工作。

3. 发明专利

JPS5910245A Resin-sealed semiconductor device and manufacture thereof 失效
标题翻译：树脂密封半导体器件及其制造
公开(公告)号：JPS5910245A
公开(公告)日：1984-01-19
申请号：JP11857782
申请日：1982-07-09
申请人： Hitachi Ltd
发明人： SUDA MINORU , AKEYAMA KENJI
IPC分类号： H01L23/29 , H01L21/56 , H01L23/31 , H01L23/32
CPC分类号： H01L23/32 , H01L2224/48091 , H01L2224/48247 , H01L2224/8592 , H01L2924/181 , H01L2924/00014 , H01L2924/00012
摘要： PURPOSE:To increase the strength of tightening by a bolt without lowering the intensity of power cycles, by forming an undercoat resin layer to be in a double-layer structure whose lower layer is formed of first resin having large adhesiveness to a supporting substrate and whose upper layer is formed of second resin having small adhesiveness to a resin mold body. CONSTITUTION:An undercoat resin, which is prepared by adding liquid or powder silicon resin of 4wt% to liquid epoxy resin, is dropped on a semiconductor pellet 2 mounted on a heat sink 1, baking is applied thereto, and thereby the resin is polymerized and set. A resin layer thus prepared has a double-layer structure wherein a lower layer is formed of epoxy resin 13 and an upper layer of silicon resin 14. When a heat or a mechanical stress is applied to a semiconductor device thus prepared, which is fixed on a wiring substrate 9 by a bolt 8, the silicon resin 14 acts as a release material even when a substrate 1 is deformed, a space 16 is thereby formed, and thus no stress is applied onto the pellet 2. On the other hand, the thermal expansion coefficient of the epoxy resin 13 is almost the same with that of a mold body 5 (epoxy resin), and thus the intensity of power cycles is not lowered. Therefore, the strength of tightening by the bolt 8 can be improved.
摘要翻译：目的：通过在不降低动力循环强度的情况下增加螺栓的紧固强度，通过将底层树脂层形成为双层结构，其下层由与支撑基材具有大粘合性的第一树脂形成，并且其双上层由对树脂成型体具有小粘合性的第二树脂形成。构成：将通过将4重量％的液体或粉末硅树脂添加到液体环氧树脂中而制备的底涂层树脂滴在安装在散热器1上的半导体芯片2上，对其进行烘烤，由此树脂聚合，组。如此制备的树脂层具有双层结构，其中下层由环氧树脂13和硅树脂14的上层形成。当将如此制备的半导体器件的热或机械应力施加到固定在通过螺栓8的布线基板9，即使当基板1变形时，硅树脂14也用作剥离材料，由此形成空间16，从而在颗粒2上不施加应力。另一方面，环氧树脂13的热膨胀系数与模具体5（环氧树脂）的热膨胀系数几乎相同，因此功率循环的强度不降低。因此，能够提高螺栓8的紧固强度。

4. 发明专利

JPS58127355A LEAD FRAME 失效
公开(公告)号：JPS58127355A
公开(公告)日：1983-07-29
申请号：JP894482
申请日：1982-01-25
申请人： HITACHI LTD
发明人： ENOMOTO USUKE , YAMAGUCHI MASAO , INABA KEIZOU , AKEYAMA KENJI , IKEZAWA RIYUUICHI
IPC分类号： H01L21/52 , H01L23/48 , H01L23/495
摘要： PURPOSE:To realize automatic pellet fitting through flux-lessening and to execute pellet fitting with small thermal resistance by providing a lead frame forming solder plating layer which is not easily oxidized on the semiconductor element fitting surface in the desired thickness. CONSTITUTION:A solder in the specified composition ratio can be obtained through accurate control of thickness of each layer by separately plating a lead layer 11 and tin laye 12. At this time, the lead layer 11 which is easily oxidized is used as the lower layer, while the tin layer 12 which is comparatively difficult to be oxidized is used as the upper layer in view of protecting the lead layer 11. From the point of view of preventing oxidation of the lead layer 11, the tin layer 12 is required to have the thickness of at least about 0.2mum or more (in this case, the lead layer is thicker than about 2.6mum). If the tin layer 12 is excessively thick, a longer time is required for alloying of lead layer 11 and tin layer 12 and the solder plating dose not dissolve within a short period and accordingly the pellet fitting cannot be realized and surface gloss becomes insufficient.

5. 发明专利

JPH0543606B2 失效
公开(公告)号：JPH0543606B2
公开(公告)日：1993-07-02
申请号：JP20620284
申请日：1984-10-03
申请人： HITACHI LTD
发明人： TOMITA TOMOYA , NAKAMURA MITSUO , AKEYAMA KENJI
IPC分类号： H05K13/02 , B65G1/00 , B65G1/02 , B65G1/08 , B65G11/02 , B65G11/20 , B65G47/04 , B65G47/74

6. 发明专利

JPH04111386A ELECTRONIC DEVICE 失效
公开(公告)号：JPH04111386A
公开(公告)日：1992-04-13
申请号：JP22930890
申请日：1990-08-30
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： TERADA KAZUHIRO , OTSUKA KENICHI , KIMOTO RYOSUKE , MASUDA MASACHIKA , SUGANO TOSHIO , AKEYAMA KENJI , MURAKAMI HAJIME , NISHIMURA ASAO , KITANO MAKOTO
IPC分类号： H05K1/18 , H05K1/00 , H05K1/02 , H05K1/03 , H05K3/34 , H05K3/46
摘要： PURPOSE:To ensure the reliability of a soldered part at a module on which many IC's have been mounted by a method wherein a board whose coefficient of thermal expansion is matched to the value of an IC package as far as possible is used. CONSTITUTION:At an electronic device, a single-layer board or a multilayer board, of ten layers or lower, whose coefficient of thermal expansion is at 7.0X10 to 3.0X10 is used, and a semiconductor device in a package in which an interval between opposite lead terminals is at 10mm or higher and the height of leads from the board is at 0.7mm or lower is mounted at least on one face. Leads 3 of a TSOP- type semiconductor device 2 on a ceramic board 1 are bonded (soldered) by using a solder 4 and the device is mounted. The thickness of the package for the TSOP-type semiconductor device 2 is at about 1.27mm. The ceramic board 1 has a multilayer interconnection structure formed in the following manner: copper foils 1B having a thickness of about 18mum are pasted on both faces of a ceramic core material 1; glass cloths are impregnated with an epoxy resin and dried to form prepregs 1C; the prepregs having a thickness of about 100mum are laminated on the copper foils; copper foils 1B having a thickness of about 18mum are pasted on them; prepregs 1C having a thickness of about 100mum are laminated on them; the copper foils 1B having a thickness about 18mum are pasted on them.

7. 发明专利

JPH0230574B2 失效
公开(公告)号：JPH0230574B2
公开(公告)日：1990-07-06
申请号：JP16456180
申请日：1980-11-25
申请人： HITACHI LTD
发明人： TANAKA NOBUKATSU , HAGIWARA YOSHIMI , AKEYAMA KENJI
IPC分类号： H01L29/41 , H01L21/331 , H01L21/60 , H01L29/72 , H01L29/73

8. 发明专利

JPH023546B2 失效
公开(公告)号：JPH023546B2
公开(公告)日：1990-01-24
申请号：JP19855481
申请日：1981-12-11
申请人： HITACHI LTD
发明人： SUDA MINORU , IKEZAWA RYUICHI , AKEYAMA KENJI
IPC分类号： H01L23/48 , H01L23/28 , H01L23/34 , H01L23/495

9. 发明专利

JPS58139455A SEMICONDUCTOR DEVICE AND LEAD FRAME USED FOR ASSEMBLING THE SAME 失效
公开(公告)号：JPS58139455A
公开(公告)日：1983-08-18
申请号：JP2113582
申请日：1982-02-15
申请人： HITACHI LTD
发明人： ENOMOTO USUKE , YAMAGUCHI MASAO , INABA KEIZOU , AKEYAMA KENJI , IKEZAWA RIYUUICHI
IPC分类号： H01L21/52 , H01L23/48 , H01L23/495
摘要： PURPOSE:To improve the thermal fatigue lifetime of a semiconductor device by mounting circuit elements through solder containing a range of 95-99.5% of lead. CONSTITUTION:A copper plate is plated with Ni 14, and solder plating 15 is superposed. A solder plating film 15 has a lower layer of lead 16 and an upper layer of tin 17, and when both are molten to form a solder, the thickness of lead 16 is higher than 95% and lower than approx. 99.5% by weight. The thicknesses of the respective layers are accurately controlled by plating, thereby readily obtain the solder of the prescribed component ratio. In order to prevent the oxidation of the lead 16 with the tin 17 which can be hardly oxidized as an upper layer, the tin layer 17 should be at least higher than approx. 0.2mum, and in case of 0.2mu, when the layer 16 is formed in 21mum, the lead contents arrive at 99.4%. When a pellet is bonded through a solder plating layer with this structure, the lead content reaches extremely high, and thermal fatigue lifetime is extended, and since tin is covered, it is not oxidized, and when the pellet is bonded, an oxide does not impregnate into the solder bonding layer, thereby inhibiting the increase in the thermal resistance.

10. 发明专利

JPH05160335A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH05160335A
公开(公告)日：1993-06-25
申请号：JP32033991
申请日：1991-12-04
申请人： HITACHI LTD
发明人： NAITO TAKAHIRO , AKEYAMA KENJI , MURAKAMI HAJIME , SUZUKI HIROMICHI , MIYAKI YOSHINORI
IPC分类号： H01L23/50
摘要： PURPOSE:To provide a semiconductor integrated circuit device in which narrow pitch, multilayer, and multiple pins of lead frame, can be realized. CONSTITUTION:A semiconductor integrated circuit device having a molded package structure comprises a semiconductor chip 1 in which an integrated circuit is formed, and a lead frame 2 for external connection. The semiconductor chip 1 and the lead frame 2 are sealed with a resin 3 such as epoxy resin. Further, the lead frame 2 is made of a composite material in which a resin material 7 is stuck on a metal material 6, and the thin metal material 6 capable of performing finer machining is used.

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