专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JP2009099621A Method of manufacturing substrate 审中-公开
标题翻译：制造基板的方法
公开(公告)号：JP2009099621A
公开(公告)日：2009-05-07
申请号：JP2007267171
申请日：2007-10-12
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IIDA KENJI , ABE TOMOYUKI , MAEHARA YASUTOMO , HIRANO SHIN , NAKAGAWA TAKASHI , YOSHIMURA HIDEAKI , YAMAWAKI SEIGO , OZAKI TOKUICHI
IPC分类号： H05K3/42 , H05K3/44 , H05K3/46
CPC分类号： H05K3/427 , H05K3/064 , H05K3/429 , H05K3/4608 , H05K2201/0281 , H05K2201/0323 , H05K2201/0347 , H05K2201/0959 , H05K2201/0969 , H05K2201/09809 , H05K2203/1178 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a substrate, that correctly etches a conductor formed on the surface of the substrate in the production steps for substrates including a step of forming a through-hole in the substrate and fill it with an insulating material. SOLUTION: The method includes the steps of: forming a through-hole 18 in a substrate 16; filling the through-hole 18 with an insulating material 20 and performing electroless plating to coat the surface of the substrate 16; applying photoresist on the electroless-plated layer 80 formed on the surface of the substrate 16; optically exposing and developing the photoresist so as to form a resist pattern 72 coating an end face of the through-hole 18 filled with the insulating material 20; etching conductor layers 14 and 19 formed on the surface of the substrate 16 while using the resist pattern 72 as a mask; and removing the resist pattern 72 coating the end face of the through-hole 18 from the substrate 16 while using the electroless-plated layer 80 as a release layer. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种制造基板的方法，在基板的制造步骤中正确地蚀刻形成在基板的表面上的导体，包括在基板中形成通孔的步骤并将其填充用绝缘材料。解决方案：该方法包括以下步骤：在衬底16中形成通孔18; 用绝缘材料20填充通孔18并进行化学镀以涂覆基板16的表面; 在形成在基板16的表面上的化学镀层80上施加光致抗蚀剂; 光致曝光和显影光致抗蚀剂，以形成涂覆绝缘材料20的通孔18的端面的抗蚀图案72; 在使用抗蚀剂图案72作为掩模的同时，在基板16的表面上形成蚀刻导体层14和19; 并且在使用化学镀层80作为剥离层的同时，从基板16去除涂覆通孔18的端面的抗蚀剂图案72。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2010199540A Circuit board, method of manufacturing same, and resistance element 有权
标题翻译：电路板，制造方法和电阻元件
公开(公告)号：JP2010199540A
公开(公告)日：2010-09-09
申请号：JP2009230606
申请日：2009-10-02
申请人： Fujitsu Ltd , 富士通株式会社
发明人： ABE TOMOYUKI , OZAKI TOKUICHI
IPC分类号： H05K1/16 , H05K1/02 , H05K3/46
CPC分类号： H05K1/167 , H05K3/108 , H05K3/243 , H05K3/429 , H05K3/4611 , H05K3/4641 , H05K2201/0323 , H05K2201/0355 , H05K2201/09827 , H05K2201/09845 , H05K2203/0353 , H05K2203/0361 , H05K2203/0369 , H05K2203/0597 , H05K2203/1184 , H05K2203/1476
摘要： PROBLEM TO BE SOLVED: To improve reliability of a circuit board, a method of manufacturing the circuit board, and a resistance element.
SOLUTION: The circuit board includes a resin base 11 and a resistance element 30 formed above the resin base 11. In this circuit board, the resistance element 30 has a resistance pattern 13a having an electrode part 13d and an extending part 13e and an electrode 31 formed on the electrode part 13d of the resistance pattern 13a to include a skirt area 31a that is gradually reduced in thickness toward the extending part 13e.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提高电路板的可靠性，制造电路板的方法和电阻元件。解决方案：电路板包括树脂基体11和形成在树脂基底11上的电阻元件30.在该电路板中，电阻元件30具有电阻图形13a，其具有电极部分13d和延伸部分13e，形成在电阻图案13a的电极部分13d上的电极31包括朝向延伸部分13e逐渐减小的裙部区域31a。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2006260653A Method for manufacturing thin-film magnetic head 审中-公开
标题翻译：制造薄膜磁头的方法
公开(公告)号：JP2006260653A
公开(公告)日：2006-09-28
申请号：JP2005075242
申请日：2005-03-16
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KANEDA WATARU , KOJIMA TAKASHI , FUJITA MUTSUMI , FUJIEDA HIROSHI , OZAKI TOKUICHI , IKEGAWA YUKINORI
IPC分类号： G11B5/39 , G03F7/075 , G03F7/20
摘要： PROBLEM TO BE SOLVED: To manufacture a thin-film magnetic head higher in accuracy by accurately forming a lift-off pattern used when the read element of the thin-film magnetic head is formed and suppressing a manufacturing variance of the thin-film magnetic head.
SOLUTION: This method includes: a step of stacking a reflection preventive film 20 made of a film material not dipped in a developer for developing a resist film 30 stacked on a magnetoresistive effect film 12, and the resist film 30 made of a resist material bear with the treatment of ashing the reflection preventing film on the magnetoresistive effect film 12; a step of forming a resist pattern 30a by exposing and developing the resist film 30; a step of ashing the reflection preventive film 20 and constituting a peaked lift-off pattern 22 of the ashed reflection preventive film 20a and the resist pattern 30a; and a step of using the lift-off pattern 22 to execute ion milling and forming an insulating film.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了通过精确地形成当形成薄膜磁头的读取元件时使用的剥离图案来制造精度更高的薄膜磁头，并且抑制薄膜磁头的制造方差，胶片磁头。解决方案：该方法包括：将由未浸渍在显影剂中的膜材料制成的防反射膜20堆叠在叠层在磁阻效应膜12上的抗蚀剂膜30的步骤，以及抗蚀剂膜30 抗蚀剂材料承受着对磁阻效应膜12上的防反射膜灰化的处理; 通过曝光和显影抗蚀剂膜30形成抗蚀剂图案30a的步骤; 灰化反射防止膜20并构成灰化反射防止膜20a和抗蚀剂图案30a的峰值剥离图案22的步骤; 以及使用剥离图案22执行离子研磨和形成绝缘膜的步骤。版权所有（C）2006，JPO＆NCIPI

4. 发明专利

JP2010034199A Printed wiring board 审中-公开
标题翻译：印刷线路板
公开(公告)号：JP2010034199A
公开(公告)日：2010-02-12
申请号：JP2008193394
申请日：2008-07-28
申请人： Fujitsu Ltd , 富士通株式会社
发明人： YOSHIMURA HIDEAKI , OZAKI TOKUICHI , IIDA KENJI , ABE TOMOYUKI
IPC分类号： H05K3/46
CPC分类号： H05K3/4673 , H05K1/0366 , H05K3/426 , H05K3/4608 , H05K3/4614 , H05K2201/0195 , H05K2201/0323 , H05K2201/0394 , H05K2201/09563 , H05K2201/096 , H05K2201/09809 , H05K2201/10378 , H05K2203/061
摘要： PROBLEM TO BE SOLVED: To provide a printed wiring board capable of preventing the generation of a stress. SOLUTION: The printed wiring board 11 includes a core substrate 12 containing carbon fiber and having rigidity for maintaining its shape with a single unit. A buildup layer 26 or 27 is formed on the core substrate 12. The buildup layer 26 or 27 has insulation layers 28 and conductive wiring layers 29 which are sequentially laminated and in which rigidity for maintaining the shape with a single unit depends on the core substrate 12. The insulation layer 28 is formed of a fiber 37 and a resin material impregnated into the fiber 37. In the buildup layer 26 or 27, a thermal expansion coefficient is suppressed low based on the fiber 37. In the core substrate 12, the thermal expansion coefficient is also suppressed low based on the carbon fiber. Accordingly, the thermal expansion coefficient of the buildup layer 26 or 27 is adjusted to match the thermal expansion coefficient of the core substrate 12. The generation of stress is prevented in the printed wiring board 11. The generation of cracks in the buildup layer 26 or 27 can be prevented. The disconnection of a conductive wiring layer 29 can be prevented. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供能够防止产生应力的印刷线路板。解决方案：印刷电路板11包括含有碳纤维的芯基板12，并且具有用于以单一单元保持其形状的刚性。堆积层26或27形成在芯基板12上。积层层26或27具有依次层叠的绝缘层28和导电布线层29，其中用单个单元保持形状的刚性取决于芯基板绝缘层28由纤维37和浸渍在纤维37中的树脂材料形成。在堆积层26或27中，基于纤维37将热膨胀系数抑制得较低。在芯基板12中，基于碳纤维，热膨胀系数也被抑制得较低。因此，调整堆积层26或27的热膨胀系数以匹配芯基板12的热膨胀系数。在印刷线路板11中防止产生应力。在积聚层26中产生裂纹或 27可以防止。可以防止导电布线层29断开。版权所有（C）2010，JPO＆INPIT

5. 发明专利

JP2009099624A Circuit board and method of manufacturing the same 审中-公开
标题翻译：电路板及其制造方法
公开(公告)号：JP2009099624A
公开(公告)日：2009-05-07
申请号：JP2007267206
申请日：2007-10-12
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IIDA KENJI , ABE TOMOYUKI , MAEHARA YASUTOMO , HIRANO SHIN , NAKAGAWA TAKASHI , YOSHIMURA HIDEAKI , YAMAWAKI SEIGO , OZAKI TOKUICHI
IPC分类号： H05K3/38 , H05K3/46
CPC分类号： H05K9/00 , H05K3/38 , H05K3/429 , H05K3/4608 , H05K3/4611 , H05K3/4691 , H05K2201/0281 , H05K2201/0323 , H05K2201/09581 , H05K2201/0959 , H05K2201/09781 , H05K2201/09809 , H05K2201/2072 , Y10T29/49155
摘要： PROBLEM TO BE SOLVED: To provide a circuit board which is capable of tightly bonding a cable layer on a base member even if thermal expansion coefficients of the base member and the cable layer are significantly different and is highly reliable, and to provide a method of manufacturing the same. SOLUTION: The circuit board where a cable layer is tightly bonded on the surface of a substrate 16 can be obtained through the following steps of: coating the surface of the substrate 16 with a conductor layer 14; pattern-etching the conductor layer 14 and forming a number of projecting anchor patterns 15 on the surface of the substrate 16; and laminating the cable layer of the substrate 16 with the anchor patterns 15. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种即使基底部件和电缆层的热膨胀系数明显不同且高可靠性也能够将基板上的电缆层紧密接合的电路板，并且提供其制造方法。解决方案：通过以下步骤可以获得电缆层紧密接合在基板16的表面上的电路板：用导体层14涂覆基板16的表面; 对导体层14进行图案蚀刻，并在衬底16的表面上形成多个突出的锚定图案15; 并且使基板16的电缆层与锚定图案15层压。版权所有（C）2009，JPO＆INPIT

6. 发明专利

JP2009099622A Method of producing substrate 有权
标题翻译：生产基材的方法
公开(公告)号：JP2009099622A
公开(公告)日：2009-05-07
申请号：JP2007267179
申请日：2007-10-12
申请人： Fujitsu Ltd , 富士通株式会社
发明人： MAEHARA YASUTOMO , IIDA KENJI , ABE TOMOYUKI , HIRANO SHIN , NAKAGAWA TAKASHI , YOSHIMURA HIDEAKI , YAMAWAKI SEIGO , OZAKI TOKUICHI
IPC分类号： H05K3/42 , H05K3/44 , H05K3/46
CPC分类号： H05K3/427 , H05K1/115 , H05K1/116 , H05K3/0094 , H05K3/061 , H05K3/429 , H05K3/4602 , H05K3/4611 , H05K3/4691 , H05K2201/0347 , H05K2201/09581 , H05K2201/0959 , H05K2201/0969 , H05K2201/09809 , H05K2203/1178 , H05K2203/135 , H05K2203/1476 , Y10T29/49126 , Y10T29/49155 , Y10T29/49156 , Y10T29/49165
摘要： PROBLEM TO BE SOLVED: To provide a method of producing a reliable substrate without corroding a plated layer covering an inner face of a through-hole bored in a base member. SOLUTION: The method of producing the substrate comprises the steps of: forming the through-hole 18 in the base member 16; plating the base member 16 so as to coat the inner face of the through-hole 18 with a plated layer 19; applying and laminating photo resist on a surface of the base member 16; optically exposing and developing the photo resist so as to form a resist pattern 72, which coats at least a planar area of the through-hole 18; and etching electrically conductive layers 14 and 19 bonded and formed on the surface of the base member 16. In the step of forming the resist pattern 72, the resist pattern 72 is formed so an area of exposing the conductive layers 14 and 19 is arranged apart from an edge of the through-hole 14 by a distance longer than a distance of etching a side face of the conductive layers 14 and 19 in the etching step. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造可靠的基板的方法，而不会腐蚀覆盖在基体中钻孔的通孔的内表面的镀层。解决方案：制造衬底的方法包括以下步骤：在基底构件16中形成通孔18; 电镀基底构件16以便用镀层19涂覆通孔18的内表面; 在基体16的表面上施加和层压光致抗蚀剂; 光刻曝光和显影光致抗蚀剂，以形成抗蚀剂图案72，其涂覆至少一个通孔18的平面区域; 并蚀刻接合并形成在基底构件16的表面上的导电层14和19.在形成抗蚀剂图案72的步骤中，形成抗蚀剂图案72，使得导电层14和19暴露的区域分开在蚀刻步骤中，从通孔14的边缘延伸比蚀刻导电层14和19的侧面的距离更长的距离。版权所有（C）2009，JPO＆INPIT

7. 发明专利

JP2009099620A Core board and method of manufacturing the same 审中-公开
标题翻译：核心板及其制造方法
公开(公告)号：JP2009099620A
公开(公告)日：2009-05-07
申请号：JP2007267157
申请日：2007-10-12
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IIDA KENJI , ABE TOMOYUKI , MAEHARA YASUTOMO , HIRANO SHIN , NAKAGAWA TAKASHI , YOSHIMURA HIDEAKI , YAMAWAKI SEIGO , OZAKI TOKUICHI
IPC分类号： H05K3/46
CPC分类号： H05K3/4608 , H05K1/056 , H05K3/427 , H05K3/429 , H05K3/4611 , H05K3/4691 , H05K2201/0281 , H05K2201/0323 , H05K2201/09309 , H05K2201/0959 , H05K2201/0969 , H05K2201/09809 , H05K2203/1178 , Y10S428/901 , Y10T29/49155
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a wiring board that reliably prevents electrical short circuit between a conductive through-hole and an electrically conductive core section in a core board provided with the core section. SOLUTION: The method of manufacturing the core board includes: a step of forming a pilot hole 18 in an electrically conductive core section 10; a step of plating a board where the pilot hole 18 is formed and cover the inner face of the pilot hole 18 and the surface of the board with a plating layer 19; a step of forming a gas purging hole 140 on the surface of the board where the plating layer 19 is formed; and a step of filling the pilot hole 18 of the board where the gas purging hole 140 is formed, with an insulating material 20. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供一种制造布线板的方法，其可靠地防止设置有芯部的芯板中的导电通孔和导电芯部之间的电短路。解决方案：制造芯板的方法包括：在导电芯部10中形成引导孔18的步骤; 对形成导向孔18的基板进行电镀的步骤，用电镀层19覆盖导向孔18的内面和基板的表面; 在形成有镀层19的基板的表面形成气体净化孔140的工序; 以及通过绝缘材料20填充形成有气体净化孔140的板的引导孔18的步骤。版权所有（C）2009，JPO＆INPIT

8. 发明专利

JP2010034197A Buildup board 审中-公开
标题翻译：建筑板块
公开(公告)号：JP2010034197A
公开(公告)日：2010-02-12
申请号：JP2008193386
申请日：2008-07-28
申请人： Fujitsu Ltd , 富士通株式会社
发明人： YOSHIMURA HIDEAKI , OZAKI TOKUICHI , IIDA KENJI , ABE TOMOYUKI
IPC分类号： H05K3/46
CPC分类号： H05K1/036 , H05K1/0366 , H05K3/06 , H05K3/107 , H05K3/108 , H05K3/421 , H05K3/426 , H05K3/4644 , H05K2201/0195 , H05K2201/0355 , H05K2201/0376 , H05K2201/0394 , H05K2201/09563 , H05K2201/096 , H05K2203/0278 , H05K2203/1476 , Y10T29/49126 , Y10T29/51
摘要： PROBLEM TO BE SOLVED: To provide a buildup board capable of ensuring rigidity while maintaining a low thermal expansion coefficient. SOLUTION: Fibers 23 are buried in a first insulation layer 21. The fibers 23 work to keep the low thermal expansion coefficients of first and second insulation layers 21, 22. The thermal expansion coefficients of the first and second insulation layers 21, 22 are adjusted to match the thermal expansion coefficient of a conductive land 15. The occurrence of a stress is reduced in the buildup board 11. In addition, the rigidity of the buildup board 11 is improved by the function of the fibers 23. The second insulation layer 22 stacking on the surface of the first insulation layer 21 is made of a resin material. The fibers 23 can be unfailingly prevented from being exposed on the surface of the second insulation layer 22. Even if a plating liquid permeates the inside of the first insulation layer 21 along the interface between the resin material and the fibers 23 in forming the via 16 and the conductive land 15, the plating liquid can be prevented from reaching the surface of the second insulation layer 22. The conduction between the via 16 and a conductive pattern which should not be originally connected to the via 16 can be unfailingly prevented. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供能够确保刚性同时保持低热膨胀系数的积木板。纤维23被埋在第一绝缘层21中。纤维23用于保持第一和第二绝缘层21,22的低热膨胀系数。第一绝缘层21和第二绝缘层21的热膨胀系数， 22调节以匹配导电平台15的热膨胀系数。在积层板11中应力的发生减少。此外，通过纤维23的功能，增强板11的刚度得到改善。第二在第一绝缘层21的表面上堆叠的绝缘层22由树脂材料制成。纤维23能够牢固地防止暴露在第二绝缘层22的表面上。即使电镀液体沿着形成通孔16的树脂材料和纤维23之间的界面渗透到第一绝缘层21的内部并且能够防止电镀液到达第二绝缘层22的表面。导通板15与导电图案之间的导通不能最初连接到通孔16，导电图案可以得到有效的防止。版权所有（C）2010，JPO＆INPIT

9. 发明专利

JP2009099619A Core substrate and its manufacturing method 审中-公开
标题翻译：核心基板及其制造方法
公开(公告)号：JP2009099619A
公开(公告)日：2009-05-07
申请号：JP2007267140
申请日：2007-10-12
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HIRANO SHIN , IIDA KENJI , MAEHARA YASUTOMO , ABE TOMOYUKI , NAKAGAWA TAKASHI , YOSHIMURA HIDEAKI , YAMAWAKI SEIGO , OZAKI TOKUICHI
IPC分类号： H05K3/46
CPC分类号： H05K9/00 , H05K1/115 , H05K3/429 , H05K3/4608 , H05K3/4611 , H05K3/4691 , H05K2201/0281 , H05K2201/0323 , H05K2201/09581 , H05K2201/0959 , H05K2201/09809 , Y10T29/49155
摘要： PROBLEM TO BE SOLVED: To provide a core substrate comprising a core having conductivity which prevents an electric short circuit between a conduction through-hole and the core, and can be suitably used for manufacturing a wiring substrate on which wiring is formed with high density, and its manufacturing method. SOLUTION: A core substrate comprises a core 10 having conductivity in which a lower opening 18 through which a conduction through-hole 52 penetrates is formed, wiring layers 48 laminated and formed on both surfaces of the core 10, a plating layer 19 adhered to and formed on the inner wall surface of the lower opening 18, and an insulating material 20 which is filled in a portion between the plating layer 19 and the periphery surface of the conduction through-hole 52. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种芯基板，其包括具有防止导电通孔和芯之间的电短路的导电性的芯，并且可以适合用于制造其上形成有布线的布线基板高密度及其制造方法。解决方案：核心基板包括具有导电性的芯10，其中形成有导电通孔52穿过的下开口18，层叠并形成在芯体10的两个表面上的布线层48，镀层19 粘附并形成在下开口18的内壁表面上，以及绝缘材料20，其被填充在电镀层19和导电通孔52的外周表面之间的部分。版权所有（C））2009，JPO＆INPIT

10. 发明专利

JP2009099616A Core member and method of manufacturing core member 有权
标题翻译：核心成员和制造核心成员的方法
公开(公告)号：JP2009099616A
公开(公告)日：2009-05-07
申请号：JP2007267122
申请日：2007-10-12
申请人： Fujitsu Ltd , 富士通株式会社
发明人： NAKAGAWA TAKASHI , IIDA KENJI , MAEHARA YASUTOMO , HIRANO SHIN , ABE TOMOYUKI , YOSHIMURA HIDEAKI , YAMAWAKI SEIGO , OZAKI TOKUICHI
IPC分类号： H05K3/46
CPC分类号： H05K9/00 , H05K1/036 , H05K1/0366 , H05K1/056 , H05K3/429 , H05K2201/0281 , H05K2201/0323 , H05K2201/0959 , H05K2201/09809
摘要： PROBLEM TO BE SOLVED: To provide a core member such that a core portion contains carbon fiber, and to provide a suitable method of manufacturing the same.
SOLUTION: The manufacturing method includes the steps of: arranging prepregs 10a to 10d formed by impregnating carbon fiber with resin, a prepreg 12 formed by impregnating glass fiber with resin, and copper foil 14 such that the prepreg 12 containing the glass fiber is disposed between the prepregs 10a to 10d containing the carbon fiber and the copper foil 14; and heating and pressing the prepregs 10a to 10d containing the carbon fiber, the prepreg 12 containing the glass fiber, and the copper foil 14 to subject the prepregs 10a to 10d and 12 to thermal curing.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供芯部件，使得芯部分包含碳纤维，并提供其合适的制造方法。解决方案：制造方法包括以下步骤：将通过用树脂浸渍碳纤维形成的预浸料坯10a至10d，通过用树脂浸渍玻璃纤维形成的预浸料12和铜箔14，使得含有玻璃纤维的预浸料12 设置在包含碳纤维的预浸料10a〜10d和铜箔14之间; 对包含碳纤维的预浸料10a〜10d，含有玻璃纤维的预浸料12和铜箔14进行加热加压，使预浸料10a〜10d，12进行热固化。版权所有（C）2009，JPO＆INPIT

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式