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1. 发明专利

JP2009296260A Data transmitting apparatus 审中-公开
标题翻译：数据传输设备
公开(公告)号：JP2009296260A
公开(公告)日：2009-12-17
申请号：JP2008147215
申请日：2008-06-04
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KITAMURA KIYOSHI , ISHIKAWA KENICHI , TAKAO SHINJI
IPC分类号： H04L12/44
CPC分类号： G06F11/2007
摘要： PROBLEM TO BE SOLVED: To switch an ACT system and a non-ACT system without an instantaneous break of data for switching ports.
SOLUTION: An ACT-side package 100 of this data transmitting device 10 switches own port 11 to another port in the case of detecting a failure at own part. Then, the ACT-side package 100 notifies a non-ACT side package 200, to the effect that switching to a port corresponding to a port of a switching destination has been carried out. The non-ACT side package 200 switches a port so as to be the same as that in the ACT-side package 100, according to a switching request, when the non-ACT side package 200 receives a switching request from the non-ACT side package 100.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：切换ACT系统和非ACT系统，无需切换端口的数据瞬间中断。解决方案：在检测到自身故障的情况下，该数据发送装置10的ACT侧封装100将自己的端口11切换到另一端口。然后，ACT侧封装100通知非ACT侧封装200，使得切换到与切换目的地的端口对应的端口已经被执行。非ACT侧封装200根据切换请求切换与ACT侧封装100相同的端口，当非ACT侧封装200从非ACT侧接收切换请求时包装100.版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2009271649A Data processor, data processing method, and data processing program 有权
标题翻译：数据处理器，数据处理方法和数据处理程序
公开(公告)号：JP2009271649A
公开(公告)日：2009-11-19
申请号：JP2008120136
申请日：2008-05-02
申请人： Fujitsu Ltd , 富士通株式会社
发明人： HARADA YOSHIHIRO , TAKAO SHINJI , KITAMURA KIYOSHI , TAKADA ISAO
IPC分类号： G06F17/50
CPC分类号： G01R31/31721 , G01R21/01
摘要： PROBLEM TO BE SOLVED: To save any labor and operation costs required for development of a package.
SOLUTION: A data processor stores, for each device which executes respectively assigned data processing, pieces of configuration data defining respective logic circuits that demonstrate different processing performance when they are designed on the pertinent device and reads a piece of the configuration data for each device from among the pieces of the configuration data, and respectively inputs the read pieces of the configuration data to the devices, and designs a logic circuit for each device, and measures total power consumption required in executing the data processing by the devices, and determines, from among the combinations of the designed logic circuits, a combination in which the actually measured value of the measured total power consumption falls within the predetermined target value of the total power consumption, which demonstrates the optimal processing performance as the logic circuits to be designed onto the devices in actually executing the data processing.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：节省开发包装所需的任何劳动和运营成本。解决方案：数据处理器为执行分配的数据处理的每个设备存储定义相应的逻辑电路的配置数据，当它们在相关设备上被设计时，其显示不同的处理性能，并且读取一条配置数据每个设备从配置数据中分别输入配置数据的读取部分到设备，并为每个设备设计一个逻辑电路，并且测量由设备执行数据处理所需的总功耗;以及从所设计的逻辑电路的组合中确定测量的总功耗的实际测量值落在总功耗的预定目标值内的组合，这表明作为逻辑电路的最佳处理性能设计在实际执行数据处理的设备上。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JPH1066044A VIDEO CONFERENCE SYSTEM 失效
公开(公告)号：JPH1066044A
公开(公告)日：1998-03-06
申请号：JP21377296
申请日：1996-08-13
申请人： FUJITSU LTD
发明人： KITAMURA KIYOSHI
IPC分类号： H04N7/15 , G06T1/00 , H04M3/56
摘要： PROBLEM TO BE SOLVED: To match voice and the picture of person to be displayed and to progress a natural conference without causing incompatibility by displaying the static image of a detected different speaker immediately after the detection of the speaker. SOLUTION: A video conference terminal consisting of a camera for photographing a person, a monitor television(TV) and a speaker is arranged in the fronts of plural conference attendees A to F and microphones are arranged on the seats of respective attendees A to F. The camera is arranged on a turning board and rotated in the horizontal direction so as to photograph the pictures of all the attendees A to F. The static pictures of the attendees A to F are previously stored in a memory built in the video conference terminal, and during the movement of the camera, the previously stored static image E' of a speaker E is displayed. After the completion of movement of the camera, the moving image of the speaker E photographed by the camera is displayed. Consequently a person generating a voice generated from the speaker can be allowed to coincide with the person displayed on the monitor TV.

4. 发明专利

JPH04351786A FIFO MEMORY CIRCUIT 失效
公开(公告)号：JPH04351786A
公开(公告)日：1992-12-07
申请号：JP12572391
申请日：1991-05-29
申请人： FUJITSU LTD
发明人： KITAMURA KIYOSHI
IPC分类号： G11C7/00 , H04L7/00
摘要： PURPOSE:To match the phase of data output of a FIFO memory by adding a simple circuit with respect to a phase matching circuit for data input and data output of the FIFO memory. CONSTITUTION:This circuit is proided with a first signal indicating the start position of data input and a second signal indicating the start position of data output. The FIFO memory circuit consists of a comparing circuit 3, which applise the output of the muting circuit 2 and the phase disaccord result of the phase of the second signal to the FIFO memory 1 and the muting circuit 2 and performs control to reset a FIFO memory 1, besides an output clock generating circuit 4 which generates the read clock of the FIFO memory 1 and a muting circuit which generates a muting signal to stop transmission of the read clock in the case of phase disaccord between a third signal designating the start position of data output and the second signal.

5. 发明专利

JP2000115768A CONNECTION CONTROLLER 失效
公开(公告)号：JP2000115768A
公开(公告)日：2000-04-21
申请号：JP28034198
申请日：1998-10-01
申请人： FUJITSU LTD
发明人： HASEGAWA MAKOTO , SUGIYAMA SEIJI , KITAMURA KIYOSHI , ISHII YUJI , ENDO ATSUSHI , ARITA AKIFUMI , OYAJI KENJI , MOMII AKINORI , IHARA NORIYUKI , TERUI YUICHI
IPC分类号： H04N19/102 , H04L12/40 , H04N7/24 , H04N19/00 , H04N19/166 , H04N19/37 , H04N19/423 , H04N19/46 , H04N19/65 , H04N19/70 , H04N19/89
摘要： PROBLEM TO BE SOLVED: To enhance the flexibility by connecting compression coding conversion units and line interface units for plural image communication systems with different compression coding rules to a single bus so as to avoid a fixed connection relation between the line interface and a transcoder. SOLUTION: A packet generating section 51 of data transmitter side transmission units 40, 42 generates a packet based on its own unit channel ID set in advance to a transmission channel ID setting section 50 and transmits the packet to a high speed serial bus 31. A reception section 53 of data receiver side reception units 44, 46 receives the packet and a channel ID check section 55 compares the channel ID of the received packet with its own unit reception channel ID set in advance of a reception channel ID setting section 54 and when they are coincident, the packet is outputted to an internal circuit 56 of its own unit. Since the internal circuit of its own unit receives the packet when the channel ID of the received packet is coincident with the channel ID of its own unit, various communication can be realized and an exclusive control unit for the purpose is not required.

6. 发明专利

JPH1188854A MULTISPOT VIDEO CONFERENCE CONTROLLER 失效
公开(公告)号：JPH1188854A
公开(公告)日：1999-03-30
申请号：JP25092097
申请日：1997-09-16
申请人： FUJITSU LTD
发明人： HASEGAWA MAKOTO , SUGIYAMA SEIJI , KITAMURA KIYOSHI , ISHII YUJI , ARITA AKIFUMI , IHARA NORIYUKI , TERUI YUICHI
IPC分类号： H04N7/15 , H04M3/56
摘要： PROBLEM TO BE SOLVED: To easily switch multiple pictures as single pictures by providing a multipicture synthesizing means composed of a picture synthesizing means for synthesizing plural video conference signals into one video conference signal and an output control part for outputting the composed picture to a single picture control means while controlling its output. SOLUTION: The video conference signals from plural video conference terminals are inputted to a multipicture synthesizing means 110 while being branched. At a picture composing part 111 of the multipicture synthesizing means 110, multipicture data are synthesized into one piece of picture data and sent to a single picture control means 120. At the single picture control means 120, either one picture selected by a single picture processing part 121 or a picture composed by the multipicture synthesizing means 110 is selectively outputted. Thus, when holding a video conference, the video conference of a single picture and the video conference of multiple pictures can be easily switched under control from a processor. Further, the multipicture synthesizing part is composed of options so that the function of the multipicture video conference can be easily added.

7. 发明专利

JPH03266050A MEMORY DEVICE 失效
公开(公告)号：JPH03266050A
公开(公告)日：1991-11-27
申请号：JP6590890
申请日：1990-03-16
申请人： FUJITSU LTD
发明人： KITAMURA KIYOSHI
IPC分类号： G06F12/06
摘要： PURPOSE:To constitute the device so that a large quantity of data can be handled at a high speed by using plural FIFO memories which can execute simultaneously write and read-out, and switching them. CONSTITUTION:At the time of writing data, a write timing SW2 s designated in advance by a first designating means 2 to memory blocks 10 - 1n having an FIFO function for constituting an FIFO (first in first out) memory 1, and the control is executed so that write to the next memory block 11 is started, when write is started from a '0' address of the memory block 10 and reaches the timing SW2 (address). At the time of reading out data, read-out is started at the time point a timing SW3 designated by a second designating means 4 after the time when write is started, that is, when write of the SW3 address is being executed, and while holding this prescribed timing interval SW4, read- out is executed, while moving successively the memory block by the same control as the case of write. In such a way, a high speed access of the memory of a large capacity can be executed.

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