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JP2014027279A Single-event latch-up prevention technique for semiconductor device 有权
标题翻译：用于半导体器件的单事件闭锁预防技术
公开(公告)号：JP2014027279A
公开(公告)日：2014-02-06
申请号：JP2013155710
申请日：2013-07-26
申请人： Freescale Semiconductor Inc , フリースケールセミコンダクターインコーポレイテッド
发明人： JIANAN YANG , JAMES D BURNETT , GARNI BRAD J , LISTON THOMAS W , HUY VAN PHAM
IPC分类号： H01L21/8238 , G11C11/41 , H01L21/822 , H01L21/8244 , H01L27/04 , H01L27/06 , H01L27/092 , H01L27/10 , H01L27/11
CPC分类号： H01L27/06 , H01L27/0921
摘要： PROBLEM TO BE SOLVED: To provide a technique for addressing single-event latch-up (SEL) in a semiconductor device.SOLUTION: A technique for addressing single-event latch-up (SEL) in a semiconductor device includes determining a location of a parasitic silicon-controlled rectifier (SCR) 600 in an integrated circuit design of the semiconductor device. In this case, the parasitic SCR 600 includes a parasitic pnp bipolar junction transistor (BJT) and a parasitic npn BJT. The technique also includes incorporating a first transistor between a first power-supply node VDD and an emitter of the parasitic pnp BJT in the integrated circuit design. The first transistor 502 includes a first terminal coupled to the first power-supply node VDD, a second terminal coupled to the emitter of the parasitic pnp BJT, and a control terminal. The first transistor 502 is not positioned between a base of the pnp BJT and the first power-supply node VDD. The first transistor 502 limits current conducted by the parasitic pnp bipolar junction transistor following an SEL.
摘要翻译：要解决的问题：提供一种用于寻址半导体器件中的单事件闩锁（SEL）的技术。解决方案：用于在半导体器件中寻址单事件闩锁（SEL）的技术包括确定寄生硅控整流器（SCR）600在半导体器件的集成电路设计中。在这种情况下，寄生SCR 600包括寄生pnp双极结型晶体管（BJT）和寄生npn BJT。该技术还包括在集成电路设计中在第一电源节点VDD和寄生pnp BJT的发射极之间并入第一晶体管。第一晶体管502包括耦合到第一电源节点VDD的第一端子，耦合到寄生pnp BJT的发射极的第二端子和控制端子。第一晶体管502不位于pnp BJT的基极和第一电源节点VDD之间。第一晶体管502限制在SEL之后由寄生pnp双极结型晶体管传导的电流。

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