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1. 发明专利

JPH10262121A CUSTOMER STATION LINE TERMINATING CIRCUIT 失效
公开(公告)号：JPH10262121A
公开(公告)日：1998-09-29
申请号：JP6681297
申请日：1997-03-19
申请人： FUJITSU LTD
发明人： OI MASAKAZU , INAGAKI YUKIO , KITAGAWA SHOJI , MARUYAMA KAZUYOSHI , SUDA HIROSHI , KOYAKATA NAOKI , WANI KAZUO , TANIGUCHI KIYOSHI
IPC分类号： H04M19/08 , H04L12/02 , H04M11/00 , H04Q3/42
摘要： PROBLEM TO BE SOLVED: To eliminate the need for the power receiving circuit of power to be supplied from in-station line terminating device by way of a subscriber line and to constitute the provided function of a customer station line terminating device by means of a simple circuit by supplying the operation power of the customer station line terminating circuit from a device except in-station line terminating device. SOLUTION: An AC signal transmitting/receiving means 510 converts the transmitting/receiving signal of a terminal equipment into the AC signal of a prescribed frequency band so as to exchange it with the in-station line terminating device 4 in the customer station line terminating circuit 500. A DC terminating circuit 540 is constituted by connecting a reverse polarity conductive diode 507 which becomes a conductive state when the DC voltage of a reverse polarity is transmitted from the in-station line terminating device 4 and an open/close means 505 which becomes conductive when the terminal equipment 2 originates a call in parallel and, moreover, by serially connecting terminating resistance 509. A DC and AC separating circuit 501 separates an AC signal which comes from a subscriber line 3 from the DC voltage, transmits the AC signal to an AC signal transmitting/receiving circuit and transmits the DC voltage to the DC terminating circuit.

2. 发明专利

JPH0621763A BRIDGED TAP EQUALIZER 失效
公开(公告)号：JPH0621763A
公开(公告)日：1994-01-28
申请号：JP17310392
申请日：1992-06-30
申请人： FUJITSU LTD
发明人： MARUYAMA KAZUYOSHI , TANIGUCHI KIYOSHI
IPC分类号： H04B3/14 , H03H15/00 , H03H17/00 , H03H21/00
摘要： PURPOSE:To produce an echo replica that never affects the signals at the following stages by changing the time constant of an LPF at the rise and the fall of a rectangular wave. CONSTITUTION:A charge/discharge time constant switching function 35 switches the discharge time constant of a capacitor which controls the charge/discharge of an LPF 3 in order to reduce the discharge time constant compared with the charge time constant. Then, the sample point of the received signal is set at a point close to the fall time point of a rectangular wave as much as possible. So that the rise time of an echo replica is increased and at the same time the echo replica is sharply fixed at 0 with change of the time constant after the echo is eliminated at the sample point. Thus the received signal of the next bit is never affected. The echo amplitude is reduced at the sharp fall part of the echo replica and therefore, the influence of a nonlinear component, i.e., a high frequency component is also reduced.

3. 发明专利

JPH05218900A HIGH-SPEED PULL-IN CIRCUIT FOR AUTOMATIC LINE EQUALIZER 失效
公开(公告)号：JPH05218900A
公开(公告)日：1993-08-27
申请号：JP2011292
申请日：1992-02-05
申请人： FUJITSU LTD
发明人： MARUYAMA KAZUYOSHI , TANIGUCHI KIYOSHI
IPC分类号： H04B3/06 , H04Q3/42
摘要： PURPOSE:To shorten pull-in time by completing charging to a capacitor in a short time by providing a capacitor discharging voltage limit part to limit the decrease of the voltage value of the capacitor caused by discharging until reaching a prescribed value. CONSTITUTION:Received signals amplified by a variable amplifier 1 are inputted to comparators 3 and 4. When the peak is detected by the comparator 3, a capacitor 53 of a voltage conversion part 5 is charged. When the received signals are interrupted, a diode 64 of a high-speed pull-in circuit 6 is conducted, and the capacitor 53 is discharged at high speed through a resistor 65. When the voltage value of the capacitor 53 is decreased and reaches the prescribed finite voltage value, a diode 71 of a capacitor discharging voltage limit part 7 is turned to a conductive state, and a voltage corresponding to the prescribed finite voltage value is impressed from a power source to the capacitor 53. Therefore, the decrease of the voltage value of the capacitor 53 caused by discharging is limited to reach the prescribed finite voltage value corresponding to the maximum amplifying characteristic of the variable amplifier 1.

4. 发明专利

JPH01145742A FREQUENCY FLUCTUATION DETECTING DEVICE 失效
公开(公告)号：JPH01145742A
公开(公告)日：1989-06-07
申请号：JP30371987
申请日：1987-12-01
申请人： FUJITSU LTD
发明人： MARUYAMA KAZUYOSHI
IPC分类号： G06F11/30
摘要： PURPOSE:To improve the accuracy for detecting a frequency fluctuation by setting a frequency division ratio so that an average value of a frequency becomes a prescribed value and comparing the frequencies of a reference signal which divided a clock signal to the frequency division ratio and a check signal. CONSTITUTION:An oscillator 111 generates a clock signal, and the clock signal is supplied to a frequency dividing means 121. A frequency division ratio setting means 131 sets a frequency division ratio of the frequency dividing means 121 so that an average value of a frequency of a reference signal 123 becomes a prescribed value, and supplies information related to the frequency division ratio of each cycle to the frequency dividing means 121. Also, a comparing means 141 compares frequencies of the reference signal 123 supplied from the frequency dividing means 121 and a check signal. In such a way, the accuracy for detecting a frequency fluctuation can be improved.

5. 发明专利

JP2001251389A SUBSCRIBER TERMINATOR 失效
公开(公告)号：JP2001251389A
公开(公告)日：2001-09-14
申请号：JP2000061266
申请日：2000-03-06
申请人： FUJITSU LTD
发明人： MARUYAMA KAZUYOSHI , OI MASAKAZU
IPC分类号： H04M3/22 , H04L29/10 , H04L29/14 , H04M3/00 , H04M3/12 , H04Q3/42 , H04L12/02
摘要： PROBLEM TO BE SOLVED: To provide a subscriber terminator that automatically switches subscribers contained in a faulty subscriber termination package to a relief package without the use of an exclusive switch package and replaces the faulty package without interrupting communication of the subscribers contained in the faulty package. SOLUTION: A common section 31 selects a couple of subscriber termination packages (LT#1 and LT#2) consisting of a 1st subscriber termination package LT#1 and a 2nd subscriber termination package LT#2 and the 2nd subscriber termination package LT#2 is assigned to a bypass package that makes electric connection between a subscriber terminal 1-1-1 and a relief package LT#RS when the 1st subscriber termination package LT#1 becomes out of order.

6. 发明专利

JPH11242609A BACK WIRING BOARD AND ASSEMBLY THEREFOR 失效
公开(公告)号：JPH11242609A
公开(公告)日：1999-09-07
申请号：JP4390498
申请日：1998-02-25
申请人： FUJITSU LTD
发明人： NAKAJIMA NAOYUKI , KOBAYASHI TOSHIJI , HAMANAKA NAOTO , MARUYAMA KAZUYOSHI , TANAKA MASAHIRO
IPC分类号： G06F11/22 , H04M3/00 , H04M3/30 , H04Q1/10 , H04Q1/20
摘要： PROBLEM TO BE SOLVED: To make a device compact, to eliminate the connection error by a maintenance person and to reduce the total number of testing devices to be loaded when connecting a printed circuit board package and testing devices to be loaded on a back wiring board. SOLUTION: A reception part receives a test request signal from an external controller and corresponding to the test request signal, a selection part selects any one of plural testing devices 300a-300m connected to an adapter connector CAN and connects it to printed circuit board packages 212a-212n. It is preferable that a connector for group connects plural back wiring boards 213 and any one of testing devices 300a-300m is selected and connected only to the printed wiring board connected to one back wiring board 213 in that board group by the above selection part.

7. 发明专利

JPH11112455A LINE TERMINATOR 失效
公开(公告)号：JPH11112455A
公开(公告)日：1999-04-23
申请号：JP27138897
申请日：1997-10-03
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , NEC CORP , HITACHI LTD , OKI ELECTRIC IND CO LTD
发明人： GOTODA TAKAO , MARUYAMA KAZUYOSHI , YAMANO SEIICHI , OKAMURA MASAJI , KUDO TOSHIYUKI , YOSHINO TOSHIAKI , KOMATSU KAZUTOSHI , TAKAHASHI AKIHIRO , TAJIMI NOBURO
IPC分类号： H04J3/06 , H04L7/08
摘要： PROBLEM TO BE SOLVED: To eliminate the need for a reset circuit in the case of interruption of a channel clock in a line terminator that sets up frame synchronization by using a time division multiplex transmission system and to allow a frame counter circuit to indicate the same count as a frame identification number even when a period of the channel clock is fluctuated. SOLUTION: A reception data fetch circuit 1 fetches channel data and a frame identification number only when a channel clock is received or preferably when the channel clock and an internal clock are simultaneously received, and a reception data latch circuit 2 latches multi-frame data by one multi-frame and the frame identification number based on the internal clock. Furthermore, a frame counter circuit 5 counts frames according to the channel clock or the internal clock based on a discrimination result by a discrimination circuit that discriminates a period of the channel clock preferably.

8. 发明专利

JPH09294117A CLOCK INTERRUPTION DETECTION CIRCUIT 失效
公开(公告)号：JPH09294117A
公开(公告)日：1997-11-11
申请号：JP10696596
申请日：1996-04-26
申请人： OKI ELECTRIC IND CO LTD , NIPPON TELEGRAPH & TELEPHONE , NEC CORP , FUJITSU LTD , HITACHI LTD
发明人： KOMATSU KAZUTOSHI , TAKAHASHI AKIHIRO , OKAMURA MASAJI , YAMANO SEIICHI , KUDO TOSHIYUKI , GOTODA TAKAO , ONO MICHIAKI , TAJIMI NOBURO , MATSUDA TORU , MARUYAMA KAZUYOSHI
IPC分类号： H03K5/19 , H04L7/00
摘要： PROBLEM TO BE SOLVED: To provide a clock interruption detection circuit detecting accurately interruption of a superimposed clock. SOLUTION: An edge detection section 10 generates an edge detection signal S10 of a superimposed clock PCK. A master clock MCK is frequency-divided by a frequency division counter section 20 into a clock S20. The clock S20 is given to a phase shift section 30, in which a clock S30 is generated. The clock PCK is sampled by a clock missing detection section 40, in which an (on-off-on) pattern detection signal S40a and an off pattern detection signal S40b are generated. Furthermore, the clock S20 is frequency-divided by a frequency division counter section 60, in which a count S60ct of a 400Hz clock is generated. After the (on-off-on) pattern detection signal S40a is detected based on a timing of the clock S20 by an interrupt detection protection section 50, number of times of the generation of the (on-off-on) pattern detection signal S40a and the off pattern detection signal S40b is respectively counted in a timing of the count S60ct and when the count reaches a preset protection stage number, a clock interrupt detection signal S50D is generated.

9. 发明专利

JPH0613824A HIGH SPEED LEAD-IN CIRCUIT FOR LINE EQUALIZER 失效
公开(公告)号：JPH0613824A
公开(公告)日：1994-01-21
申请号：JP17064192
申请日：1992-06-29
申请人： FUJITSU LTD
发明人： MARUYAMA KAZUYOSHI , TANIGUCHI KIYOSHI
IPC分类号： H03G3/30 , H04B3/06
摘要： PURPOSE:To automatically set the equalization characteristic available to all lines with use of only the transmitted signals in regard of a high speed lead-in circuit used for a line equalizer. CONSTITUTION:A variable amplifier 3 is provided to a line equalizer together with a signal level detector 6 and a controller 4. Thus the line equalizer can control the gain of the amplifier 3 in response to the peak voltage of the detected signal. Then a convergence decider 5 is added to the line equalizer to change the value of a resistor 42 which controls the current that charges a capacitor 41 in accordance with the charging state of the capacitor 41 contained in the controller 4.

10. 发明专利

JPH04150695A AUTOMATIC SELECTION SYSTEM FOR BALANCE NETWORK 失效
公开(公告)号：JPH04150695A
公开(公告)日：1992-05-25
申请号：JP27553890
申请日：1990-10-15
申请人： FUJITSU LTD
发明人： OTA SHINJI , AWATA YUTAKA , MARUYAMA KAZUYOSHI , MANABE ATSUSHI
IPC分类号： H04Q1/56
摘要： PURPOSE:To use a continuous wave as a training pattern by comparing the power arithmetic result of a transpassed echo, and selecting an optimum balance element. CONSTITUTION:By selecting and connecting one element from the plural balance elements of a balance network 31 before starting a transmission, a hybrid circuit 3 where the transpassed echo is minimized is set. And the training pattern composed of a continuous pattern is transmitted from a transmitting line 21, the power of the transpassed echo leaking out to a receiving line 23 of the hybrid circuit 3 is obtained concerning all the balance elements, and the balance element where the power is minimized is selected. Thus, an isolated wave is not used for the training pattern, the exclusive part for the pull-in operation of the balance network 31 is reduced, and it is possible to simplify a device.

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