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1. 发明专利

JP2011055484A Driver circuit and test apparatus 审中-公开
标题翻译：驱动电路和测试装置
公开(公告)号：JP2011055484A
公开(公告)日：2011-03-17
申请号：JP2010175087
申请日：2010-08-04
申请人： Advantest Corp , 株式会社アドバンテスト
发明人： KUWANA YUJI , MATSUMOTO NAOKI , URABE YASUHIRO
IPC分类号： H03K19/0175 , G01R31/28 , H03K19/08
CPC分类号： H03F3/45
摘要： PROBLEM TO BE SOLVED: To achieve a high-versatility device that facilitates changing characteristics in accordance with applications.
SOLUTION: A driver circuit 10 outputs, from an output end, an output signal corresponding to an input signal supplied thereto, and includes: an output resistance 42 that is provided between a constant voltage source and the output end; an output switch 46 that switches voltage of the output end according to the input signal; and a switch 52 that switches a resistance value of the output resistance. The output resistance includes an output resistance FET having a source/drain connection between the constant voltage source and the output end, and the switch supplies a control voltage to a gate of the output resistance FET such that the resistance between the source and the drain of the output resistance FET switches to a designated value.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：实现根据应用有助于改变特性的高通用性装置。解决方案：驱动器电路10从输出端输出与提供给其的输入信号相对应的输出信号，并且包括：输出电阻42，其设置在恒定电压源和输出端之间; 输出开关46，根据输入信号切换输出端的电压; 以及切换输出电阻的电阻值的开关52。输出电阻包括在恒定电压源和输出端之间具有源极/漏极连接的输出电阻FET，并且开关向输出电阻FET的栅极提供控制电压，使得源极和漏极之间的电阻输出电阻FET切换到指定值。版权所有（C）2011，JPO＆INPIT

2. 发明专利

JP2008211620A Driver circuit 审中-公开
标题翻译：驱动电路
公开(公告)号：JP2008211620A
公开(公告)日：2008-09-11
申请号：JP2007047470
申请日：2007-02-27
申请人： Advantest Corp , 株式会社アドバンテスト
发明人： MATSUMOTO NAOKI , SEKINO TAKASHI
IPC分类号： H04L25/03 , H03K5/02 , H04L25/02
CPC分类号： H03K19/0175 , G01R31/31924 , H04L25/03343
摘要： PROBLEM TO BE SOLVED: To provide a driver circuit capable of generating a desired high band enhancing signal and a low band enhancing signal and simulating optional transmission loss by simple circuit configuration without requiring complicated and large-scale circuit configuration.
SOLUTION: In the driver circuit 10 which outputs an output signal with waveform according to an input signal, it has a main driver 14 in which the input signal is input to output a signal with the same waveform as that of the input signal as an output signal, a sub-driver 16 in which the input signal is input to output a differential signal comprised of a non-inverted signal with waveform obtained by inverting the input signal, a differentiation circuit constituted of resistors 28, 32 (34, 38) and a variable capacity capacitor 32 (38), which outputs a signal obtained by differentiating the non-inverted signal to output a signal obtained by differentiating the inverted signal and an addition part 26 which outputs the high band enhancing signal obtained by adding an output signal of the main driver 14 to the signal obtained by differentiating the non-inverted signal or the low band enhancing signal obtained by adding the output signal of the main driver 14 to the inversion signal as an output signal.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供能够产生期望的高频带增强信号和低频带增强信号的驱动电路，并且通过简单的电路配置来模拟可选的传输损耗，而不需要复杂和大规模的电路配置。解决方案：在根据输入信号输出具有波形的输出信号的驱动器电路10中，它具有主驱动器14，其中输入信号被输入以输出与输入信号相同波形的信号作为输出信号的子驱动器16输入输入信号的输出信号，通过使输入信号反相而获得的波形输出由非反相信号构成的差分信号，由电阻28,32（34）， 38）和可变容量电容器32（38），其输出通过对非反相信号进行微分而得到的信号，输出通过对反相信号进行微分而获得的信号，以及加法部26输出通过将主驱动器14的输出信号与通过将主驱动器14的输出信号相加而获得的非反相信号或低频增强信号进行微分而得到的信号作为反相信号，作为 n输出信号。版权所有（C）2008，JPO＆INPIT

3. 发明专利

JP2002107406A SEMICONDUCTOR TESTING DEVICE 失效
公开(公告)号：JP2002107406A
公开(公告)日：2002-04-10
申请号：JP2000302848
申请日：2000-09-29
申请人： ADVANTEST CORP
发明人： MATSUMOTO NAOKI
IPC分类号： G01R31/26 , G01R31/28
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor testing device capable of testing the output voltage outputted from the output end of a DUT(device under test) at a DC test according to the variety of the DUT to be measured in a sorter time and measuring a high output voltage outputted from the output end of the DUT. SOLUTION: This semiconductor testing device is provided with a buffer means receiving a DC voltage signal from the output end of the DUT, converting it into a prescribed voltage by buffering current, and outputting and feeding it to the receiving end of a DCTU(DC test unit) by driving a station cable CB. The settling time at the receiving end of the DCTU can be shortened.

4. 发明专利

JP2010243484A Tester and driver circuit 审中-公开
标题翻译：测试和驱动电路
公开(公告)号：JP2010243484A
公开(公告)日：2010-10-28
申请号：JP2010058361
申请日：2010-03-15
申请人： Advantest Corp , 株式会社アドバンテスト
发明人： URABE YASUHIRO , MATSUMOTO NAOKI , KUWANA YUJI
IPC分类号： G01R31/28
CPC分类号： G01R31/31924 , H04L25/0278
摘要： PROBLEM TO BE SOLVED: To prevent attenuation of high-frequency components in an output signal, as to a tester and a driver circuit.
SOLUTION: This tester for testing a device under test, includes the driver circuit for generating an output signal corresponding to a predetermined input pattern to supply it to the device under test, and a measuring part for measuring a response signal output by the device under test, to determine whether or not the device under test, is satisfactory. The driver circuit comprises an input terminal for receiving the input pattern, a switch operating correspondingly to the logical value of the input pattern to generate an output signal, and an emphasis component generator provided between the input terminal and the switch for generating an emphasis component corresponding to a predetermined high-frequency component of the input pattern to superpose the emphasis component on a voltage given to the switch.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了防止输出信号中的高频分量对测试器和驱动电路的衰减。用于测试被测器件的测试器包括用于产生对应于预定输入模式的输出信号的驱动器电路，以将其提供给被测器件;以及测量部分，用于测量由被测设备，判断被测设备是否满意。驱动器电路包括用于接收输入模式的输入端子，对应于输入模式的逻辑值进行操作以产生输出信号的开关，以及设置在输入端子和开关之间的强调元件发生器，用于产生对应的加重元件到预定的输入模式的高频分量，以将强调分量叠加在给开关的电压上。版权所有（C）2011，JPO＆INPIT

5. 发明专利

JP2005217949A Driver circuit 有权
标题翻译：驱动电路
公开(公告)号：JP2005217949A
公开(公告)日：2005-08-11
申请号：JP2004024464
申请日：2004-01-30
申请人： Advantest Corp , 株式会社アドバンテスト
发明人： MATSUMOTO NAOKI , SEKINO TAKASHI
IPC分类号： H03K5/02 , G01R31/319 , H03F3/30 , H03F3/45 , H03K19/0175
CPC分类号： G01R31/31924 , H03F3/3076 , H03F3/45085 , H03F2200/504 , H03F2200/516 , H03F2203/45508 , H03F2203/45702 , H03F2203/7203
摘要： PROBLEM TO BE SOLVED: To provide a driver circuit that has low power consumption and high voltage accuracy.
SOLUTION: This driver circuit outputs an output signal corresponding to a given input signal, and is provided with: a voltage generating part for outputting output basic voltage corresponding to the input signal; a first buffer circuit for outputting output voltage corresponding to the output basic voltage outputted by the voltage generating part; a second buffer circuit that has greater power consumption than the first buffer circuit, generates voltage corresponding to the output voltage and outputs the voltage as an output signal; a simulation circuit that has a simulation buffer circuit with almost the same characteristic as that of the first buffer circuit and generates simulation voltage corresponding to the output basic voltage outputted by the voltage generating part; and a control part for controlling the output basic voltage outputted by the voltage generating part on the basis of the simulation voltage.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供具有低功耗和高电压精度的驱动电路。解决方案：该驱动器电路输出与给定输入信号对应的输出信号，并具有：电压产生部分，用于输出与输入信号相对应的输出基本电压; 第一缓冲电路，用于输出与由电压产生部输出的输出基本电压对应的输出电压; 具有比第一缓冲电路大的功耗的第二缓冲电路，产生与输出电压相对应的电压，并输出该电压作为输出信号; 仿真电路具有与第一缓冲电路几乎相同特性的仿真缓冲电路，并产生与电压产生部分输出的输出基本电压对应的模拟电压; 以及控制部，其基于模拟电压来控制由电压产生部输出的输出基本电压。版权所有（C）2005，JPO＆NCIPI

6. 发明专利

JP2013098599A Driver circuit and testing apparatus 审中-公开
标题翻译：驱动电路和测试装置
公开(公告)号：JP2013098599A
公开(公告)日：2013-05-20
申请号：JP2011236735
申请日：2011-10-28
申请人： Advantest Corp , 株式会社アドバンテスト
发明人： WATANABE SHOJI , SOEDA KENSUKE , MATSUMOTO NAOKI
IPC分类号： H03K19/0175 , G01R31/28 , H03K19/082
CPC分类号： G01R31/31924
摘要： PROBLEM TO BE SOLVED: To keep a response characteristic of an output signal and a current consumption constant.SOLUTION: A driver circuit for outputting an output signal whose voltage depends on logic of input signals is provided which includes: a constant voltage generation section for generating a constant bias voltage; a current mode logic circuit for outputting the output signal whose voltage depends on the logic of the input signals in which the amplitude of the output signal is determined by a current value of an internal flow of constant current and the potential of the output signal is determined by a voltage value of the bias voltage; an adjusting constant current source for developing a flow of constant current of a set current value from an output end for the bias voltage of the constant voltage generation section; and a current setting section for presetting the current value of the flow of constant current into the adjusting constant current source in accordance with the current value of the flow of constant current in the current mode logic circuit.
摘要翻译：要解决的问题：保持输出信号的响应特性和电流消耗常数。解决方案：提供一种用于输出电压取决于输入信号逻辑的输出信号的驱动电路，其包括：用于产生恒定偏置电压的恒压产生部分; 电流模式逻辑电路，用于输出其电压取决于输入信号的逻辑的输出信号，其中输出信号的幅度由恒定电流的内部流量的电流值和输出信号的电位确定通过偏置电压的电压值; 调整恒流源，用于从恒定电压产生部分的偏置电压的输出端形成设定电流值的恒定电流; 以及电流设定部，用于根据电流模式逻辑电路中的恒定电流的当前值，将恒流电流的当前值预设到调节恒流源中。版权所有（C）2013，JPO＆INPIT

7. 发明专利

JP2011044780A Driver circuit and test device using the same 有权
标题翻译：驱动电路和使用其的测试装置
公开(公告)号：JP2011044780A
公开(公告)日：2011-03-03
申请号：JP2009189967
申请日：2009-08-19
申请人： Advantest Corp , 株式会社アドバンテスト
发明人： KUWANA YUJI , MATSUMOTO NAOKI , URABE YASUHIRO
IPC分类号： H03K19/0175 , G01R31/3183 , H03F1/56 , H03K19/013
CPC分类号： H03K19/001 , H03K17/04126 , H03K19/0136 , H03K2217/0036
摘要： PROBLEM TO BE SOLVED: To provide a high-speed driver circuit, since high-speed operation is required also to a driver circuit, according to the recent acceleration of a semiconductor device. SOLUTION: A level switch circuit 20 receives a digital input signal IN, and generates a level signal sig having voltage levels vih and vil corresponding to the value thereof. A buffer circuit 30 receives the level signal sig, and outputs the level signal sig from an output terminal 7. A bias current generation circuit 40 generates a bias current i_bias including a direct current i_dc of a fixed level and a fluctuating component i_dyn fluctuating in accordance with the input signal IN, and supplies the bias current i_bias to the buffer circuit 30. The bias current generation circuit 40 detects an edge of the input signal IN, and increases the bias current i_bias only by a predetermined amount for predetermined periods Tr and Tf from an edge. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供高速驱动电路，由于根据半导体器件的最近的加速度，驱动电路也需要高速操作。解决方案：电平切换电路20接收数字输入信号IN，并产生具有对应于其值的电压电平vih和vil的电平信号sig。缓冲电路30接收电平信号sig，并从输出端子7输出电平信号sig。偏置电流产生电路40产生包括固定电平的直流电流i_dc和根据变化的波动分量i_dyn的偏置电流i_bias 输入信号IN，并将偏置电流i_bias提供给缓冲电路30.偏置电流产生电路40检测输入信号IN的边沿，并且将预定量的偏置电流i_bias增加预定时间段Tr和Tf 从边缘。版权所有（C）2011，JPO＆INPIT

8. 发明专利

JP2010230668A Test apparatus and driver circuit 审中-公开
标题翻译：测试装置和驱动电路
公开(公告)号：JP2010230668A
公开(公告)日：2010-10-14
申请号：JP2010058353
申请日：2010-03-15
申请人： Advantest Corp , 株式会社アドバンテスト
发明人： URABE YASUHIRO , MATSUMOTO NAOKI , KUWANA YUJI
IPC分类号： G01R31/28
CPC分类号： G01R31/2889 , G01R31/31924
摘要： PROBLEM TO BE SOLVED: To match an output impedance with a characteristic impedance of a transmission line.
SOLUTION: This test apparatus tests a device under test. The test apparatus is provided with: a driver circuit that generates an output signal according to a prescribed input pattern, and supplies the output signal to the device under test; and a measuring section that measures a response signal output by the device under test to determine the acceptability of the device under test. The driver circuit has: an input gate drive section that selects one of a plurality of input drive voltages supplied thereto, according to a logic value of the input pattern, and outputs the selected input drive voltage; a voltage switching section that has a transistor and outputs the output signal according to the drain voltage of the transistor, the transistor having a gate terminal that receives the input side drive voltage outputted by the input side gate drive section and a source terminal to which a prescribed reference voltage is applied; and an input side drive voltage supplying section that generates the input side drive voltages corresponding to the reference voltage and supplies the input drive voltages to the input side gate drive section.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：将输出阻抗与传输线的特性阻抗相匹配。
解决方案：该测试设备测试被测设备。该测试装置具有：驱动电路，根据规定的输入模式产生输出信号，并将该输出信号提供给被测设备; 以及测量部，其测量被测器件输出的响应信号，以确定被测器件的可接受性。驱动器电路具有：输入栅极驱动部，根据输入图案的逻辑值选择供给的多个输入驱动电压中的一个，并输出所选择的输入驱动电压; 电压切换部，其具有晶体管，并根据晶体管的漏极电压输出输出信号，所述晶体管具有接收由所述输入侧栅极驱动部输出的输入侧驱动电压的栅极端子和源极端子，施加规定的参考电压; 以及输入侧驱动电压供给部，其生成与基准电压对应的输入侧驱动电压，并将输入驱动电压输入到输入侧栅极驱动部。版权所有（C）2011，JPO＆INPIT

9. 发明专利

JP2008219718A Driver circuit 审中-公开
标题翻译：驱动电路
公开(公告)号：JP2008219718A
公开(公告)日：2008-09-18
申请号：JP2007056983
申请日：2007-03-07
申请人： Advantest Corp , 株式会社アドバンテスト
发明人： MATSUMOTO NAOKI , SEKINO TAKASHI , NAKAMURA TAKAYUKI
IPC分类号： H04L25/03 , G01R31/28 , H03K5/12 , H03K5/125 , H04B3/04 , H04L25/02
CPC分类号： H03K19/01806 , G01R31/318357 , H04B3/144 , H04B3/40 , H04L25/0286
摘要： PROBLEM TO BE SOLVED: To provide a driver circuit capable of realizing an accurate test of a high-frequency emphasis circuit built in a DUT, by variably generating a simulation signal simulating a signal that receives transmission loss, without requiring complex circuit configuration. SOLUTION: A driver circuit 10 which outputs a simulation signal simulating a signal which receives a transmission loss in response to the input signal includes: a main driver 18 which inputs the input signal and outputs a signal of the same waveform as the input signal as an output signal; a sub driver 20 which inputs the input signal and outputs a signal of a waveform with the input signal inverted as the output signal; a high-frequency emphasis circuit 22 which inputs the output signal of the sub driver 20 and outputs a signal emphasizing the high frequency of the output signal of the sub driver 20 as an output signal; and an adder circuit 24, which outputs a simulation signal adding the output signal of the main driver 18 and the output signal of the high-frequency emphasis circuit 22. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种驱动电路，其能够通过可变地产生模拟接收传输损耗的信号的模拟信号，而不需要复杂的电路配置来实现DUT内部的高频加重电路的精确测试。解决方案：驱动电路10输出模拟响应于输入信号接收传输损耗的信号的模拟信号，包括：主驱动器18，其输入输入信号并输出与输入相同波形的信号信号作为输出信号; 子驱动器20，其输入输入信号并输出具有反相的输入信号作为输出信号的波形信号; 输入子驱动器20的输出信号并输出强调副驱动器20的输出信号的高频信号作为输出信号的高频加重电路22; 以及加法器电路24，其输出将主驱动器18的输出信号和高频加重电路22的输出信号相加的模拟信号。（C）2008，JPO＆INPIT

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