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1. 发明专利

JP2012164937A Semiconductor device, manufacturing method of the same and power supply device 有权
标题翻译：半导体器件及其制造方法及电源装置
公开(公告)号：JP2012164937A
公开(公告)日：2012-08-30
申请号：JP2011026232
申请日：2011-02-09
申请人： Fujitsu Ltd , 富士通株式会社
发明人： OKAMOTO KEISHIRO , IMADA TADAHIRO , IMAIZUMI NOBUHIRO , WATABE KEIJI
IPC分类号： H01L23/29 , C09K3/10 , H01L21/338 , H01L23/31 , H01L29/778 , H01L29/812
CPC分类号： H01L23/3135 , H01L23/3121 , H01L23/3142 , H01L24/45 , H01L24/48 , H01L2224/05553 , H01L2224/05554 , H01L2224/0603 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/48257 , H01L2224/48472 , H01L2224/8592 , H01L2924/09701 , H01L2924/13064 , H01L2924/181 , H01L2924/00014 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To inhibit deterioration in device property while keeping humidity resistance and voltage resistance.SOLUTION: A semiconductor device comprises a semiconductor chip 1 provided with a nitride semiconductor laminate structure including a carrier travel layer and a carrier supply layer, a first resin layer 5 covering a surface of the semiconductor chip and containing a coupling agent, a second resin layer 6 covering a surface of the first resin layer and containing a surface active agent, and an encapsulation resin layer 7 encapsulating the semiconductor chip covered with the first resin layer and the second resin layer.
摘要翻译：要解决的问题：抑制耐湿性和耐电压性的装置性能的劣化。解决方案：半导体器件包括设置有包括载流子行进层和载体供给层的氮化物半导体层叠结构的半导体芯片1，覆盖半导体芯片的表面并包含偶联剂的第一树脂层5，覆盖第一树脂层的表面并含有表面活性剂的第二树脂层6和封装有被第一树脂层和第二树脂层覆盖的半导体芯片的封装树脂层7。版权所有（C）2012，JPO＆INPIT

2. 发明专利

JP2011023478A Semiconductor device, and method of manufacturing the same 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2011023478A
公开(公告)日：2011-02-03
申请号：JP2009165960
申请日：2009-07-14
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IMADA TADAHIRO
IPC分类号： H01L21/8232 , H01L21/205 , H01L21/28 , H01L21/336 , H01L21/338 , H01L21/822 , H01L21/8234 , H01L27/04 , H01L27/06 , H01L27/088 , H01L27/095 , H01L29/12 , H01L29/417 , H01L29/778 , H01L29/78 , H01L29/80 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device of which the breakage due to an overvoltage can be suppressed, and to provide a method of manufacturing the same. SOLUTION: As one embodiment of the semiconductor device, a semiconductor device includes: a plurality of vertical transistors 32 which are connected to one another in parallel and each of which includes a gate electrode 10, a source electrode 9 and a drain electrode 15; and a diode 31 individually surrounding the plurality of vertical transistors 32. An anode 11 of the diode 31 is connected to the source electrode 9 and a cathode 1 of the diode is connected to the drain electrode 15. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供可以抑制由过电压引起的断裂的半导体器件，并提供其制造方法。解决方案：作为半导体器件的一个实施例，半导体器件包括：并联连接的多个垂直晶体管32，每个垂直晶体管32包括栅电极10，源电极9和漏电极 15; 以及分别围绕多个垂直晶体管32的二极管31.二极管31的阳极11连接到源电极9，二极管的阴极1连接到漏电极15.版权所有（C） 2011年，JPO＆INPIT

3. 发明专利

JP2008205369A Wet-etching method 有权
标题翻译：湿蚀刻方法
公开(公告)号：JP2008205369A
公开(公告)日：2008-09-04
申请号：JP2007042303
申请日：2007-02-22
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IMADA TADAHIRO , NAKADA YOSHIHIRO , NOZAKI KOJI
IPC分类号： H01L21/306 , H01L21/768
CPC分类号： H01L21/67086 , H01L21/31111 , H01L21/31133 , H01L21/3143 , H01L21/31612 , H01L21/31633 , H01L21/6708 , H01L21/76802 , H01L21/76807 , H01L21/76825
摘要： PROBLEM TO BE SOLVED: To provide a technology which inhibits damage to an object to be wet-etched due to an etching liquid in wet-etching and can obtain a fine etching figure.
SOLUTION: The wet-etching method which etches an object using an etching liquid irradiates a laser beam to the object in etching.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种技术，其抑制由于在湿蚀刻中的蚀刻液体而被湿蚀刻的物体的损坏，并且可以获得精细的蚀刻图。解决方案：使用蚀刻液蚀刻物体的湿蚀刻方法在蚀刻中将激光照射到物体。版权所有（C）2008，JPO＆INPIT

4. 发明专利

JP2012204503A Compound semiconductor device and method of manufacturing the same 有权
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：JP2012204503A
公开(公告)日：2012-10-22
申请号：JP2011066273
申请日：2011-03-24
申请人： Fujitsu Ltd , 富士通株式会社
发明人： NISHIMORI MICHIHITO , IMADA TADAHIRO
IPC分类号： H01L21/338 , H01L21/28 , H01L21/336 , H01L21/337 , H01L29/41 , H01L29/778 , H01L29/78 , H01L29/808 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a compound semiconductor device that can improve the operating efficiency while maintaining pinch-off characteristics and to provide a method of manufacturing the same.SOLUTION: A compound semiconductor device comprises: a substrate 11; an electron transit layer 12 that is provided on the substrate 11; an electron supply layer 13 that is provided on the electron transit layer 12; a source electrode 15s and a drain electrode 15d that are provided on the electron supply layer 13; and a first gate electrode 15g-1 and a second gate electrode 15g-2 that are provided between the source electrode 15s and the drain electrode 15d, above the electron supply layer 13. The work function of the first gate electrode 15g-1 is lower than that of the second gate electrode 15g-2.
摘要翻译：要解决的问题：提供一种可以在保持夹断特性的同时提高工作效率并提供其制造方法的化合物半导体器件。解决方案：化合物半导体器件包括：衬底11; 设置在基板11上的电子转移层12; 设置在电子传输层12上的电子供给层13; 设置在电子供给层13上的源电极15s和漏电极15d; 以及设置在源极电极15s和漏极电极15d之间的第一栅电极15g-1和第二栅电极15g-2，在电子供给层13的上方。第一栅电极15g-1的功函数较低比第二栅极电极15g-2的厚度大。版权所有（C）2013，JPO＆INPIT

5. 发明专利

JP2012178416A Compound semiconductor device and manufacturing method of the same 有权
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：JP2012178416A
公开(公告)日：2012-09-13
申请号：JP2011039921
申请日：2011-02-25
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IMADA TADAHIRO , YOSHIKAWA SHUNEI
IPC分类号： H01L21/338 , H01L21/28 , H01L21/336 , H01L21/337 , H01L29/06 , H01L29/41 , H01L29/417 , H01L29/47 , H01L29/778 , H01L29/78 , H01L29/786 , H01L29/808 , H01L29/812 , H01L29/872
CPC分类号： H01L29/7787 , H01L29/0619 , H01L29/2003 , H01L29/205 , H01L29/4236 , H01L29/66462 , H01L2224/0603 , H01L2224/48247 , H01L2224/48472 , H01L2924/181 , H03F1/3247 , H03F1/523 , H03F3/189 , H03F3/24 , H03F2200/204 , H03F2200/426 , H03F2200/444 , H03F2200/451 , H01L2924/00 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To achieve a highly reliable HEMT of a high breakdown voltage which enables an excellent normally-off operation; has a high avalanche resistance; requires no external diode to be connected; and can securely achieve a stable operation.SOLUTION: A gate electrode 7 is formed in such a manner as to fill an electrode recess 2C formed in a compound semiconductor lamination structure 2 with an electrode material via a gate insulation film 6. And a field plate electrode 8 forming a schottky contact with the compound semiconductor lamination structure 2 is formed in such a manner as to fill an electrode recess 2D formed in the compound semiconductor lamination structure 2 with an electrode material so as to directly contact with the compound semiconductor lamination structure 2 on at least a bottom surface of the electrode recess 2D.
摘要翻译：要解决的问题：实现高耐压HEMT的高击穿电压，能够实现良好的常停动作; 具有高雪崩阻力; 不需要连接外部二极管; 并可以安全地实现稳定运行。解决方案：栅电极7以通过栅极绝缘膜6填充由化合物半导体层叠结构体2形成的电极凹部2C与电极材料的方式形成。并且，形成肖特基与化合物半导体层叠结构体2的接触形成为以电极材料填充形成在化合物半导体层叠结构体2中的电极凹部2D，以在至少底部与化合物半导体层叠结构体2直接接触电极凹槽2D的表面。版权所有（C）2012，JPO＆INPIT

6. 发明专利

JP2012054471A Semiconductor device, method of manufacturing the same, and power supply device 审中-公开
标题翻译：半导体器件，其制造方法和电源装置
公开(公告)号：JP2012054471A
公开(公告)日：2012-03-15
申请号：JP2010197063
申请日：2010-09-02
申请人： Fujitsu Ltd , 富士通株式会社
发明人： ENDO HIROSHI , IMADA TADAHIRO , IMANISHI KENJI , YOSHIKAWA SHUNEI
IPC分类号： H01L21/338 , H01L21/306 , H01L21/3065 , H01L21/308 , H01L21/822 , H01L21/8232 , H01L27/04 , H01L27/06 , H01L29/778 , H01L29/78 , H01L29/812
CPC分类号： H01L29/7787 , H01L21/30612 , H01L21/30621 , H01L21/8252 , H01L27/0605 , H01L29/2003 , H01L29/205 , H01L29/4236 , H01L29/518 , H01L29/66462
摘要： PROBLEM TO BE SOLVED: To enable stable control of depth of a gate recess to allow constant production of a normally-off operation device.SOLUTION: A semiconductor device comprises: a GaN electron travel layer 2 provided on a substrate 1; a first AlGaN electron supply layer 3 provided on the GaN electron travel layer 2; an AlN electron supply layer 4 provided on the first AlGaN electron supply layer 3; a second AlGaN electron supply layer 5 provided on the AlN electron supply layer 4; a gate recess 9 provided to the second AlGaN electron supply layer 5 and the AlN electron supply layer 4; and a gate electrode 12 provided in the gate recess 9.
摘要翻译：要解决的问题：为了能够稳定地控制栅极凹部的深度，以允许恒定地产生常闭操作装置。解决方案：半导体器件包括：设置在基板1上的GaN电子行进层2; 设置在GaN电子行进层2上的第一AlGaN电子供给层3; 设置在第一AlGaN电子供给层3上的AlN电子供给层4; 设置在AlN电子供给层4上的第二AlGaN电子供给层5; 设置在第二AlGaN电子供给层5和AlN电子供给层4上的栅极凹部9; 以及设置在门槽9中的栅电极12.版权所有（C）2012，JPO＆INPIT

7. 发明专利

JP2007141875A Material for forming adhesion reinforcing layer, adhesion reinforcing layer, semiconductor device and its fabrication process 有权
标题翻译：用于形成粘合增强层，粘合增强层，半导体器件及其制造工艺的材料
公开(公告)号：JP2007141875A
公开(公告)日：2007-06-07
申请号：JP2005329088
申请日：2005-11-14
申请人： Fujitsu Ltd , 富士通株式会社
发明人： KON JUNICHI , YANO EI , NAKADA YOSHIHIRO , IMADA TADAHIRO
IPC分类号： H01L21/316 , H01L21/768 , H01L23/522
CPC分类号： C09D183/04 , H01L21/02126 , H01L21/02203 , H01L21/02216 , H01L21/02282 , H01L21/02304 , H01L21/3122 , H01L21/76807
摘要： PROBLEM TO BE SOLVED: To provide a material for forming an adhesion reinforcing layer which can reinforce adhesion of a low dielectric constant film and other material, especially adhesion of a low dielectric constant film formed of an inorganic material and other material, and to provide the adhesion reinforcing layer formed by using the material for forming the adhesion reinforcing layer and excellent in adhesion, a highly reliable high speed semiconductor device, and to provide its efficient fabrication process. SOLUTION: The material for forming the adhesion reinforcing layer contains organoalkoxysilane having a basic functional group, and at least any one of basic additive and organoalkoxysilane. The adhesion reinforcing layer is formed by using the material for forming the adhesion reinforcing layer. The process for fabricating a semiconductor device comprises a step of forming a low dielectric constant film on a substrate to be processed, and a step of forming the adhesion reinforcing layer by using the material for forming the adhesion reinforcing layer at least before or after the step for forming a low dielectric constant film. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于形成粘合增强层的材料，其可以增强低介电常数膜和其它材料的粘附性，特别是由无机材料和其它材料形成的低介电常数膜的粘附性，以及提供通过使用用于形成粘合增强层的材料形成的附着增强层和优异的粘合性，高可靠性的高速半导体器件，并提供其有效的制造工艺。解决方案：用于形成粘合增强层的材料含有具有碱性官能团的有机烷氧基硅烷，和碱性添加剂和有机烷氧基硅烷中的至少一种。通过使用用于形成粘合增强层的材料形成粘合增强层。制造半导体器件的方法包括在待加工基材上形成低介电常数膜的步骤，以及至少在步骤之前或之后通过使用用于形成粘合增强层的材料形成粘合增强层的步骤用于形成低介电常数膜。版权所有（C）2007，JPO＆INPIT

8. 发明专利

JP2007053300A Silica-based film, method for manufacturing the same, and semiconductor device 有权
标题翻译：二氧化硅膜，其制造方法和半导体器件
公开(公告)号：JP2007053300A
公开(公告)日：2007-03-01
申请号：JP2005238623
申请日：2005-08-19
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IMADA TADAHIRO
IPC分类号： H01L21/312 , B05D7/24 , H01L21/768
摘要： PROBLEM TO BE SOLVED: To provide a silica-based film which is excellent in a dielectric constant and a Young's modulus representing a film strength, and in particular, a method for forming the silica-based film which has a relative dielectric constant having a small value of 2.7 or less, and also, a strength characteristic in which the Young's modulus representing the film strength can endure a production process of a semiconductor wiring layer.
SOLUTION: (i) A coating agent for forming the silica-based film is coated on a substrate, (ii) the substrate after coating is heated, and (iii) active energy lines are irradiated on the substrate after heating in the atmosphere containing a substance which can stabilize unpaired electrons of silicon to obtain the silica-based film.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供介电常数和表现膜强度的杨氏模量优异的二氧化硅基膜，特别是形成具有相对介电常数的二氧化硅基膜的方法具有2.7以下的小值，并且还具有表示膜强度的杨氏模量能够承受半导体布线层的制造工序的强度特性。（i）用于形成二氧化硅基膜的涂布剂涂布在基板上，（ii）涂布后的基板被加热，（iii）在基板上照射加热后的活性能量线含有可稳定硅的不成对电子以获得二氧化硅基膜的物质的气氛。版权所有（C）2007，JPO＆INPIT

9. 发明专利

JP2014110393A Compound semiconductor device and manufacturing method of the same 审中-公开
标题翻译：化合物半导体器件及其制造方法
公开(公告)号：JP2014110393A
公开(公告)日：2014-06-12
申请号：JP2012265499
申请日：2012-12-04
申请人： Fujitsu Ltd , 富士通株式会社
发明人： NISHIMORI MICHIHITO , IMADA TADAHIRO , TAGI TOSHIHIRO
IPC分类号： H01L27/098 , H01L21/205 , H01L21/28 , H01L21/337 , H01L29/41 , H01L29/808
CPC分类号： H01L29/66462 , H01L29/42316 , H01L29/7787
摘要： PROBLEM TO BE SOLVED: To achieve a highly-reliable and high-voltage compound semiconductor device which has no deterioration in withstand voltage and no operation instability and obtain successfully large threshold voltage to successfully achieve normally-off in a simple constitution.SOLUTION: A compound semiconductor device comprises as each compound semiconductor layer: a first layer 3; a second layer 4 which is formed on the first layer 3 and has bandgap larger than that of the first layer 3; a third layer 5a which is formed on the second layer 4 and has a p-type conductivity type; a gate electrode 11 formed above the second layer 4 via the third layer 5a; a fourth layer 6 which is formed on the second layer 4 and in contact with the third layer 5a and which has bandgap smaller than that of the second layer 4; and a fifth layer 7 which is formed on the fourth layer 6 and in contact with the third layer 5a and which has bandgap larger than that of the fourth layer 6.
摘要翻译：要解决的问题：为了实现一种高可靠性和高电压的化合物半导体器件，其耐压没有劣化，并且没有操作不稳定性，并且获得了成功的大的阈值电压，从而在简单的结构中成功地实现了常态。解决方案：化合物半导体器件包括作为每个化合物半导体层：第一层3; 第二层4，其形成在第一层3上，并且具有比第一层3的带隙大的带隙; 第三层5a，其形成在第二层4上并具有p型导电型; 经由第三层5a形成在第二层4上方的栅电极11; 第四层6，其形成在第二层4上并且与第三层5a接触并且具有比第二层4的带隙小的带隙; 以及形成在第四层6上并与第三层5a接触并且具有比第四层6的带隙大的带隙的第五层7。

10. 发明专利

JP2014086491A Control circuit of transistor and power supply device 有权
标题翻译：晶体管和电源装置的控制电路
公开(公告)号：JP2014086491A
公开(公告)日：2014-05-12
申请号：JP2012232757
申请日：2012-10-22
申请人： Fujitsu Ltd , 富士通株式会社
发明人： IMADA TADAHIRO
IPC分类号： H01L29/812 , H01L21/338 , H01L29/06 , H01L29/778 , H02M3/155 , H03K17/06
CPC分类号： H03K17/063 , H02M2001/0054 , H03K17/567 , Y02B70/1483 , Y02B70/1491
摘要： PROBLEM TO BE SOLVED: To solve such a problem that when operating a GaN-HEMT with a high frequency large voltage, free electrons are captured by an electron trap level near the drain electrode side of a gate electrode, and the concentration of two-dimensional electron gas decreases and the source-drain on resistance increases to cause output reduction of the GaN-HEMT, and to provide a control circuit of a transistor in which the output of a GaN-HEMT is less likely to decrease by applying a positive potential to a field plate, and increasing the density of two-dimensional electron gas near the gate electrode, thereby improving the two-dimensional electron gas flow.SOLUTION: A control circuit of a transistor includes a drain voltage determination circuit for determining the drain voltage value of a transistor having a control electrode between gate-drain, and an electrode control circuit for applying a positive potential to the control electrode.
摘要翻译：要解决的问题为了解决这样一个问题，当操作具有高频大电压的GaN-HEMT时，通过栅电极的漏电极侧附近的电子阱电平捕获自由电子，并且二维电子气体减少，电阻 - 漏极导通电阻增加，导致GaN-HEMT的输出降低，并提供晶体管的控制电路，其中GaN-HEMT的输出不太可能通过施加正电位而降低场板，并且增加栅电极附近的二维电子气密度，从而改善二维电子气流。解决方案：晶体管的控制电路包括漏电压确定电路，用于确定漏极电压值晶体管，其具有栅 - 漏之间的控制电极和用于向控制电极施加正电位的电极控制电路。

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