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81. 发明专利

JPH10232875A DATA BASE MANAGING METHOD AND PARALLEL DATA BASE MANAGING SYSTEM 失效
公开(公告)号：JPH10232875A
公开(公告)日：1998-09-02
申请号：JP3502197
申请日：1997-02-19
申请人： HITACHI LTD
发明人： KOBAYASHI TAKA , YAMAMOTO YOICHI , TSUCHIDA MASASHI , NAKANO YUKIO , HARA NORIHIRO , KAMESHIRO YOSHITO
IPC分类号： G06F12/00 , G06F17/30
摘要： PROBLEM TO BE SOLVED: To improve system performance by preventing the overlap or concentration of processing for possessing input information by possessing the input information by executing an integrated module for input information possession on a request reception server according to recognition. SOLUTION: A request from an application program 101 is received from a request reception server 105. An inquiry processing control part 109 analyzes a user inquiry 104 while using an inquiry analytic part 110. As a result of this analysis, the execution procedure code pattern selected result is possessed. The inquiry processing control part 109 prepares an execution procedure code 111 while using an execution procedure code preparing part 114 based on the possessed execution procedure code pattern selected result. The inquiry processing control part 109 instructs an execution server 106 to perform processing matched with the request of user while using an execution instructing part 115 based on the possessed execution procedure code 111. The execution server 106 executes processing matched with the request and directly transmits the executed result through a communication path 108 to an executed result holding part 118.

82. 发明专利

JPH10117175A SELF-RELIEF NETWORK, ITS TRANSMISSION LINE CHANGEOVER METHOD AND TRANSMITTER 失效
公开(公告)号：JPH10117175A
公开(公告)日：1998-05-06
申请号：JP10553297
申请日：1997-04-23
申请人： HITACHI LTD
发明人： IKEDA HIROKI , SUGAWARA TOSHIKI , NAKANO YUKIO
IPC分类号： H04L1/22 , H04J3/00 , H04L12/28 , H04L12/437
摘要： PROBLEM TO BE SOLVED: To provide the transmitter that switches transmission lines with a high speed transmission rate and a small standby / active line ratio by which installation of active transmission lines is attained in matching with requirements of traffic and to provide its control method. SOLUTION: The transmitter is provided with an automatic protection switching(APS) byte transmission reception section 3 to exchange fault information with an adjacent transmitter via a standby transmission line 9, a monitor section 4 that monitors a fault in a plurality of active transmission lines 10, a network table 2 that stores data denoting a network configuration, and a processing section 1 that decides active transmission lines to be switched based on the stored data and processes APS bytes. The number of an active line, its priority and the outgoing node number of a switching signal are assigned to the APS bytes and the network table 2 storing a connection state of the network and the fault information is prepared to each node for the specification of an object node.

83. 发明专利

JPH1075222A MULTIPLEXED TRANSMITTER AND SIGNAL RECEIVER-TRANSMITTER 失效
公开(公告)号：JPH1075222A
公开(公告)日：1998-03-17
申请号：JP17352197
申请日：1997-06-30
申请人： HITACHI LTD
发明人： SUGAWARA TOSHIKI , NAKANO YUKIO , OHIRA MASATERU , MORI TAKASHI
IPC分类号： H04J3/00 , H04J3/12
摘要： PROBLEM TO BE SOLVED: To automatically deal with connected counter equipment through a multiplexed transmitter to which the counter equipment of synchronous optical network(SONET) or synchronous digital hierarchy(SDH) system is connected through a transmission line. SOLUTION: In this multiplexed transmitter consisting of a reception/ transmission part 1 for plural low-speed signals for housing the counter equipment of the SONET or SDH system, a multiplex/demultiplex converting part and a reception/transmission part 1 for the high-speed signals of SONET or SDH system, the reception/transmission part 1 for low-speed or high-speed signals comprises a reception side reception processing part 11 for receiving the SS bit of SONET/SDH signal received from the transmission line, an internal SS bit setting part 13 for defining the value of this received SS bit as an internal SS bit when this value is '10' or '00', a reception side transmission processing part 12 for turning the SS bit to '11' and transmitting it to the multiplex/demultiplex converting part at the transferring of alarm indication signal(AIS)-P, and a transmission side transmission processing part 22 for judging the SS bit equal with the internal SS bit concerning a signal from the multiplex/ demultiplex converting part and transmitting it to the transmission line.

84. 发明专利

JPH08316977A NETWORK CONTROLLING METHOD 失效
公开(公告)号：JPH08316977A
公开(公告)日：1996-11-29
申请号：JP12208295
申请日：1995-05-22
申请人： HITACHI LTD
发明人： NAKAMURA MASARU , NAKANO YUKIO
IPC分类号： H04B10/27 , H04B10/275 , H04B10/29 , H04L12/42 , H04L12/43 , H04B10/20
摘要： PURPOSE: To preferentially perform a ring switch by releasing a span switch when a node executing the span switch is requested to execute the ring switch in prior to the span switch. CONSTITUTION: When a node D detects signal faults in the input signals of the active channel and the reserve channel from a node E in a Time 1, the node D starts an SF-R and outputs 3a and 3b to the side of a node C and the side of the node E, respectively. Because the 3a to the other node with higher priority than the span switch in execution is received in a node C in a Time 2, the switch and bridge in a span switch system are released and a transition to a both-diretion K byte path through state is performed. Because the 3b to a self node is received in the node E, the transition from the both-direction K byte path through state to a ring switch state is performed, and a 4a K byte and a 4b K byte are outputted to the side of the node D and the side of a node F, respectively.

85. 发明专利

JPH07226736A FAULT RECOVERY METHOD IN MESH NETWORK 失效
公开(公告)号：JPH07226736A
公开(公告)日：1995-08-22
申请号：JP1711094
申请日：1994-02-14
申请人： HITACHI LTD
发明人： TAKATORI MASAHIRO , NAKANO YUKIO , ASHI MASAHIRO
IPC分类号： H04L29/14 , H04J3/08 , H04J3/14 , H04L1/22 , H04L12/437 , H04Q3/00 , H04Q11/04 , H04L12/00 , H04L12/24 , H04L12/26 , H04L12/42
摘要： PURPOSE:To obtain a restoration method with high reliability at a high speed by dividing logically a network into plural ring networks and a fault detection node communicates signaling over a closed range in the inside of the logical ring network. CONSTITUTION:When a fault takes place in a transmission line between nodes B and E, fault end nodes B, E make a fault recovery request and only nodes to be active are those belonging to logic rings #1, #2. When a VC-4 path comprises a path of A-B-E-F-I, the nodes B, E exchange a message and a bypass with respect to a traffic between the nodes B-E is decided independently by the logic rings #1, #2. The bypass of the traffic belonging to the logic ring #1 is B-A-D-E and the bypass of the traffic belonging to the logic ring #2 is B-C-F-E. In the case of the path above, since the path belongs to the logic ring #1 between the nodes B and E, a path after fault recovery is A-B-A-D-E-F-I. An active VC is used between the nodes A and B and among the nodes E-F-I and a standby VC is used among the nodes B-A-D-E.

86. 发明专利

JPH06214843A DATA BASE MANAGEMENT SYSTEM AND PROCESSING METHOD FOR INQUIRY 失效
公开(公告)号：JPH06214843A
公开(公告)日：1994-08-05
申请号：JP780493
申请日：1993-01-20
申请人： HITACHI LTD
发明人： TSUCHIDA MASASHI , NAKANO YUKIO , KAWAMURA NOBUO , NEGISHI KAZUYOSHI , TORII SHUNICHI
IPC分类号： G06F12/00 , G06F15/173 , G06F15/177 , G06F17/30
摘要： PURPOSE:To provide an inquiry processing method and data base management system for accelerating inquiry processing. CONSTITUTION:This data base management system, which is provided with plural nodes for data base processing and connects the plural nodes with the other nodes, is equipped with distributing nodes (nodes 1-8) provided with a storage means for distributedly storing the data base of an inquiry object and a distributing means for distributing information from the storage means to the other nodes, coupling nodes (nodes 9-11) provided with a rearranging means for distributed information, merge means for merging the information when there are plural kinds of information and collating means for inquiry based on the information, and decision managing node (node 12) provided with an analyzing means for preparing the processing sequence of inquiry by receiving the inquiry and analyzing it, deciding means for deciding the distributing node and the coupling node to perform execution processing based on the analyzed result, and output means for outputting the result corresponding to the inquiry provided from the coupling node.

87. 发明专利

JPH05244098A 失效
公开(公告)号：JPH05244098A
公开(公告)日：1993-09-21
申请号：JP4283592
申请日：1992-02-28
申请人： HITACHI LTD
发明人： TSUSHIMA HIDEAKI , SASAKI SHINYA , NAKANO YUKIO , NAKANO HIROYUKI , TAKEYARI RIYOUJI , MATSUDA HIRONARI
IPC分类号： G02B6/293 , G02B6/28 , G08C23/00 , G08C23/04 , G08C25/00 , H04B10/07 , H04B10/077 , H04B10/079 , H04B10/2537 , H04B10/29 , H04B10/293 , H04B17/40 , H04B10/08 , H04B17/02
摘要： PURPOSE:To transfer monitoring information without lowering the output power of an optical, fiber amplifier by providing an optical transmitter for monitoring which converts an electric signal for monitoring into an optical signal and an optical multiplexer/demultiplexer arranged behind a doped fiber at optical transmission equipment. CONSTITUTION:An input side optical multiplexer/demultiplexer 5-1 demultiplexes an input monitoring optical signal (d) from the optical signal inputted to an optical repeater, and simultaneously, multiplexes excitation light. A data optical signal (c) is amplified by the doped fibers 1-1, 1-2, and is inputted to an output side optical multiplexer/demultiplexer 5-2, and the input monitoring optical signal (d) is inputted to a monitoring device (b). The output side optical multiplexer/demultiplexer 5-2 outputs by multiplexing an output monitoring optical signal (f) outputted from an optical transmitter 11 for monitoring with an amplified data optical signal (e), and simultaneously, multiplexes the excitation light in a reverse direction. The monitoring device (b) is comprised of an optical receiver 6 for monitoring, a power splitter 7, an optical filter 8, a power monitor 9, a controller 10, and the optical transmitter 11 for monitoring.

88. 发明专利

JPH04250713A M SERIES GENERATING CIRCUIT 失效
公开(公告)号：JPH04250713A
公开(公告)日：1992-09-07
申请号：JP829491
申请日：1991-01-28
申请人： HITACHI LTD
发明人： SAWADA YASUSHI , NAKANO YUKIO , NISHIMURA SHIN
IPC分类号： H03K3/84 , H04J3/00
摘要： PURPOSE:To decrease the designing man-hour and to reduce the number of kinds of LSIs by selecting outputs of parallel M series generating circuit with a selector and scrambling different signals by the same circuit. CONSTITUTION:In the case of selecting an STM-16 signal in the M series generating circuit, a selector 33 is selected to apply all outputs S1-S8 as a parallel signal, and in the case of selecting an STM-4, the selector 33 selects only the signals S1, S5 as a parallel signal so as to use a scrambling circuit in common. Then the scrambling circuit for the STM-4 signal for 2-parallel configuration and the scrambling circuit for the STM-16 signal for 8-parallel configuration are shared. Then the selector 33 selects all the signals S1-S8 when the STM-16 signal is scrambled by using a selective signal and the selector 33 selects the signals S1, S5 when the STM-4 signal is scrambled. The clocking speed of the M series generating circuit is the same for both signals.

89. 发明专利

JPH04199994A TIME SWITCH 失效
公开(公告)号：JPH04199994A
公开(公告)日：1992-07-21
申请号：JP32598990
申请日：1990-11-29
申请人： HITACHI LTD
发明人： NAKANO YUKIO , SUGANO TADAYUKI
IPC分类号： H04Q3/52 , H04Q11/04
摘要： PURPOSE:To realize a time switch with large capacity, in which the speed of a circuit is not necessary to rise, by constituting the time switch by means of M-number of selecting circuits selecting one output from the outputs of N-number of data memories and M-number of output highways outputting data selected by means of the selecting circuits. CONSTITUTION:Data multiplexed in j-th (j=1, 2,...N) input highways 1 and 2 are written into j-th data memories 3 and 4 in a multiplexed order for respective frames. Written data for one frame are read from a k-th (k=1, 2,...M) output port in an order corresponding to the content of k-numbered control memories 6 and 7. Data in N-number of data memories 3 and 4 are simultaneously read from M-number of the output ports R1 and R2 in a mutually independent order. Then, data is selected in k-th selection circuits 8 and 9 in accordance with the contents of the k-th control memories 6 and 7 of respective data memories 3 and 4 and they are outputted to the k-th output highways. Thus, the time switch of large capacity, in which the speed of the circuit is prevented from arising can be obtained.

90. 发明专利

JPH04176229A ATM SWITCH, MULTIPLEXER AND ITS CONTROL METHOD 失效
公开(公告)号：JPH04176229A
公开(公告)日：1992-06-23
申请号：JP30240390
申请日：1990-11-09
申请人： HITACHI LTD
发明人： TAKATORI MASAHIRO , NAKANO YUKIO
摘要： PURPOSE:To realize a low abort rate by forming the switch with a single kind of switch modules only and sending a read inhibit signal to a switch module of one preceding stage when a cell abort due to buffer overflow is going to take place in any of the switch modules. CONSTITUTION:Switch modules are arranged to each stage so that number of the switch modules of each stage of a line concentration switch is selected twice the number of switch modules belong to one succeeding stage with respect to the stage to which the switch module belongs and an output of the switch module of each stage is connected to the input of the switch module of a stage succeeding to the stage to which the switch module belongs. When cell abort is going to take place in a buffer memory of any switch module, a read inhibit signal is sent to the switch module of the pre-stage to stop the output of the cell to the switch module of the post stage. When there is no possibility of occurrence of cell abort, the transmission of the read inhibit signal is stopped and the cell transmission is restarted.

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