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71. 发明专利

JPH0194304A OPTICAL WAVEGUIDE 失效
公开(公告)号：JPH0194304A
公开(公告)日：1989-04-13
申请号：JP25148187
申请日：1987-10-07
申请人： HITACHI LTD
发明人： IMOTO KATSUYUKI , MIYAZAKI MASARU , SANO HIROHISA
IPC分类号： G02B6/122 , G02B6/02 , G02B6/12 , G02B6/13
摘要： PURPOSE:To obtain a low-cost optical waveguide which has stress less remaining and has not a polarization dependency and has the film thickness and the refrac tive index less varied by forming each of first, second, and third layers, which are successively formed on an Si or SiO2 substrate, consisting of an SiO2 glass including P2O5. CONSTITUTION:Three glass layers, namely, a layer (having a refractive index n1) 2 consisting of an SiO2 glass film where P is doped, a core layer (having a refractive index n2, and n2>n1) 3 consisting of an SiO2 glass where the doped quantity of P is larger, and an SiO2 glass layer (having a refractive index n3, and n3

72. 发明专利

JPS63287806A PRODUCTION OF OPTICAL INTEGRATED CIRCUIT 失效
公开(公告)号：JPS63287806A
公开(公告)日：1988-11-24
申请号：JP12122287
申请日：1987-05-20
申请人： HITACHI LTD
发明人： IMOTO KATSUYUKI , MIYAZAKI MASARU , ANO HIROMI , ITO YUMI
IPC分类号： G02B6/13 , G02B6/12
摘要： PURPOSE:To obtain the title circuit with reduced loss by effecting a gaseous phase decomposition of the gas of a silicon compd. composed of its hydride or contg. an additive for controlling refractive index at a prescribed temp. to form a glass film, followed by patterning it and then, by thermally treating the obtd. film at the temp. higher than said prescribed temp., thereby lessening unevenness of the side wall surface of a waveguide. CONSTITUTION:The gas of the silicon compd. composed of its hydride or contg. the additive (P, B, etc.) for controlling the refractive index is thermally decomposed at 250-550 deg.C, thereby forming the glass film on a substrate plate 1. Then, the obtd. glass plate 2 is patterned by a technique such as a photolithography or a dryetching, etc., followed by thermally treating at the temp. higher than that of the gaseous phase decomposition (such as more than 700 deg.C and less than 1,500 deg.C). Thus, the rectangular waveguide 7 is formed by patterning the glass film as a core layer formed at a low temp. and then, the edge of said waveguide is rounded by thermally treating at a high temp. and the glass film of the waveguide is made minute, thereby uniforizing the waveguide.

73. 发明专利

JPS6261372A COUPLING METHOD OF GAAS LSI GATE AND OHMIC ELECTRODES 失效
公开(公告)号：JPS6261372A
公开(公告)日：1987-03-18
申请号：JP19940285
申请日：1985-09-11
申请人： HITACHI LTD
发明人： KODERA NOBUO , YANAGISAWA HIROSHI , MIYAZAKI MASARU , KAJITA SHINJI , TANAKA HIRONORI
IPC分类号： H01L29/812 , H01L21/28 , H01L21/338 , H01L21/768 , H01L23/522 , H01L29/80
摘要： PURPOSE:To reduce the layout area by using a contacting hole common for both gate and ohmic electrodes to simplify the coupling of the ohmic electrode with the gate electrode. CONSTITUTION:A Schottky barrier is formed by superposing a gate electrode 1 and an N-channel 2, and an ohmic electrode contact is formed by superposing an ohmic metal 4 on a high density N type layer 3 connected with the N- channel 2 and alloying them. A contacting hole 5 crossing over both the electrode 1 and the metal 4 is formed in an insulating film such as an SiO2 formed on the metals 1 and 4, and wiring metal 6 is disposed to completely cover the hole 5.

74. 发明专利

JPS61137371A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS61137371A
公开(公告)日：1986-06-25
申请号：JP25970184
申请日：1984-12-07
申请人： Hitachi Ltd
发明人： MORI MUTSUHIRO , YAO TSUTOMU , YANAGISAWA HIROSHI , MIYAZAKI MASARU
IPC分类号： H01L29/80 , H01L29/10
CPC分类号： H01L29/1066
摘要： PURPOSE:To obtain an SIT which has less leakage current between a gate and a source by forming a source region of an overhang structure by etching the upper layer of a substrate laminated with semiconductor layers of different carrier densities, and forming a gate region and a drain region at both sides with the source region as a mask. CONSTITUTION:An N type layer 100 and an N type layer 1d are laminated on an N type semiconductor substrate, not shown, etched to form an overhang structure to the halves of the layers 1d and 100 and a recess 10 at the side of the remaining overhang structure. Then, the side wall of the overhang structure is coated by an insulating film 30, and with the remaining overhang structure as a mask a P type gate region and a P type drain region 1c are formed by ion implanting. Then, an insulating film and an insulating film 31 of fast etching velocity on the regions are coated, and a film 31 is removed while removing a foreign material adhered onto the region. Then, a source electrode 22 is formed on the layer 1d, and a gate electrode 23 is formed on a gate region.
摘要翻译：目的：通过蚀刻层叠有不同载流子密度的半导体层的基板的上层，通过形成突出结构的源极区域来获得栅极和源极之间的漏电流较小的SIT，并形成栅极区域和漏极区域以源区域为掩模。构成：在N +型半导体衬底（未示出）上层压N +型层100和N +型层1d，以对层1d和100的一半进行蚀刻以形成突出结构，并且在其余悬垂结构侧的凹部10。然后，通过绝缘膜30涂覆悬伸结构的侧壁，以剩余的悬垂结构作为掩模，通过离子注入形成P型栅极区域和P型漏极区域1c。然后，涂覆在区域上具有快速蚀刻速度的绝缘膜和绝缘膜31，并且除去附着在该区域上的异物的膜31。然后，在层1d上形成源极22，在栅极区上形成栅电极23。

75. 发明专利

JPS615523A METHOD OF DRY ETCHING 失效
公开(公告)号：JPS615523A
公开(公告)日：1986-01-11
申请号：JP12524884
申请日：1984-06-20
申请人： HITACHI LTD , HITACHI IRUMA DENSHI KK , HITACHI MICROCUMPUTER ENG
发明人： MIYAZAKI MASARU , YASUDA TAKESHI , MASUKI JIYUNJI , HASHIMOTO TETSUKAZU
IPC分类号： H01L21/302 , H01L21/3065 , H01L21/3213
摘要： PURPOSE:To machine a high melting point metal in a directional property without damaging a GaAs substrate by using NF3 gas for reactive gas in the step of ultrafinely machining the metal formed on a compound semiconductor by a reactive ion etching method. CONSTITUTION:NF3 gas is used for reactive gas in the step of ultrafinely machining a high melting point metal formed on a compound semiconductor by a reactive ion etching method. For example, tungsten silicide 2 is coated by sputtering on a crystal formed with an N type active layer 10 on a semi-insulating GaAs substrate 1. A gate pattern 20 of the desired size is formed of photoresist, a tungsten silicide 3 is machined by reactive ion etching method using mixture gas of NF3 gas and N2 with it as a mask. Thus, since the metal can be machined with good controllability without damaging the GaAs, an integrated circuit using GaAs semiconductor can be performed in high performance.

76. 发明专利

JPS612360A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS612360A
公开(公告)日：1986-01-08
申请号：JP12171384
申请日：1984-06-15
申请人： HITACHI LTD
发明人： MIYAZAKI MASARU , ADAKA SABUROU , MORI MITSUHIRO , KOBAYASHI MASAYOSHI , KOBASHI TAKAHIRO , IMAMURA YOSHINORI
IPC分类号： H01L21/768 , H01L21/28 , H01L21/3205 , H01L23/52 , H01L27/06 , H01L29/43 , H01L29/45 , H01L29/80
摘要： PURPOSE:To improve adhesive properties among both of an electrode and a metal for a wiring and an inter-layer insulating film by coating the surface of an Au layer or a metallic layer containing Au with a metallic layer containing either of Mo, W, Ti, Cr or Ni. CONSTITUTION:An Au.Ge alloy layer 31 for an ohmic contact is evaporated onto a GaAs crystal 10, and an Ni layer 32, an Au layer 33 and an Mo layer 34 are evaporated in succession. The GaAs crystal 10 is thermally treated to form the ohmic contact. A phosphorus-doped glass film 40 is applied. A contact hole 140 is processed to one part of the phosphorus-doped glass film 40. The film peeling of the phosphorus-doped glass film 40 and defective accidents regarding the size of processing are prevented by the Mo film 34.

77. 发明专利

JPS6020517A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6020517A
公开(公告)日：1985-02-01
申请号：JP12768183
申请日：1983-07-15
申请人： HITACHI LTD
发明人： MIYAZAKI MASARU , MORI MITSUHIRO , KODERA NOBUO , KOBAYASHI MASAYOSHI
IPC分类号： H01L29/812 , H01L21/28 , H01L21/302 , H01L21/3065 , H01L21/338
摘要： PURPOSE:To form a metallic layer with high yield by boring and machining a layer consisting of a heat-resistant material formed on a substrate, coating the whole surface with a desired metal, coating a bored and machined section with a resist pattern, etc. in size in which the bored and machined section is overhung, removing the unnecessary metal and the heat-resistant material while using the bored and machined section as a mask and over-etching the layer. CONSTITUTION:A SiN film 3 is applied extending over the whole surface of a substrate 1. A pattern is formed by a photo-resist, and a hole with an approximately vertical sectional shape is machined to SiN 3 while using the photo-resist as a mask. A SiO2 film 4 is applied extending over the whole surface. When SiO2 4 is removed through anisotropic dry etching, only the side surface of the hole is left, and the hole is machined as the size of the hole on the substrate 1 is left as it is. W 6 is applied extending over the whole surface so that W is not attached on the side wall of the hole. A resist pattern 7 sufficiently covering the upper section of the hole is formed. An unnecessary section is removed while employing the resist pattern 7 as a mask. W 10 and SiN 8 are removed through side etching while using the resist pattern 7 as a mask, and the resist 7 is removed, thus forming a W gate 2.

78. 发明专利

JPS5755591A Information recording method 失效
标题翻译：信息记录方法
公开(公告)号：JPS5755591A
公开(公告)日：1982-04-02
申请号：JP12930880
申请日：1980-09-19
申请人： Hitachi Ltd
发明人： MUNAKATA TADASUKE , YAGI KUNIHIRO , MIYAZAKI MASARU , YONEDA SHIYOUZOU
IPC分类号： G11C17/00 , G03C1/705 , G11B7/241 , G11B9/08 , G11B11/00 , G11C11/23 , G11C11/30 , G11C11/42 , G11C13/04 , H01L31/08 , H04N1/21
CPC分类号： H01L31/08 , G03C1/705 , G11B7/241 , G11B9/08 , G11B11/00 , G11B2007/2571 , G11B2007/25715 , G11C11/23 , G11C13/04 , H04N1/2108
摘要： PURPOSE: To produce in an easy process a recording medium which is capable of the recording with high denisity, by forming an oxidized film on a semiconductor single substrate made of GaAs or CdS and irradiating an electron beam to a specific region on the substrate to reduce the photovoltage on the surface of the specific region.
CONSTITUTION: An oxidized film 12 is formed on a semiconductor single substrate 3 made of GaAs or CdS, and then a light beam hν is irradiated on the film 12. Thus the surface of the film 12 is electrically carged negatively owing to an electric field caused by the surface potential; while the rear surface of the substrate 3 is electrically charged positively. Then the surface photovoltage is produced between the upper and rear surfaces of the substrate 3. Under such conditions, an electron beam is irradiated to a specific region on the substrate 3 to cause the impairment of irradiation. As a result, the surface photovoltage can be extremely reduced at the impaired area although the beam hν is irradiated there. Accordingly the output can be greatly reduced for the surface photovoltage at the region where the electron beam is irradiated. In such way, a recording medium which is capable of the information recording with high density with use of an electron beam can be produced in a simple process under which just an oxidized film is formed.
COPYRIGHT: (C)1982,JPO&Japio
摘要翻译：目的：通过在由GaAs或CdS制成的半导体单个衬底上形成氧化膜并且将电子束照射到衬底上的特定区域，以便于以易于制造的方式制造能够高度记录的记录介质，以减少特定区域表面的光电压。构成：在由GaAs或CdS制成的半导体单片基板3上形成氧化膜12，然后将光束hnu照射在膜12上。因此，由于电场引起的膜12的表面被电气堵塞由表面电位; 同时衬底3的后表面被正电充电。然后在基板3的上表面和后表面之间产生表面光电压。在这种条件下，电子束被照射到基板3上的特定区域以造成照射损坏。结果，尽管在其上照射光束hnu，但是在损伤区域处的表面光电压可以极大地降低。因此，对于电子束照射的区域的表面光电压，可以大大降低输出。以这样的方式，可以在仅形成氧化膜的简单工艺中制造能够利用电子束进行高密度信息记录的记录介质。

79. 发明专利

JPS53105381A XXRAY COPYING MASK 失效
公开(公告)号：JPS53105381A
公开(公告)日：1978-09-13
申请号：JP1924777
申请日：1977-02-25
申请人： HITACHI LTD
发明人： MIYAZAKI MASARU , TAKEMOTO KAYAO
IPC分类号： H01L21/027 , H01L21/302
摘要： PURPOSE:To perform the mask alignment with high accuracy, by developing the signal with detecting the relation of marker position for the substrate, through the provision of the semiconductor detector on more than two parts of the mask surface.

80. 发明专利

JPS5385169A SOFT XXRAY TRANSFER MASK 失效
公开(公告)号：JPS5385169A
公开(公告)日：1978-07-27
申请号：JP16877
申请日：1977-01-05
申请人： HITACHI LTD , NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE
发明人： MIYAZAKI MASARU , TAKEMOTO KAYAO , SUZUKI KATSUMI , KADOTA TOSHIKI , ONO TOSHIROU
IPC分类号： H01L21/027 , H01L21/302
摘要： PURPOSE:To increase mechanical strength by forming the mask-aligning throughwindows of a soft X-ray transfer mask in three-layer structure and providing tensile stress to the transparent films of the two upper and lower layers.

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