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    • 62. 发明专利
    • RECORDING AMPLIFIER AND RECORDING/REPRODUCING DEVICE
    • JPH0954905A
    • 1997-02-25
    • JP20112195
    • 1995-08-07
    • SONY CORP
    • NOCHIDA KAORU
    • G11B5/09G11B20/10
    • PROBLEM TO BE SOLVED: To rapidly control on/off of a recording state by controlling a recording current value when an information signal is recorded on a recording medium with a rotary head. SOLUTION: A recording amplifier 2 is provided with a limiter 3 waveform shaping the information signal passing through a rotary transformer 1, an envelope detector 4 detecting the envelope of the information signal and a peak hold circuit 6 peak holding the detected envelope value. Further, the amplifier 2 is provided with a VCA 5 amplifying the current value of the information signal waveform shaped by the limiter 3 based on the peak hold value, a comparator 7 comparing the envelope value detected by the envelope detector 4 with a value of a reference voltage 8, an enable control circuit 9 controlling whether or not the information signal amplified by the VCA 5 is outputted based on the comparison output and a current amplifier 10 amplifying the current value of the information signal outputted from the circuit 9 and supplying the recording current to the recording head 11.
    • 65. 发明专利
    • DIGITAL SIGNAL RECORDER
    • JPH0546907A
    • 1993-02-26
    • JP22955091
    • 1991-08-16
    • SONY CORP
    • NOCHIDA KAORU
    • G11B5/09
    • PURPOSE:To prevent the degrading of eye numerical aperture by stressing a peak value of an encoding signal when the encoding signal meeting conditions of degrading in an eye numerical aperture, CONSTITUTION:An analog video signal to be supplied through a terminal 1 is converted into a digital video signal symbol with an A/D converter 2 and the signal is supplied to a shuffling and parity circuit 3. In the circuit 3, the digital video signal undergoes a shuffling while an error correction code is added and then the code is supplied to an encoder 4. In the encoder 4, the digital video signal is modulated to M to form an encoding signal D (i) and the signal is supplied to a rolling off correction circuit 5, to correct the degrading in the I opening rate as caused by the rolling off of RF equalizing characteristic in the recording and reproduction. In other words, when the encoding signal D (i) meets requirements of degrading in the I opening rate, the degrading in the I opening rate is improved by stressing a peak value of the signal D (i).
    • 66. 发明专利
    • SIGNAL LEVEL DETECTION CIRCUIT
    • JPH0463006A
    • 1992-02-28
    • JP17372490
    • 1990-06-29
    • SONY CORP
    • NOCHIDA KAORU
    • G11B27/36H03G3/20
    • PURPOSE:To obtain a signal level detection circuit with simple configuration by detecting the signal level of an input signal by using it also as the detection circuit of an AGC circuit. CONSTITUTION:The signal level of a reproducing signal SRF is detected at a square detection circuit 8 via a variable gain control circuit 6, and is held at a prescribed signal level based on a detected result. Mean while, at the signal level detection circuit, the output signal SCOM of an error amplifier circuit 10 is subtracted from the detection result SRF of the square detection circuit 8, and a signal level detection signal SOUT1 whose signal level is changed proportionally to the signal level of the reproducing signal SRF can be obtained. Thereby, it is possible to obtain the signal level detection circuit with simple configuration as a whole by detecting the signal level of the reproducing signal SRF by using the circuit also as the square detection circuit of the AGC circuit.
    • 67. 发明专利
    • CLAMP CIRCUIT
    • JPH01241980A
    • 1989-09-26
    • JP6872488
    • 1988-03-23
    • SONY CORP
    • NOCHIDA KAORU
    • H04N5/16H04N9/68
    • PURPOSE:To make the scale of circuit small and to attain high performance by supplying alternatively plural signals to a current output type operational amplifier via a coupling capacitor by a 1st switch, comparing it with a reference voltage during the clamp period, and supplying the output current of the operational amplifier to the coupling capacitor selectively via a 2nd switch. CONSTITUTION:An output current of an operational amplifier 30 charges selectively coupling capacitors 4a-4d through a switch 43. Since the output impedance of the operational amplifier 30 is high, the effect of an ON-resistance 43r of the switch 43 is neglected. On the other hand, the output signal of the line memories 25a-25d through the coupling capacitors 4a-4d is given to an inverting input terminal of the operational amplifier 30 through the switch 26 alternatively. Since the input current of the operational amplifier 30 is minute, the voltage drop of the ON-resistance 26r thereby is neglected and the signal voltage at the inverting input terminal of the operational amplifier 30 is coincident with the signal voltage through the coupling capacitors 4a-4c. Thus, the circuit scale is made small and high performance is attained.
    • 68. 发明专利
    • TIME-BASE COMPRESSING CIRCUIT
    • JPS63232598A
    • 1988-09-28
    • JP6534587
    • 1987-03-19
    • SONY CORP
    • ONO KOICHINOCHIDA KAORUHIRAI HITOSHIIWAMOTO MASAYUKI
    • H04N9/86H04N9/81H04N11/06H04N11/24
    • PURPOSE:To prevent occurrence of lattice-defect noises, by using component chrominance components having a bit number of one-horizontal period quantity and those having a bit number of two-horizontal period quantity as charge transferring elements under a combined condition and making continuous supply of clocks possible. CONSTITUTION:CCDs 1 and 3 have bit numbers of one-horizontal period quantities and CCDs 2 and 4 have bit numbers of two-horizontal period quantities. During continuous two-horizontal periods H1 and H2, clocks are supplied to the CCDs 1 and 2 from a terminal 10 as shown by the D of the figure and clocks are supplied to the CCDs 3 and 4 from another terminal 11 as shown by the E of the figure. Moreover, control signals SSW1 are supplied to a switching circuit 7 from a terminal 12 and the switching circuit 7 is switched to the (c) side, (d) side, (a) side, and (b) side during 1st and 2nd halves of the 1st horizontal period H1 and 1st and 2nd halves of a 2nd horizontal period H2, respectively. Therefore, occurrence of lattice-detect noises can be prevented excellently since the clocks are continuously supplied to the CCDs 1-4.
    • 69. 发明专利
    • NOISE CANCELING CIRCUIT
    • JPS62123881A
    • 1987-06-05
    • JP26452085
    • 1985-11-25
    • SONY CORP
    • NOCHIDA KAORU
    • H04N5/93
    • PURPOSE:To cancel noise component surely without requiring a delay circuit and a phase compensating circuit by taking out edge component and noise component from input signals and subtracting from the input signals. CONSTITUTION:Signals S1 (=S+HS+n) made by superposing edge component HS and noise component (n) on original signals S are inputted to an input terminal 11. The signals S1 are supplied to signal composing devices 12, 13, and output S3 of a limiter 15 is subtracted in the signal composing device 12, and signals S2 (=S1-S3) are added to an HPF 14. The limiter 15 constitutes an enhancer transfer function H together with the HPF 14 and limiter output S3=HS2=HS+Hn/(1+H) is applied to a limiter circuit 16 and the signal composing device 12. The limiter 16 is a circuit that passes only signals of small amplitude, and its output S4=HS+n (H>>1) is sent to the signal composing device 13, and signals S5 (=S) from which edge component HS and noise component (n) are removed are outputted.
    • 70. 发明专利
    • COMB LINE FILTER CIRCUIT
    • JPS61156993A
    • 1986-07-16
    • JP28159884
    • 1984-12-27
    • SONY CORP
    • NOCHIDA KAORU
    • H04N9/64H04N9/78
    • PURPOSE:To improve the deterioration of the straightness due to a characteristic of a differential emitter follower or the deterioration of the vertical resolution by directly outputting the adding signal of a comb line filter when there is a line correlation and correcting by a subtracting signal of the comb shape filter passing through a clip-shaped correlating device when there is no line correlation. CONSTITUTION:For a carrier chrominance components having the line correlation, as shown in figure D, the amplitude of the output (D) of a subtracter 3 is small, so that the output (J) of the clip-shaped correlating device 10 goes to a zero level. The output (K) of an adder 9 becomes the output (C) of the an adder 2 of the comb line filter. For the signal having no line correlation, among the outputs (D) of the subtracter 3, the amplitudes of a front edge Fr and a rear edge Bk become large, so that the output of the clip-shaped correlating device 10 becomes one as shown in figure J. The output (J) of this correlating device 10 and the output (C) of the adder 2 of the comb line filter are added and as shown in figure K, an original signal is reproduced in the output (K) of the adder 9.