专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

51. 发明专利

JPH11204548A METHOD FOR MOUNTING SEMICONDUCTOR CHIP AND DEVICE THEREFOR 失效
公开(公告)号：JPH11204548A
公开(公告)日：1999-07-30
申请号：JP299198
申请日：1998-01-09
申请人： HITACHI CABLE
发明人： SUGA MIYUKI , OKABE NORIO , KAMEYAMA YASUHARU , ONDA MAMORU
IPC分类号： H01L21/60 , H01L21/52
摘要： PROBLEM TO BE SOLVED: To provide a method for mounting a semiconductor chip on a tape automated bonding(TAB) tape without involving bubbles, and a mounting device to be used for this. SOLUTION: A surrounding part of a die attach part 7 is covered with a depressurizing chamber 10, and the mounting of a semiconductor chip on a TAB tape 3 is carried out. The inside part of the depressurizing chamber 10 is sucked and depressurized by a vacuum pump 11, so that bubbles existing between the TAB tape 3 and an adhesive layer or between the adhesive layer and the semiconductor chip are excluded, so that bubble involvement in those parts can be prevented.

52. 发明专利

JPH11121650A MANUFACTURE BGA PACKAGE 失效
公开(公告)号：JPH11121650A
公开(公告)日：1999-04-30
申请号：JP28684497
申请日：1997-10-20
申请人： HITACHI CABLE
发明人： KUMAKURA TOYOHIKO , MURAKAMI TOMIO , ONDA MAMORU
IPC分类号： H01L21/60 , H01L23/12 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To facilitate the formation of solder balls in accordance with a printing process by controlling the state of cream solder after the printing before it is put into a reflow furnace, to make the temperature profile in the reflow furnace have a width. SOLUTION: Cream solder for solder balls is printed on a land of a substrate for a BGA(ball grid array) package. After the printing, it is put into a thermostatic oven or heating furnace to carry out preheating treatment for it, before it is put into a reflow furnace to volatilize the solvent component required by the solder printing condition or the flux component which has been mixed more than needed. Preferably, the temperature of the thermostatic oven or the heating furnace is 120 deg.C-175 deg.C, and a period during which it is in the thermostatic oven or heating furnace is 2 minutes-20 minutes. After the preheating treatment, the substrate for the BGA package is once cooled and is put into the reflow furnace, and solder balls are formed.

53. 发明专利

JPH11121646A SEMICONDUCTOR PACKAGE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH11121646A
公开(公告)日：1999-04-30
申请号：JP28079297
申请日：1997-10-14
申请人： HITACHI CABLE
发明人： ONDA MAMORU , MURAKAMI HAJIME
IPC分类号： H01L23/12 , H01L21/60 , H01L23/50
摘要： PROBLEM TO BE SOLVED: To provide a low-cost, small and light semiconductor package and manufacture thereof. SOLUTION: This manufacturing method comprises forming a strippable metal layer 12 on a board 11 which is to be a provisional support, provisionally fixing a semiconductor chip 2 to the same surface, connecting wiring pads 5 of the chip to terminals 4 of the metal layer 12 with bonding wires 6, sealing it with a seal resin 9, and stripping the board 11 from the resin 9 so as to expose the metal layer 4 at the terminals and chip 2 on one surface of the resin 9.

54. 发明专利

JPH11111887A STIFFENER FOR TAPE BGA 失效
公开(公告)号：JPH11111887A
公开(公告)日：1999-04-23
申请号：JP27464897
申请日：1997-10-07
申请人： HITACHI CABLE
发明人： OTAKA TATSUYA , KAWANOBE SUNAO , MURAKAMI HAJIME , ONDA MAMORU , YOSHIOKA OSAMU , TAKAHASHI SHIGEJI
IPC分类号： H01L21/60 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a stiffener for tape BGA with the high uniformity of appearance for making the contamination of a fingerprint or the like inconspicuous. SOLUTION: A stiffener 3 for the tape BGA is applied to the semiconductor device of a tape-BGA structure and is provided with a base metal 30 composed of pure copper or a copper alloy, and SnNi plating 31 is executed to the surface. Since the stiffener 3 reinforces a TAB tape 1 and secures the flatness of the TAB tape 1, a solder ball 5 is smoothly joined to a substrate. Since the SnNi plating 31 hardly generates the irregularities of the appearance, the uniformity of the appearance is improved. By providing the surface of the SnNi plating 31 with the glossiness of 0.1-1.5 by a measured value by a densitometer, the contamination of the fingerprint or the like is made inconspicuous.

55. 发明专利

JPH11102941A MANUFACTURE OF STIFFENER WITH ADHESIVE LAYER 失效
公开(公告)号：JPH11102941A
公开(公告)日：1999-04-13
申请号：JP26251897
申请日：1997-09-26
申请人： HITACHI CABLE
发明人： OTAKA TATSUYA , KAWANOBE SUNAO , MURAKAMI HAJIME , ONDA MAMORU , YOSHIOKA OSAMU , TAKAHAGI SHIGEJI
IPC分类号： H01L21/60 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a stiffener wherein occurrence of contamination is prevented, work efficiency and product yield are improved, and flatness is improved. SOLUTION: This method is provided for manufacturing a stiffener for TAB tape BGA for fixing a TAB(tape automated bonding) tape used for CSP(chip size package) and BGA(ball grid array). Here, after stiffeners 21a-21d are stamped from such stiffener material as pure copper, etc., Ni, etc., is plated on its surface, and in order to bond the TAB tape, a film with bonding agent layer 24 wherein a bonding agent 25 is coated on one surface of a protective film 26 is laminated on one surface of the stiffeners 21a-21d. Such needless part 27, of the film with bonding agent layer 24, thus laminated, as not contacting adhesive surfaces of the stiffeners 21a-21d is removed.

56. 发明专利

JPH1197483A WIRING BOARD WITH JOINING LEAD FOR SEMICONDUCTOR CHIP AND SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH1197483A
公开(公告)日：1999-04-09
申请号：JP25306297
申请日：1997-09-18
申请人： HITACHI CABLE
发明人： ONDA MAMORU , MURAKAMI HAJIME , TAKAHASHI GUNICHI , OKABE NORIO
IPC分类号： C25D3/48 , C25D7/12 , H01L21/60 , H01L23/50
摘要： PROBLEM TO BE SOLVED: To improve reliability, by keeping necessary joining strength between an aluminum electrode in a semiconductor chip and an inner lead even after a given elapsed time. SOLUTION: A device includes a semiconductor chip 1 with an aluminum electrode 6, and a polyimide film 4 with a wiring lead 3 to be connected to the aluminum electrode 6. The wiring lead 3 has an inner lead made of copper or copper alloy directly connected to the aluminum electrode 6. Gold is plated directly or on a nickel plated base on the inner lead. The gold plating has a thickness of 1.5 μm or above and a crystal grain size of 1.0 μm or above. When the thickness of the gold is above 1.5 μm, the time until an aluminum/gold diffusion layer amounts to 100 percent of the gold plating layer can be elongated. By using the gain size of 1.0 μm or above, the diffusion of copper can be prevented.

57. 发明专利

JPH1140616A TAPE FOR FLIP CHIP BGA HAVING BALL TERMINAL AND STIFFENER, METHOD FOR MANUFACTURING THE TAPE FOR BGA, AND SEMICONDUCTOR DEVICE HAVING THE FLIP CHIP STRUCTURE USING THE TAPE FOR BGA AND ITS MANUFACTURING METHOD 失效
公开(公告)号：JPH1140616A
公开(公告)日：1999-02-12
申请号：JP19105397
申请日：1997-07-16
申请人： HITACHI CABLE
发明人： ONDA MAMORU , MURAKAMI HAJIME , OKABE NORIO , KAMEYAMA YASUHARU
IPC分类号： H01L21/60 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To manufacture a semiconductor device having a flip chip structure using a tape for flip chip BGA (ball grip allay) with ball terminals and a stiffener which can enhance the productivity without degrading the reliability of a package even if a tape made of polyimide resin with a high liquid absorption is used. SOLUTION: A tape for flip chip BGA having ball terminals 5 and a stiffener 7 is produced by firstly providing the stiffener 7 which is bonded to a surface of a flexible wiring tape 6, forming a wiring pattern, inner leads 8 and a land for forming ball terminals on a copper foil which is bonded to the other surface of the flexible wiring tape 6, and mounting the ball terminals 5 on the land for forming the ball terminals. After that a semiconductor chip is mounted on the inner leads which are formed on a polyimide film 6 of the tape for flip chip BGA.

58. 发明专利

JPH1012677A MANUFACTURE OF DOUBLE-SIDE WIRING TAPE CARRIER FOR SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH1012677A
公开(公告)日：1998-01-16
申请号：JP3611097
申请日：1997-02-20
申请人： HITACHI CABLE
发明人： OKABE NORIO , KAMEYAMA YASUHARU , TAGA KATSUTOSHI , SATO TAKAYUKI , ONDA MAMORU , TANAKA HIROKI , ISHIKAWA HIROSHI
IPC分类号： B23K26/38 , H01L21/48 , H01L21/60 , H01L23/12 , H05K3/00 , H05K3/40 , H05K3/42 , B23K26/00
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a double-side wiring tape carrier for a semiconductor device, which is excellent in mechanical strength, dimensional accuracy, wiring density, copper-plating quality, characteristics, etc. SOLUTION: A copper foil layer on a polyimide tape is subjected to a photoetching process (step 101) to form a pattern, the pattern is subjected to a laser processing operation to make therein via holes (step 102). A metallic film is formed on an inner wall of each via hole (step 103), a copper pattern for device holes, etc., is formed by photoetching (step 105), and then subjected to a laser processing operation for each hole with the copper pattern used as a mask (step 107). Further, the copper foil layer is subjected to a photoetching process (step 109) to form a copper wiring pattern including inner leads. After a resist film is removed (step 110), a double-side wiring tape carrier is completed.

59. 发明专利

JPH08139229A SEMICONDUCTOR ELEMENT MOUNTING WIRING BOARD AND SEMICONDUCTOR DEVICE USING IT 失效
公开(公告)号：JPH08139229A
公开(公告)日：1996-05-31
申请号：JP27356294
申请日：1994-11-08
申请人： HITACHI CABLE
发明人： SUGIYAMA TAKEHIRO , ONDA MAMORU , KUMAKURA TOYOHIKO
IPC分类号： H05K3/40 , H01L23/12 , H05K1/02 , H05K3/42 , H05K3/44
摘要： PURPOSE: To ensure a larger wiring pattern space on the surface of a substrate by allowing high-frequency operation by reducing signal noise and cross talk and reducing through holes. CONSTITUTION: A through hole 2 is provided on an aluminum substrate 1, and the aluminum conductor is exposed on the inner plane of the through hole. On the front and rear planes of the substrate 1, including the inner plane of the through hole 2, an oxide film 4 is provided by oxidizing the aluminum. On the oxide film 4 in the through hole 2, through hole wiring 6 is provided, and on the oxide film 4 on the front plane of the substrate 1, a wiring pattern 7 to be connected with the through hole wiring 6 is provided. Thus, the through hole wiring 6 is permitted to have a coaxial structure surrounded by the aluminum conductor through the oxide film 4, and when the aluminum substrate 1 is grounded, shield effects are generated. Since the front and rear planes of the substrate can be grounded using the substrate 1, an exclusive through hole for grounding is not necessitated.

60. 发明专利

JPH0878570A BGA PACKAGE 失效
公开(公告)号：JPH0878570A
公开(公告)日：1996-03-22
申请号：JP21294494
申请日：1994-09-06
申请人： HITACHI CABLE
发明人： KUMAKURA TOYOHIKO , ONDA MAMORU , MURAKAMI TOMIO , CHINDA SATOSHI
IPC分类号： H01L23/12 , H01L21/60
摘要： PURPOSE: To avoid the scratch, deformation and damage in the manufacturing steps by a method wherein a TAB tape carrier of substrate chip and a stiffener plate in the state of a ball contained in a core are made coalese by heating, pressurizing jig and a pan. CONSTITUTION: A chip 5, and a TAB 4 tape carrier to be mounted on the surface of an interposer plate 10 are heated and applied to a pressurizing jig 3 while conductor balls 9 of plural numbers of terminals comprising conductor balls are previously fitted to the rear surface of a stiffener plate 11 of a substrate 6. A pan 1 having pan cores 2 is applied to the lower surfaces of a ball 9 of the stiffener plate 11 forming this ball 9. In such a constitution, in the state of a ball 9 in the core 2, the TAB 4 tape carrier of a chip 5 of the substrate 6 and the stiffener plate 11 are made coalese by heating, processing jig 3 and the pan 1.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式