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51. 发明专利

JPH0311819A PSEUDO RANDOM PATTERN GENERATOR 失效
公开(公告)号：JPH0311819A
公开(公告)日：1991-01-21
申请号：JP14723389
申请日：1989-06-09
申请人： NEC CORP
发明人： SEKIGUCHI HISAKO , FUKUI AKIRA
IPC分类号： G06F11/22 , G06F7/58 , H03K3/84
摘要： PURPOSE:To generate a pseudo random pattern at high speed by providing a memory loading data in 3-bit structure to be stored in an address outputted from an address latch circuit on a low-order 3-bit of a data shift circuit. CONSTITUTION:A data shift circuit 1 shifts the data in 23-bit structure to a high-order sequentially and the data of the most significant bit b23 is outputted to a pattern output line 4 as a pseudo random pattern. An address latch circuit 2 latches a data composed of high-order 3-bit b21-b23 and 3-bit from the 7-th bit to the low-order b5-b7 every time the circuit 1 shifts the data by 3-bit and gives the result to the memory 3 as an address 5. The memory 3 stores the data 6 in 3-bit structure stored in the address 5, loads the result to low-order 3-bit b1-b3 of the circuit 1 to generate a pseudo random pattern by 3-bit each. The above-mentioned operation is repeated sequentially and a pseudo random pattern whose length is 2 -1 is outputted to an output line 4.

52. 发明专利

JPH02220592A DIAL PULSE COUNTING SYSTEM 失效
公开(公告)号：JPH02220592A
公开(公告)日：1990-09-03
申请号：JP4246389
申请日：1989-02-21
申请人： NEC CORP , KOKUSAI DENSHIN DENWA CO LTD
发明人： FUKUI AKIRA , KOSHIDA SHIZUO
IPC分类号： H04Q1/32 , H04M11/00
摘要： PURPOSE:To count dial pulses accurately even during communication by utilizing the correlation between waveforms at brake position so as to obtain the brake position. CONSTITUTION:When a ratio of a power PB1, PM1 within a prescribed range L1 from first candidate positions of a 1st break B1 and a 1st make M1 based on a time i1 when an input signal X(i) exceeds a threshold level T1 is within a prescribed range, the candidates are decided as B1 and M1. When the ratio is at the outside of the range, the start candidate positions are skipped and other candidates are retrieved similarly. After, the candidates B1 and M1 are decided, a position where the correlation between the waveform after by a prescribed range from the start position of a (n-1)th brake Bn-1 and the waveform B1 is maximized is used as the start candidate position for Bn and similarly, B2-Bn are decided based on the power ratio PMn/PBn-1 and PMn/PBn. Thus, dial pulses are counted accurately even during communication.

53. 发明专利

JPS6413599A VOICE ENCODER 失效
公开(公告)号：JPS6413599A
公开(公告)日：1989-01-18
申请号：JP17029287
申请日：1987-07-08
申请人： NEC CORP
发明人： FUKUI AKIRA
IPC分类号： G10L19/04
摘要： PURPOSE: To make the envelope of a frame smooth and prevent a noise form being generated by controlling a pitch gain to a large fixed value when the coefficient of a pitch regenerating filter is larger than a predetermined value as to a means which makes multipulses easy to rise even in the latter half of a frame. CONSTITUTION: This encoder is equipped with a pitch extracting circuit 1 as a pitch extracting means which calculates the pitch gain of the pitch regenerating filter cascaded to a linear predictive filter based on a pitch extracted from a signal regarding an input signal and controls the calculated value to a large fixed value when the calculated value is larger than the predetermined value, and a linear predictive analyzing circuit 2 and a weighted impulse response arithmetic circuit 3 which find the impulse response of a synthesizing circuit with the pitch regenerating filter. Namely, when the pitch gain is larger than the predetermined value, the gain is controlled to the large fixed value. Consequently, the tone of an encoded voice is increased.

54. 发明专利

JPS63184800A VOICE ENCODING SYSTEM 失效
公开(公告)号：JPS63184800A
公开(公告)日：1988-07-30
申请号：JP23385587
申请日：1987-09-18
申请人： NEC CORP
发明人： FUKUI AKIRA
IPC分类号： G10L19/04 , G10L19/08 , G10L19/10

55. 发明专利

JPS63108400A VOICE ENCODER 失效
公开(公告)号：JPS63108400A
公开(公告)日：1988-05-13
申请号：JP25454286
申请日：1986-10-24
申请人： NEC CORP
发明人： FUKUI AKIRA , NAKAGAWA FUJIO
IPC分类号： G10L19/04 , G10L19/00

56. 发明专利

JPS62139490A AUTOMATIC EXTENSION TRANSFER SYSTEM FOR EXTERNAL CALL 失效
公开(公告)号：JPS62139490A
公开(公告)日：1987-06-23
申请号：JP28033185
申请日：1985-12-13
申请人： NEC CORP
发明人： FUJIHASHI YUICHIRO , FUKUI AKIRA
IPC分类号： H04M3/42 , H04Q3/58
摘要： PURPOSE:To surely transfer the contents of an extension by forming plural representative numbers in a PBX, dividing the numbers into the one automatically terminating in an automatic extension transfer equipment for an external call and the one terminating in the operator, and when the transfer device of the operator is busy, connecting the external call to the other idle unit. CONSTITUTION:The automatic extension transfer equipment 21 for an external call, an operator 22 and a general extension subscriber 26 are stored in the PBX 20. An external call with representative number 24 is automatically terminated to the equipment 21, and when the device 21 is in busy or returns no response, automatically terminated. An external call with representative number 25 is automatically terminated to the operator 22, and when the operator 22 is in busy or returns no response, automatically terminated to the equipment 21. Consequently, an external caller can be connected to a required extension number through the operator 22.

57. 发明专利

JPS57143964A MULTIFREQUENCY SIGNAL RECEIVER 失效
公开(公告)号：JPS57143964A
公开(公告)日：1982-09-06
申请号：JP3025081
申请日：1981-03-03
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： FUJII KENSAKU , IWASE YASUMASA , SHIRAISHI YOSHIKATSU , FUKUI AKIRA , HIROSE KAZUTO
IPC分类号： H04L27/26 , H04Q1/457
摘要： PURPOSE:To decrease the number of multipliers of a linear cyclic digital filter without losing the advantage that a nucleus generating means is unnecessary, by applying high-speed Fourier transform algorithm for frequency thinning. CONSTITUTION:An input signal from a terminal 1 is multiplied at a multiplier 30 by a window function supplied from a window function generator 70. The output of the multiplier 30 is inputted to an adder 44 directly and through a shift register 52, and frequency-thinning high-speed Fourier transform algorithm is applied to the output of the multiplier 30. The output of the adder is supplied through a time slot conversion memory 57 to a linear cyclic digital filter consisting of a one-sampling-period delay register 56, one-word-length shift registers 53 and 54, multipliers 38 and 39, and adders 45 and 46, and the adder 45 generates a real part output and an imaginary part output alternately at intervals of one time slot. Both the outputs are squared by an adder 37 respectively, and the real number part is passed through a shift register 55 and then inputted to an adder 43 simultaneously with the imaginary number part, thereby detecting the presence of the input signal on the basis of the output of the adder.

58. 发明专利

JPS56166690A MULTIFREQUENCY SIGNAL RECEIVER 失效
公开(公告)号：JPS56166690A
公开(公告)日：1981-12-21
申请号：JP6991880
申请日：1980-05-26
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： SHIMOE TOSHIO , IMAGAWA HITOSHI , MARUYAMA KAZUHIRO , FUKUI AKIRA , HIROSE KAZUTO
IPC分类号： H04Q1/457 , H04L27/26 , H04Q1/453
摘要： PURPOSE:To simplify the constitution of a receiver by modulating multifrequency signal to make respective frequency components identical through detecting respective frequencies of the multifrequency signal, and then by calculating an output level via a band-pass filter having said frequency as a center frequency. CONSTITUTION:A multifrequency signal from an input terminal 1 is inputted to detecting circuits 2a-2n which correspond to its respective frequencies and their outputs are modulated by modulating circuits 3a-3n to make identical the frequencies of respective frequency components. The outputs of those modulating circuits 3a-3n are applied to band-pass filters 4a-4n whose center frequencies are equal and their outputs are squared by output level calculation parts 5a-5n to discriminate an output level. The outputs of those detecting circuits 2a-2n are inputted to an output logical circuit 6, and the outputs of the calculation parts 5a-5n are logically processed to discriminate a dial number, control signal, etc., of the multifrequency signal.

59. 发明专利

JPS56122518A DIGITAL DIFFERENTIAL FILTER 失效
公开(公告)号：JPS56122518A
公开(公告)日：1981-09-26
申请号：JP2642180
申请日：1980-03-03
申请人： FUJITSU LTD , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , NIPPON ELECTRIC CO , HITACHI LTD
发明人： FUJII KENSAKU , IMAGAWA HITOSHI , MARUYAMA KAZUHIRO , FUKUI AKIRA , MURAMATSU RIYUUJIROU
IPC分类号： H03H17/02 , H03H17/06
摘要： PURPOSE:To reduce an operation error and also not to make small the dynamic range of a signal which can be handled, by constituting in the transversal from a filter which can be formed by cascading differential filters. CONSTITUTION:A coefficient of the differential equation which has been obtained by expanding the product of a transfer function of each differential filter constituting a digital filter is made a weight coefficient, and the filter is constituted in the transversal form, which is weighted by multiplying a delay output obtiained from the delay circuits 31-38 for providing to an input signal the delay of integer times of the sampling period, by a coefficient which is inputted by the multipliers 70-78. The output obtained from said multipliers 70-78 is added cumulatively by the adder 6, and its result is arranged by the prescribed digit and is outputted as a filter output.

60. 发明专利

JPS5669961A DIGITAL MULTIFREQUENCY SIGNAL RECEIVER 失效
公开(公告)号：JPS5669961A
公开(公告)日：1981-06-11
申请号：JP14621879
申请日：1979-11-12
申请人： NIPPON ELECTRIC CO , NIPPON TELEGRAPH & TELEPHONE , OKI ELECTRIC IND CO LTD , HITACHI LTD , FUJITSU LTD
发明人： FUKUI AKIRA , IWASE YASUMASA , MARUYAMA KAZUHIRO , SAKURAI KOUJIROU , MORITA SHIYUUZOU
IPC分类号： H04Q1/457 , H04L27/26
摘要： PURPOSE:To eliminate an influence of an error occurring as a result of finding the sum of absolute values, by varying the threshold level for deciding the existence of an input signal according to an input level or the level of the absolute value sum. CONSTITUTION:Arithmetic circuits 2 and 3, receiving an output from input circuit 1, find orthogonal components of discrete Fourier transform and outputs of those arithmetic circuits 2 and 3 are supplied to absolute value circuits 4 and 5, which find their absolute values. Those absolute values are added together. Comparing circuit 8 receives outputs of level detecting circuit 7 and adding circuit 6 to determine the threshold level and compares it with the sum of the absolute values to decide the existence of the input signal. Next, output OR circuit 9, receiving the decision result of comparison circuit 8 finds the majority decision logic and logic regarding how many times the same frequency signal is detected and then leads the output to a prescribed terminal among output terminals according to the input state.

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