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41. 发明专利

JP2012088105A Time amplitude conversion device 审中-公开
标题翻译：时间放大转换器件
公开(公告)号：JP2012088105A
公开(公告)日：2012-05-10
申请号：JP2010233572
申请日：2010-10-18
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： HIRAI AKIHITO , TSUTSUMI TSUNEJI , TAKAHASHI TAKANORI , SHIMOZAWA MITSUHIRO
IPC分类号： G04F10/10 , G01S17/10
摘要： PROBLEM TO BE SOLVED: To provide a time amplitude conversion device capable of reducing an influence due to variations in an electrical characteristic of an element in a constitution using a plurality of time amplitude conversion circuits of a TAC (Time to Amplitude Converter) system.SOLUTION: A differential amplifier circuit 8 detects a difference of input voltage between an input terminal on a non-inverting side and an input terminal on an inverting side and outputs voltage in which the detected difference is multiplied by gain A. A gate terminal of an adjustment transistor 9 is connected to an output terminal of the differential amplifier circuit 8. The adjustment transistor 9 outputs current in which the input voltage is multiplied by transconductance g. S/H circuits 7-b and 7-c, the differential amplifier circuit 8 and the adjustment transistor 9 form a calibration section. Control signal input terminals 11-13 are connected to a control circuit as a control section for controlling a circuit operation of a time amplitude conversion circuit 10.
摘要翻译：要解决的问题：提供一种时间振幅转换装置，其能够使用TAC（时间到幅度转换器）的多个时间振幅转换电路在构成中减少由于元件的电特性的变化引起的影响，系统。解决方案：差分放大器电路8检测非反相侧的输入端和反相侧的输入端之间的输入电压的差，并输出检测到的差乘以增益A的电压。门调节晶体管9的端子连接到差分放大器电路8的输出端子。调节晶体管9输出输入电压乘以跨导g m 的电流。 S / H电路7-b和7-c，差分放大器电路8和调节晶体管9形成校准部分。控制信号输入端子11-13连接到作为用于控制时间幅度转换电路10的电路操作的控制部分的控制电路。（C）2012年，JPO和INPIT

42. 发明专利

JP2011109518A Transmitting and receiving apparatus, and receiver 审中-公开
标题翻译：发送和接收设备和接收器
公开(公告)号：JP2011109518A
公开(公告)日：2011-06-02
申请号：JP2009263955
申请日：2009-11-19
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： TADOKORO TOMOHIRO , UEDA HIROTAMI , SHIMOZAWA MITSUHIRO
IPC分类号： H04B1/40
摘要： PROBLEM TO BE SOLVED: To provide a transmitting and receiving apparatus that is compact and high in operating speed and accuracy, and is able to attain communication, such as frequency hopping, corresponding to various modulation methods.
SOLUTION: The transmitting and receiving apparatus includes a direct digital synthesizer for generating a modulation signal and a carrier signal; a transmitting means for transmitting the modulation signal generated by the direct digital synthesizer; a receiving means for receiving a reception signal; a reception mixer that uses the carrier signal generated by the direct digital synthesizer for converting the reception signal into a base band signal or into an intermediate frequency signal by frequency; and a sampling filter having a variable band that suppresses unwanted frequency components from the base band signal or the intermediate frequency signal.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供紧凑且高操作速度和精度的发送和接收设备，并且能够实现与各种调制方法相对应的诸如跳频的通信。解决方案：发送和接收设备包括用于产生调制信号和载波信号的直接数字合成器; 发送装置，用于发送由直接数字合成器产生的调制信号; 接收装置，用于接收接收信号; 接收混合器，其使用由直接数字合成器产生的载波信号，用于将接收信号转换成基带信号或频率转换成中频信号; 以及具有可变频带的采样滤波器，其抑制来自基带信号或中频信号的不需要的频率分量。版权所有（C）2011，JPO＆INPIT

43. 发明专利

JP2011030071A Pll circuit 有权
标题翻译： PLL电路
公开(公告)号：JP2011030071A
公开(公告)日：2011-02-10
申请号：JP2009175371
申请日：2009-07-28
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： TSUTSUMI TSUNEJI , TANIGUCHI EIJI , SHIMOZAWA MITSUHIRO
IPC分类号： H03L7/085
摘要： PROBLEM TO BE SOLVED: To provide a PLL circuit which holds a phase comparing frequency at a high level, improves the phase noise of a PLL and the accuracy of an output signal. SOLUTION: The PLL circuit includes: a first phase accumulator 1 which is driven by using a reference signal as a clock and outputs a signal corresponding to a phase of the reference signal obtained by accumulatively adding a preset value in each cyclic input of a clock within a predetermined range; a second phase accumulator 2 which is driven by using an output signal from an oscillator 5 as a clock and outputs a signal corresponding to a phase of the output signal from the oscillator, which is obtained by accumulatively adding the preset value in each cyclic input of a clock within a predetermined range; a phase comparator 3 for mutually comparing output signals from the first and second phase accumulators 1, 2 to find out a difference between the output signals and outputting an output signal indicating a phase difference between the reference signal and the output signal of the oscillator 5; a control part 4 for generating a control signal to the oscillator 5 according to the output signal of the phase comparator 3; and the oscillator 5 for outputting a signal of a frequency corresponding to the control signal outputted from the control part 4. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供保持高电平的相位比较频率的PLL电路，提高了PLL的相位噪声和输出信号的精度。解决方案：PLL电路包括：第一相位累加器1，其通过使用参考信号作为时钟驱动，并输出与通过在每个循环输入中累加加预设值而获得的参考信号的相位相对应的信号在预定范围内的时钟; 第二相位累加器2，其通过使用来自振荡器5的输出信号作为时钟驱动，并且输出与来自振荡器的输出信号的相位相对应的信号，该信号通过在每个循环输入中累积地添加预设值而获得在预定范围内的时钟; 相位比较器3，用于相互比较来自第一和第二相位累加器1,2的输出信号，以找出输出信号之间的差异，并输出表示基准信号与振荡器5的输出信号之间的相位差的输出信号; 控制部4，用于根据相位比较器3的输出信号向振荡器5产生控制信号; 以及用于输出对应于从控制部分4输出的控制信号的频率的信号的振荡器5.版权所有：（C）2011，JPO＆INPIT

44. 发明专利

JP2010266291A Time measurement circuit 审中-公开
标题翻译：时间测量电路
公开(公告)号：JP2010266291A
公开(公告)日：2010-11-25
申请号：JP2009116965
申请日：2009-05-13
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： HIRAI AKIHITO , TSUTSUMI TSUNEJI , SHIMOZAWA MITSUHIRO
IPC分类号： G04F10/04 , G01C3/06 , G01S17/10
摘要： PROBLEM TO BE SOLVED: To provide a time measurement circuit, in which a measurement accuracy is improved and a circuit configuration free from dead time is provided in a time measurement circuit using a TAC system or combining a TAC system and a pulse count system.
SOLUTION: The time measurement circuit includes a peak detection circuit 5 detecting a maximum value of amplitude of input signal Vi and outputting a trigger TRG, three or more analog signal generator sections 1-4 operating respondingly to a measurement start signal Vg, a control section 6 controlling operation timing of the analog signal generator sections 1-4, and a calculation section 7 calculating an output time of the trigger TRG starting from an output time of the measurement start signal Vg using at least one output voltage of the analog signal generator sections at the time of outputting the trigger TRG.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种测量精度提高的时间测量电路，并且在使用TAC系统的时间测量电路中或者组合TAC系统和脉冲计数的情况下提供没有死区时间的电路配置系统。时间测量电路包括检测输入信号Vi的幅度的最大值并输出触发TRG的峰值检测电路5，三个或更多个模拟信号发生器部分1-4响应于测量开始信号Vg操作，控制部分6，控制模拟信号发生器部分1-4的操作定时;以及计算部分7，使用模拟信号发生器部分1-4的至少一个输出电压，从测量开始信号Vg的输出时间开始计算触发TRG的输出时间在输出触发TRG时的信号发生器部分。版权所有（C）2011，JPO＆INPIT

45. 发明专利

JP2009302627A Frequency hopping transmitter 审中-公开
标题翻译：频偏式发射机
公开(公告)号：JP2009302627A
公开(公告)日：2009-12-24
申请号：JP2008151611
申请日：2008-06-10
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： UEDA HIROTAMI , TSUTSUMI TSUNEJI , SHIMOZAWA MITSUHIRO , SUEMATSU KENJI
IPC分类号： H04B1/713 , H04B1/04 , H04B1/7136
摘要： PROBLEM TO BE SOLVED: To provide a frequency hopping transmitter whose total memory capacity is reduced, whose size is minimized, and whose costs are reduced.
SOLUTION: The frequency hopping transmitter for transmitting modulation data frequency hopped includes: a transmission data generating circuit 1 for generating the transmission data before demodulation as a digital signal; a hopping pattern generating circuit 2 for generating a hopping pattern for performing frequency hopping to data to be transmitted as a digital signal; a composite circuit 3 for compositing transmission data with the hopping pattern and outputting them as composite data; and a digital synthesizer for outputting modulation data frequency hopped on the basis of the composite data. The digital synthesizer includes a memory 44 for storing correlation between the composite data and data which have demodulated the transmission data and to which frequency hopping has been applied in a hopping pattern.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供总体存储容量减小，尺寸最小化，成本降低的跳频发射机。用于发送调制数据跳频的跳频发射机包括：发送数据产生电路1，用于在解调之前产生作为数字信号的发送数据; 跳频图案生成电路2，用于生成用于对作为数字信号发送的数据进行跳频的跳频图案; 复合电路3，用于将传输数据与跳频图案合成并将其作为复合数据输出; 以及数字合成器，用于输出基于复合数据跳频的调制数据。数字合成器包括存储器44，用于存储复合数据和已经解调了传输数据的数据之间的相关性，并且以跳频图案应用哪个跳频。版权所有（C）2010，JPO＆INPIT

46. 发明专利

JP2009159604A Signal generating device, transmitter and transmitter-receiver 审中-公开
标题翻译：信号发生装置，发射机和发射机 - 接收机
公开(公告)号：JP2009159604A
公开(公告)日：2009-07-16
申请号：JP2008306369
申请日：2008-12-01
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： SHIMOZAWA MITSUHIRO , TSUTSUMI TSUNEJI , UEDA HIROTAMI , SUEMATSU KENJI
IPC分类号： H04L27/12
摘要： PROBLEM TO BE SOLVED: To solve the problems that a phase-shift amount is likely to fluctuate due to influence of temperature, or the like, wherein a phase-shifter of an IF band is constituted of analog elements, and that a suppression amount decreases because it is difficult to achieve a phase-shift amount of 90° with high accuracy in all frequencies in a band especially when an IF signal is a broadband.
SOLUTION: Phase set data output from a phase data generating means 1 is distributed into two pieces of data, one is directly input to a first DDS 3, and the other is input to a second DDS 12 through a data converting means 11 for converting the phase set data. The data converting means 11 converts the input phase set data, and outputs from the second DDS 12 phase set data for outputting an IF signal whose phase advances by 90° from that of the first DDS. Thus, the IF signal whose phase advances by 90° in comparison with an IF signal output from the first DDS 3 is output from the second DDS 12, input to first and second mixers 4 and 5, mixed with an LO wave from an LO source 10, converted into an RF signal and output.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题为了解决由于温度的影响而导致的相移量可能波动的问题，其中，IF频带的移相器由模拟元件构成，并且a 抑制量减少，因为难以在频带中的所有频率中以高精度实现90°的相移量，特别是当IF信号是宽带时。解决方案：从相位数据产生装置1输出的相位设置数据被分配成两个数据，一个直接输入到第一个DDS 3，另一个通过数据转换装置11输入到第二个DDS 12 用于转换相位集数据。数据转换装置11转换输入相位集数据，并从第二DDS12相位组数据输出，用于输出相位比第一DDS相位前进90°的IF信号。因此，与从第一DDS 3输出的IF信号相比前进90°的IF信号从第二DDS12输出，输入到第一和第二混频器4和5，与来自LO源的LO波混合 10，转换成RF信号并输出。版权所有（C）2009，JPO＆INPIT

47. 发明专利

JP2008301235A Reader device 审中-公开
标题翻译：读写器
公开(公告)号：JP2008301235A
公开(公告)日：2008-12-11
申请号：JP2007145653
申请日：2007-05-31
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： HAYASHI RYOJI , TAKAYAMA NAOHISA , SHIMOZAWA MITSUHIRO
IPC分类号： G06K7/10 , G06K17/00 , H04B1/3822 , H04B1/40 , H04B1/59 , H04B5/02
摘要： PROBLEM TO BE SOLVED: To exactly measure a receiving level to prevent erroneous detection of an available channel. SOLUTION: When a transmitting signal with a frequency f RF converted into a modulation signal by a transmission mixer 22 is output to an antenna 25, or when a receiving signal with the frequency f RF to be converted into a base band signal by a reception mixer 27 is output from a low noise amplifier 26, a frequency f LO of a local oscillation signal output to the transmission mixer 22 and the reception mixer 27 is set in the frequency f RF , when the receiving level of a receiving signal converted into an intermediate frequency signal of a frequency f 1F is detected by a receiving level detector 32, the frequency f LO of the local oscillation signal is set in a frequency (f RF -f 1F ) different from the frequency f RF of the receiving signal. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：准确测量接收电平以防止可用信道的错误检测。解决方案：当通过发送混合器22将具有频率f RF 转换为调制信号的发送信号输出到天线25时，或者当频率f 由接收混频器27转换成基带信号的RF 从输出到发送混频器22的本地振荡信号的低噪声放大器26，频率f LO 输出，当通过接收检测到转换成频率f 1F 的中频信号的接收信号的接收电平时，接收混频器27被设置在频率f RF 中电平检测器32，将本地振荡信号的频率f LO 设定为与频率不同的频率（f RF -f 1F ） f RF 。版权所有（C）2009，JPO＆INPIT

48. 发明专利

JP2008178027A Mixer circuit 有权
标题翻译：混频器电路
公开(公告)号：JP2008178027A
公开(公告)日：2008-07-31
申请号：JP2007011728
申请日：2007-01-22
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： ONOMA FUMIKI , SHINJO SHINTARO , TSUTSUMI TSUNEJI , SHIMOZAWA MITSUHIRO , SUEMATSU KENJI
IPC分类号： H03D7/14 , H03G3/10
摘要： PROBLEM TO BE SOLVED: To obtain a mixer circuit capable of achieving high saturation characteristics by suppressing a base potential drop of an RF signal input bipolar transistor even when an RF signal to be input to the RF signal input bipolar transistor is an intense signal.
SOLUTION: A base current compensation bipolar transistor 24 is provided which compensates for a base current Ib of a current mirror constituted of RF signal input bipolar transistors 13a and 13b and a bias bipolar transistor 22, and a current supply circuit 25 supplies to the bias bipolar transistor 22 a current corresponding to a compensation amount of the base current Ib due to the base current compensation bipolar transistor 24.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：即使要输入到RF信号输入双极晶体管的RF信号是强烈的，通过抑制RF信号输入双极晶体管的基极电位降来获得能够实现高饱和特性的混频器电路信号。解决方案：提供基极电流补偿双极晶体管24，其补偿由RF信号输入双极晶体管13a和13b以及偏置双极晶体管22构成的电流镜的基极电流Ib，并且电流供应电路25供应到偏置双极晶体管22由于基极电流补偿双极晶体管24而对应于基极电流Ib的补偿量的电流。版权所有（C）2008，JPO＆INPIT

49. 发明专利

JP2006180419A Diversity receiver 审中-公开
标题翻译：多样性接收者
公开(公告)号：JP2006180419A
公开(公告)日：2006-07-06
申请号：JP2004374142
申请日：2004-12-24
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： NISHIZAKI RYOHEI , SAKAGUCHI MASASHI , SHIMOZAWA MITSUHIRO
IPC分类号： H04B7/08
CPC分类号： H04B7/08
摘要： PROBLEM TO BE SOLVED: To improve S/N ratio after synthesis by simplifying circuit configuration in a diversity receiver.
SOLUTION: The diversity receiver 10 comprises branches A, B corresponding to a plurality of antennas 11, 12 disposed spatially apart each other, and outputs a reception signal received in every branch after synthesis. IF signals between branches are synthesized after noise levels in the reception signal received in every branch are made as the same level after controlling RF AGCs 21, 31 and IF AGCs 25, 35 by level detectors 26, 36.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过简化分集接收机中的电路配置来提高合成后的S / N比。解决方案：分集接收机10包括对应于彼此空间分开的多个天线11,12的分支A，B，并且在合成之后输出在每个分支中接收的接收信号。在通过电平检测器26,36控制RF AGC 21,31和IF AGC 25,35之后，在每个分支中接收的接收信号中的噪声电平被做成相同电平之后，合成分支之间的IF信号。）2006年，日本特许厅和NCIPI

50. 发明专利

JP2006148734A Signal processing circuit 审中-公开
标题翻译：信号处理电路
公开(公告)号：JP2006148734A
公开(公告)日：2006-06-08
申请号：JP2004338388
申请日：2004-11-24
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： HAMADA TOMOICHI , KIMURA KAZUO , SHIMOZAWA MITSUHIRO , TAJIMA KENICHI , HAYASHI RYOJI
IPC分类号： H04B1/26
摘要： PROBLEM TO BE SOLVED: To provide a phase shifter for shifting a phase of a signal to which a high S/N is required, to be used for a terrestrial digital broadcast transmitter or the like, more particularly, to accomplish an infinite phase shifter wherein signal deterioration caused by phase noise does not occur, having the same input/output frequency.
SOLUTION: A phase shifter is comprised of a frequency conversion unit 51 comprised of an up converter mixer 22, a band-pass filter 23, a down converter mixer 24 and an output filter 25, and a local oscillation unit 52 comprised of one local oscillator 26, a distributor 27 and a variable phase means 28. An input signal is temporarily up converted by the up converter mixer 22, and then converted to the original frequency by the down converter mixer 24 using the same local oscillation signal as a local oscillation signal used for up conversion.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供用于将要用于高S / N的信号的相位移位以用于地面数字广播发射机等的移相器，更具体地，为了实现无限大移相器，其中不产生由相位噪声引起的信号劣化，具有相同的输入/输出频率。解决方案：移相器包括由升压转换器混频器22，带通滤波器23，降频转换器混频器24和输出滤波器25组成的变频单元51和由一个本地振荡器26，分配器27和可变相位装置28.输入信号由上变频混频器22暂时上变频，然后由下变频混频器24使用相同的本地振荡信号转换成原始频率本地振荡信号用于上转换。版权所有（C）2006，JPO＆NCIPI

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