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41. 发明专利

JP2014207531A 高周波ノイズ対策用電源回路有权
标题翻译：用于高频噪声计数器的电源电路
公开(公告)号：JP2014207531A
公开(公告)日：2014-10-30
申请号：JP2013083267
申请日：2013-04-11
申请人：三菱電機株式会社 , Mitsubishi Electric Corp
发明人： HIROSE KENJI , OKA NAOTO , SASAKI YUICHI , OHASHI HIDEMASA , DAIGO TORU
IPC分类号： H03H7/01 , H01G4/40 , H05K9/00
摘要：【課題】対を成し、近接して配置された2つの電源配線間に、コンデンサを複数個の夫々同数は逆方向の電流が流れるよう直列接続した構成を、電源配線間の近接構造を保ったまま、コンデンサの接続配線を最短にして達成する。【解決手段】絶縁基板の表面に導電材料で対をして近接し、平行に形成された板状で幅広な第1及び第2の電源配線の中間部分で互いに向き合うよう凹状に切欠きされた空間部が形成され、直列接続され、かつ第1及び第2の電源配線間に接続された複数個のコンデンサが、そのコンデンサの同極性の端子が同一の方向を向くようにこの空間部に配置され、かつこのコンデンサがコの字型に配置されるよう空間部に設けられ、コンデンサの他の端子を接続する第3の導体配線を備える。【選択図】図1
摘要翻译：要解决的问题：为了实现通过串联连接多个电容器使得反向电流分别在相同数量的电容器中流动的两个电源配线之间并且彼此靠近地布置，同时保持电源布线之间的紧密结构使电容器的连接布线最短。解决方案：通过在导电材料的表面上切割由导电材料形成的平行板状宽的第一和第二电源线的中间部分而获得的空间部分绝缘基板形成一对并且彼此靠近的凹陷形状。串联并连接在第一和第二电源线之间的多个电容器被布置在空间部分中，使得电容器的相同极性的端子被引向相同的方向。电容器设置在空间部分中以便被排列成U形。提供了连接电容器的其他端子的第三导线。

42. 发明专利

JP2014171025A Cable diagnostic apparatus and method 审中-公开
标题翻译：电缆诊断装置和方法
公开(公告)号：JP2014171025A
公开(公告)日：2014-09-18
申请号：JP2013040823
申请日：2013-03-01
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： KUWABARA TAKASHI , OHASHI HIDEMASA , AKEBOSHI YOSHIHIRO
IPC分类号： H04L25/02 , H04B3/46
摘要： PROBLEM TO BE SOLVED: To automatically detect a plurality of points of cable faults without the need for a large storage area.SOLUTION: A cable diagnostic device comprises: resistance measuring means (a power supply section 102, an inter-signal observation section 103 and a virtual resistance element conversion section 104) for measuring respective DC resistance values of a virtual resistance element 305 indicating resistance of a network part, a virtual resistance element 306 indicating connection between a signal line 301 and a ground line 303, and a virtual resistance element 307 indicating connection between a signal line 302 and the ground line 303; resistance minimum value/maximum value calculating means (a diagnostic parameter input section 105 and a minimum value/maximum value calculating section 106) for calculating a minimum value and a maximum value of the respective DC resistance values of the virtual resistance elements 305-307 on the basis of parameters relating to a cable 3 and a terminal resistance 304; and a cable-state diagnostic section 108 for diagnosing a state of the cable 3 by comparing the respective DC resistance values of the virtual resistance elements 305-307 with the minimum values and maximum values of the respective DC resistance values.
摘要翻译：要解决的问题：自动检测多个电缆故障点，而不需要大的存储区域。解决方案：电缆诊断装置包括：电阻测量装置（电源部分102，信号间观察部分103和虚拟电阻元件转换部分104），用于测量指示网络部分电阻的虚拟电阻元件305的相应DC电阻值，指示信号线301和接地线303之间的连接的虚拟电阻元件306以及虚拟电阻元件 307，指示信号线302和地线303之间的连接; 用于计算虚拟电阻元件305-307的各个直流电阻值的最小值和最大值的电阻最小值/最大值计算装置（诊断参数输入部105和最小值/最大值计算部106）与电缆3和端子电阻304相关的参数的基础; 以及电缆状态诊断部分108，用于通过将虚拟电阻元件305-307的各个直流电阻值与各个直流电阻值的最小值和最大值进行比较来诊断电缆3的状态。

43. 发明专利

JP2010258659A Directional coupler 有权
标题翻译：方向耦合器
公开(公告)号：JP2010258659A
公开(公告)日：2010-11-11
申请号：JP2009105042
申请日：2009-04-23
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： OHASHI HIDEMASA , TAWARA YUKIHIRO , YUASA TAKESHI
IPC分类号： H01P5/18
摘要： PROBLEM TO BE SOLVED: To obtain a directional coupler which hardly causes the problem of characteristic dispersion due to manufacturing dispersion, can secure high electric power resistance and can reduce manufacturing cost.
SOLUTION: The directional coupler includes: two coupling line patterns 2a and 2b arranged side by side in the proximity of the center of the surface of a multilayer dielectric substrate 4; four input/output line patterns 1a to 1d arranged at the edges of the surface of the multilayer dielectric substrate 4 and respectively connected to the edges of the two coupling line patterns 2a and 2b in a longitudinal direction; an inner layer ground conductor pattern 6 provided on the inner layer of the multilayer dielectric substrate 4; a rear surface ground conductor pattern 7 provided on the rear surface of the multilayer dielectric substrate 4; and a plurality of ground through-holes 8 for connecting the inner layer ground conductor pattern 6 and the rear surface ground conductor pattern 7, wherein the inner layer ground conductor pattern 6 has a hole 3 wider than an area in which the two coupling line patterns 2a and 2b exist.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题为了获得几乎不会由于制造分散而导致特性分散的问题的定向耦合器，可以确保高的电力阻力并且可以降低制造成本。解决方案：定向耦合器包括：在多层电介质基板4的表面中心附近并排布置的两个耦合线图案2a和2b; 布置在多层电介质基板4的表面边缘并分别连接到两个耦合线图形2a和2b的边缘的纵向方向上的四个输入/输出线图案1a至1d; 设置在多层电介质基板4的内层上的内层接地导体图案6; 设置在多层电介质基板4的背面的背面接地导体图形7; 以及用于连接内层接地导体图案6和后表面接地导体图案7的多个接地通孔8，其中内层接地导体图形6具有比两个耦合线图案存在2a和2b。版权所有（C）2011，JPO＆INPIT

44. 发明专利

JP2009253423A Waveform compensation circuit 审中-公开
标题翻译：波形补偿电路
公开(公告)号：JP2009253423A
公开(公告)日：2009-10-29
申请号：JP2008096019
申请日：2008-04-02
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： SHIBUYA KOJI , SAITO SEIICHI , OHASHI HIDEMASA
IPC分类号： H04B3/04 , H04B3/00 , H04L25/02 , H04L25/12
摘要： PROBLEM TO BE SOLVED: To obtain a waveform compensation circuit which does not require a high impedance line and has a waveform compensation function of not bringing about a waveform deterioration due to over-compensation even in the case of a line length with a less loss, in high speed signal transmission.
SOLUTION: The waveform compensation circuit includes: a first transmission line 2a; an inductor 6 connected to a terminal part of the first transmission line; a second transmission line 2b which has one end connected to the terminal part of the first transmission line through the inductor and has a delay time being half a one-bit width of a digital data pattern to be transmitted and a characteristic impedance being almost the same as the first transmission line; a resistance 5 connected between the other end of the second transmission line and a ground 100; and a diode 4 which is connected in parallel to the resistance and has a direction from the second transmission line to the ground as the forward direction.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了获得不需要高阻抗线路的波形补偿电路，并且具有波形补偿功能，即使在具有线路长度的情况下也不会由于过度补偿而导致波形劣化较少的损失，在高速信号传输。波形补偿电路包括：第一传输线2a; 连接到第一传输线的端子部分的电感器6; 第二传输线2b，其一端通过电感连接到第一传输线的端子部分，并且具有延迟时间是待传输的数字数据模式的一位宽度的一半，特性阻抗几乎相同作为第一条传输线; 连接在第二传输线的另一端和地100之间的电阻5; 以及二极管4，其与电阻并联连接，并且具有从第二传输线到地面的方向作为正向。版权所有（C）2010，JPO＆INPIT

45. 发明专利

JP2009225159A Reflecting surface of electromagnetic wave 有权
标题翻译：电磁波反射表面
公开(公告)号：JP2009225159A
公开(公告)日：2009-10-01
申请号：JP2008067965
申请日：2008-03-17
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： IHATA KOUJI , MISU KOICHIRO , YANAGI TAKASHI , OHASHI HIDEMASA
IPC分类号： H01Q15/14 , H01Q1/38 , H05K9/00
摘要： PROBLEM TO BE SOLVED: To obtain a reflecting surface of an electromagnetic wave which can form a magnetic wall in which a reflection phase becomes 0° in a plurality of frequency bands, with a simple single-layer structure in which an inductance element and a capacitance element are alternately loaded between conductor patches.
SOLUTION: There are provided: a substrate 2; a ground plate 1 formed on a first face of the substrate 2; a plurality of conductor patches 3 which are formed on a second face of the substrate 2 and arranged at a given interval, and each of which has a dimension of at least one wavelength or less at an operating frequency; an inductance element 4 which is loaded between the adjacent conductor patches, and indicates inductiveness in a specific frequency range; and a capacitance element 5 which is loaded between the adjacent conductor patches, and indicates a capacitance property in a specific frequency range. The inductance element 4 and the capacitance element 5 are alternately loaded.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了获得能够形成多个频带中的反射相位变为0°的磁性壁的电磁波的反射表面，以简单的单层结构，其中电感元件并且电容元件交替地加载在导体贴片之间。解决方案：提供：基板2; 形成在基板2的第一面上的接地板1; 多个导体贴片3，其形成在基板2的第二面上并且以给定的间隔布置，并且每个导体贴片3在工作频率处具有至少一个波长或更小的尺寸; 电感元件4，其被加载在相邻的导体贴片之间，并且指示特定频率范围内的感应性; 以及电容元件5，其被装载在相邻的导体片之间，并且表示特定频率范围内的电容性。电感元件4和电容元件5交替地加载。版权所有（C）2010，JPO＆INPIT

46. 发明专利

JP2009159234A Portable radio terminal 审中-公开
标题翻译：便携式无线电终端
公开(公告)号：JP2009159234A
公开(公告)日：2009-07-16
申请号：JP2007334207
申请日：2007-12-26
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： FUKAZAWA TORU , ARAI SHINJI , OHASHI HIDEMASA
IPC分类号： H01Q1/24 , H01Q1/48 , H04M1/02
摘要： PROBLEM TO BE SOLVED: To provide a slide opening/closing type portable radio terminal with an antenna system mounted thereon, improved in antenna performance by providing the broadband antenna system.
SOLUTION: The slide opening/closing type portable radio terminal is provided with: a first ground conductor 1; a second ground conductor which slides relatively to the first ground conductor; an antenna element 3 provided to at least one of the first ground conductor 1 and second ground conductor 2; and a linear conductor bundle 4 connecting the first ground conductor 1 and second ground conductor 2 and constituted by bundling a plurality of linear conductors in a flat plate shape. The portable radio terminal is further provided with a broadband means of shortening the effective length of confrontation between the first ground conductor 1 or second ground conductor 2, and the linear conductor bundle 4.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种其上安装有天线系统的滑动打开/关闭型便携式无线电终端，通过提供宽带天线系统来改善天线性能。滑动打开/关闭型便携式无线电终端设置有：第一接地导体1; 相对于第一接地导体滑动的第二接地导体; 天线元件3，设置在第一接地导体1和第二接地导体2中的至少一个上; 以及连接第一接地导体1和第二接地导体2并且以平板形状捆扎多个线状导体构成的线状导体束4。便携式无线电终端还具有缩短第一接地导体1或第二接地导体2与线性导体束4之间的对抗有效长度的宽带装置。版权所有（C）2009，JPO＆INPIT

47. 发明专利

JP2008312130A Waveguide/microstrip line converter 有权
标题翻译：波导/微波线路转换器
公开(公告)号：JP2008312130A
公开(公告)日：2008-12-25
申请号：JP2007160251
申请日：2007-06-18
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： TAWARA YUKIHIRO , OHASHI HIDEMASA , KATAYAMA MITSUKO
IPC分类号： H01P5/107 , H01P3/12 , H01P5/02
摘要： PROBLEM TO BE SOLVED: To vary a resonance frequency in higher-order mode and to obtain excellent characteristics in a desired frequency band. SOLUTION: A waveguide/microstrip line converter has dielectric substrates 1a to 1c, a conductor line pattern 3, a conductor 4 for waveguide short-circuiting, a conductor pattern 2a having a pattern void portion 6a, a connection conductor 5a, a conductor pattern 2b having a non-patterned portion 6b provided to the dielectric substrate 1b, a connection conductor 5b, a conductor pattern 2c having a non-patterned portion 6c provided to the dielectric substrate 1c, and a connection conductor 5c. The dielectric substrates 1a to 1c are stacked, where a microstrip line is formed of the conductor line pattern 3, conductor pattern 2a, and dielectric substrate 1a, a waveguide short-circuit portion is formed of the conductor 4 for waveguide short-circuiting, connection conductor 5a, and conductor pattern 2a and while a first dielectric waveguide is formed of the conductor pattern 2a, connection conductor 5b, and conductor pattern 2b, a second dielectric waveguide is formed of the conductor pattern 2b, connection conductor 5c, and conductor pattern 2c. Further, a conductor pattern 2d which is parallel to long sides of the non-patterned portion 6c is provided in the non-patterned portion 6c. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了在高阶模式中改变谐振频率并且在期望的频带中获得优异的特性。解决方案：波导/微带线转换器具有介质基片1a至1c，导线图案3，用于波导短路的导体4，具有图案空隙部分6a的导体图案2a，连接导体5a，具有设置在电介质基板1b上的非图案部分6b的导体图案2b，连接导体5b，设置在电介质基板1c上的具有非图案化部分6c的导体图案2c和连接导体5c。电介质基板1a〜1c堆叠，其中微带线由导体线图形3，导体图案2a和电介质基板1a形成，波导短路部分由用于波导短路的导体4，连接导体5a和导体图案2a，并且当第一介电波导由导体图案2a，连接导体5b和导体图案2b形成时，第二介质波导由导体图案2b，连接导体5c和导体图案2c 。此外，在非图案化部分6c中设置平行于非图案化部分6c的长边的导体图案2d。版权所有（C）2009，JPO＆INPIT

48. 发明专利

JP2008193320A Low-pass filter 有权
标题翻译：低通滤波器
公开(公告)号：JP2008193320A
公开(公告)日：2008-08-21
申请号：JP2007024347
申请日：2007-02-02
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： YONEDA SATOSHI , OWADA SATORU , OHASHI HIDEMASA
IPC分类号： H01P1/203 , H01P1/212
摘要： PROBLEM TO BE SOLVED: To obtain a low-pass filter of a triplate line structure which is easy in manufacturing, does not propagate an unnecessary mode in a stop band, and has a good attenuation characteristic in a frequency band of short wavelengths.
SOLUTION: The filter is provided with a dielectric layer 20 of a flat plate shape having two ground conductors 10 on both main faces, a main line strip conductor 30 arranged in nearly parallel to a ground conductor in the dielectric layer, and a plurality of short-circuiting structures 70 which is electrically connected to respective two ground conductors 10 through inter-layer connecting conductors 60 while capacitively coupled by being closely arranged with the main line strip conductor 30. The plurality of the shorting conductors 70 is arranged in both sides and in a longitudinal direction of the main line strip conductor 30, and simultaneously arranged so that distance between the respective inter-layer connecting conductors 60 included in respective adjoining two short-circuiting structures 70, becomes less than 1/2 of a wavelength in the stop band.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题为了获得容易制造的三板线结构的低通滤波器，不会在阻带中传播不必要的模式，并且在短波长的频带中具有良好的衰减特性。解决方案：滤波器设置有在两个主面上具有两个接地导体10的平板形状的电介质层20，布置成与电介质层中的接地导体几乎平行的主线条导体30，以及多个短路结构70，其通过层间连接导体60电连接到相应的两个接地导体10，同时通过与主线条导体30紧密配合而电容耦合。多个短路导体70布置在两个并且同时布置成使得包括在相邻的两个短路结构70中的各层间连接导体60之间的距离变得小于波长的1/2 阻挡带。版权所有（C）2008，JPO＆INPIT

49. 发明专利

JP2008130601A Method of manufacturing interboard connection structure, interboard connection structure and package 有权
标题翻译：板间连接结构的制造方法，板间连接结构与包装
公开(公告)号：JP2008130601A
公开(公告)日：2008-06-05
申请号：JP2006310424
申请日：2006-11-16
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： OGAWA SHINPEI , FUJII YOSHIO , FUKUMOTO HIROSHI , YUASA TAKESHI , TAWARA YUKIHIRO , OHASHI HIDEMASA
IPC分类号： H01L23/02 , H05K1/14 , H05K3/36
摘要： PROBLEM TO BE SOLVED: To provide an interboard connection structure with appropriate transmission characteristic of electric signal among substrates by preventing deformation or breakage of a first substrate or a conductive layer even if a second substrate is stacked on the first substrate having brittle structure or the conductive layer.
SOLUTION: The method of manufacturing an interboard connection structure includes a step for fixing a first substrate provided with a conductive layer and a second substrate provided with a through hole at the corresponding position to the conductive layer are fixed by making clearance between the second substrate and the conductive layer and using an area other than the conductive layer area; and a step for inserting a liquid conductive material into the through hole and forming a penetrated conductive part with metal filled in the through hole and in contact with the conductive layer.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：即使第二基板堆叠在具有脆性结构的第一基板上，通过防止第一基板或导电层的变形或断裂来提供具有适当的基板之间的电信号传输特性的板间连接结构或导电层。解决方案：制造板间连接结构的方法包括用于固定设置有导电层的第一基板和在与导电层相对应的位置处设置有通孔的第二基板的步骤，第二基板和导电层，并且使用除了导电层区域之外的区域; 以及将液体导电材料插入到通孔中并用填充在通孔中并与导电层接触的金属形成穿透导电部分的步骤。版权所有（C）2008，JPO＆INPIT

50. 发明专利

JP2008113402A amplifier 审中-公开
标题翻译：放大器
公开(公告)号：JP2008113402A
公开(公告)日：2008-05-15
申请号：JP2007053120
申请日：2007-03-02
申请人： Mitsubishi Electric Corp , 三菱電機株式会社
发明人： IYOMASA KAZUHIRO , MORI KAZUTOMI , YAMANAKA KOJI , NAKAYAMA MASATOSHI , YONEDA SATOSHI , OWADA SATORU , OHASHI HIDEMASA , TSUYAMA YASUNORI
IPC分类号： H03F3/60
CPC分类号： H01L2224/48227 , H01L2224/49175
摘要： PROBLEM TO BE SOLVED: To obtain a small-sized amplifier with higher efficiency, wide band and small mounting area for real transistors. SOLUTION: An amplifier comprises: a transistor 10 for amplification; a stab 20 for higher harmonic wave reflection which is connected to an output terminal of the transistor 10 for amplification and diffuses an input susceptance at a plurality of frequencies each of which is an integer multiple of a fundamental wave frequency f 0 ; and a fundamental wave matching circuit 30 whose one terminal is connected to the output terminal of the transistor 10 for amplification in parallel with the stab 20 for higher harmonic wave reflection and another terminal is connected to a load circuit and which impedance-matches a sum of an output admittance of the transistor 10 for amplification and the input susceptance of the stab for higher harmonic wave reflection to an impedance value of the load circuit, wherein the stab 20 for higher harmonic wave reflection includes one trunk stab T21 whose one terminal is connected to the output terminal of the transistor for amplification, and a plurality of branch stabs T22, T23 branched and connected in parallel to another terminal of the trunk stab T21. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：为了获得具有更高效率，宽带和实际晶体管的小安装面积的小尺寸放大器。解决方案：放大器包括：用于放大的晶体管10; 用于高次谐波反射的刺杆20，其连接到用于放大的晶体管10的输出端子，并以多个频率扩散输入电纳，每个频率是基波频率f 0的整数倍， SB>; 以及一个基波匹配电路30，其一端连接到晶体管10的输出端，用于与用于高次谐波反射的插针20并联放大，另一端连接到负载电路，阻抗匹配用于放大的晶体管10的输出导纳和用于高次谐波反射的插针的输入电纳对于负载电路的阻抗值，其中用于高次谐波反射的针刺20包括一个中继线刺激T21，其一个端子连接到用于放大的晶体管的输出端子，以及分支并并联连接到主干线刺针T21的另一个端子的多个分支刺针T22，T23。版权所有（C）2008，JPO＆INPIT

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