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41. 发明专利

JPH08275151A DISTRIBUTION DECODER FOR MULTIPLEXED COMPRESSED IMAGE-AUDIO DATA 失效
公开(公告)号：JPH08275151A
公开(公告)日：1996-10-18
申请号：JP7113295
申请日：1995-03-29
申请人： HITACHI LTD
发明人： FUJII YUKIO , OKU MASUO
IPC分类号： H04L12/70 , H04L12/951 , H04N7/10 , H04N7/24 , H04N19/00 , H04N19/102 , H04N19/196 , H04N19/423 , H04N19/426 , H04N19/44 , H04N19/46 , H04N19/65 , H04N19/70 , H04N19/80 , H04N19/85 , H04N19/89 , H04N21/433 , H04N21/434 , H04N21/438 , H04L12/56
摘要： PURPOSE: To realize data distribution to a decoder inexpensively from a TS packet on which plural programs are multiplexed. CONSTITUTION: A packet reception buffer is provided in the inside of a RAM 7 used by a CPU 12 for system control. Thus, the data distribution to a decoder is realized by providing the buffer to the inside of the RAM without increasing number of components and increasing the component cost.

42. 发明专利

JPH08116535A DECODER FOR CODED VIDEO SIGNAL 失效
公开(公告)号：JPH08116535A
公开(公告)日：1996-05-07
申请号：JP15622395
申请日：1995-06-22
申请人： HITACHI LTD
发明人： MIZOZOE HIROKI , OKU MASUO , TSUBOI YUKITOSHI , FUJII YUKIO , HORI JINICHI
IPC分类号： H04N19/102 , G06T9/00 , H03M7/30 , H03M7/40 , H04N7/24 , H04N19/00 , H04N19/134 , H04N19/152 , H04N19/189 , H04N19/423 , H04N19/426 , H04N19/44 , H04N19/46 , H04N19/503 , H04N19/61 , H04N19/625 , H04N19/70 , H04N19/91
摘要： PURPOSE: To suppress increase in an arithmetic processing clock frequency and increase in power consumption attended therewith by eliminating zero data before analysis of coded data to decrease the time required for the analysis thereby increasing the time for arithmetic processing by this decrease. CONSTITUTION: Input coded data in 8-bit are given to registers 111 115 in an input buffer memory 11 and fed to a selector 1171, distributed to registers 1173-1178 and when data are all stored, the data are written in an FIFO memory 118 as data in 48-bit. In this case, when consecutive 5-bytes are discriminated to be zero based on contents of the registers 111-115 by a zero discrimination circuit 116, a selector control circuit 1172 controls the selector 1171 so as not to select any of the registers 1173-1178 thereby eliminating zero data in 1-byte in the register 115. Thus, the time required for analysis and elimination of zero data in the variable length decoding unit is used for arithmetic processing and the increase in the arithmetic clock frequency is prevented.

43. 发明专利

JPH06350993A MOVING PICTURE COMPRESSION ENCODER AND DECODER, AND RECORDING AND REPRODUCING DEVICE 失效
公开(公告)号：JPH06350993A
公开(公告)日：1994-12-22
申请号：JP13814993
申请日：1993-06-10
申请人： HITACHI LTD
发明人： TAKAHASHI SUSUMU , OKU MASUO , TSUBOI YUKITOSHI , FUJII YUKIO , ICHIGE KENJI
IPC分类号： H04N5/92 , H04N19/124 , H04N19/126 , H04N19/134 , H04N19/149 , H04N19/172 , H04N19/18 , H04N19/189 , H04N19/423 , H04N19/46 , H04N19/60 , H04N19/625 , H04N19/70 , H04N19/80 , H04N19/85 , H04N19/91 , H04N7/133
摘要： PURPOSE:To visually reduce the degradation of picture quality due to a quantization error by switching quantization characteristics so as to let the quantization error be an opposite phase for respective frames by a threshold value selector. CONSTITUTION:Threshold value setting devices 11 and 12 are provided for determining threshold values at the time of quantization. The threshold value selector 10 performs selection from the threshold values set by the two setting devices corresponding to signals alternating for the respective frames generated by a frame alternating signal generator 9 and the threshold value is used for the actual threshold value. For a coefficient value and a quantization value, the threshold values are made different for the respective frames and when the coefficient value is within the range of an area held between the two threshold values, the quantized value larger than the coefficient value and the quantized value smaller than the coefficient value are alternately repeated for the value after the quantization. Since the quantized value when the value is present in a center part between both quantization levels, that is, a part where the quantization error becomes large, becomes the opposite phase for the respective frames, the quantization error becomes visually inconspicuous.

44. 发明专利

JPH04290085A IMAGE DATA COMPRESSION DEVICE AND IMAGE DATA RECORDING AND REPRODUCING DEVICE USING THE SAME 失效
公开(公告)号：JPH04290085A
公开(公告)日：1992-10-14
申请号：JP5431691
申请日：1991-03-19
申请人： HITACHI LTD
发明人： ICHIGE KENJI , OKU MASUO , TAKAHASHI SUSUMU , FUJII YUKIO
IPC分类号： H04N5/92 , H04N19/00 , H04N19/124 , H04N19/134 , H04N19/172 , H04N19/176 , H04N19/196 , H04N19/423 , H04N19/625 , H04N19/65 , H04N19/70 , H04N19/89 , H04N19/91
摘要： PURPOSE:To generate the constant amount of data generated in one field not depending on an input image and simultaneously to encode one picture uniformally and with the optimum picture quality in the encoder of image data. CONSTITUTION:A quantization condition is generated replying to an image in each field by using a reference quantization condition calculation circuit 2 and a quantization condition generation circuit 3, and difference between the targeted generated amount of information in one field generated by a target information amount curve generation circuit 6 and the actual generated amount of information is taken, and the quantization condition is switched within a generated quantization condition corresponding to a differential value.

45. 发明专利

JPH04117880A TIME BASE ERROR CORRECTION DEVICE 失效
公开(公告)号：JPH04117880A
公开(公告)日：1992-04-17
申请号：JP23582890
申请日：1990-09-07
申请人： HITACHI LTD
发明人： FUJII YUKIO , OKU MASUO , ABE HIROCHIKA , TAKAHASHI SUSUMU , ROKUTA MORIHITO
IPC分类号： H04N5/956 , H04N5/95
摘要： PURPOSE:To attain time base error correction with high reliability by using a digital filter so as to extract a high frequency component of a time base error signal and using its output signal so as to phase-modulate a write clock. CONSTITUTION:A time base error signal DELTAphi outputted from a phase comparator circuit 5 is digitized in an A/D converter circuit 29 by using a write clock WCK from a phase modulation circuit 20 as a sampling pulse and the result is fed to a digital HPF 19, in which a high frequency component is extracted. The high frequency component is converted into an analog signal by a D/A converter circuit 30 and the result is fed to the phase modulation circuit 20. Since the extracted time base error signal DELTAphi is digitized and subject to filter and limiter processing in this way, the operation reliability is improved because a reply with respect to a large level DELTAphi is made zero.

46. 发明专利

JPH02252369A CONTOUR CORRECTION CIRCUIT FOR CHROMINANCE SIGNAL 失效
公开(公告)号：JPH02252369A
公开(公告)日：1990-10-11
申请号：JP7171189
申请日：1989-03-27
申请人： HITACHI LTD
发明人： OKU MASUO , ABE HIROCHIKA , FUJII YUKIO , TAKAHASHI SUSUMU , IMAMURA OSAMU
IPC分类号： H04N5/208
摘要： PURPOSE:To surely correct the contour of a chrominance signal by detecting a transient part directly from a color difference signal, and further, correcting the contours of both two color difference signals if even one of two color difference signals is the transient part. CONSTITUTION:The chrominance signal is demodulated by a color decoder 1, and differentiated by differentiation circuits 2a, 2b. Derivative signal is led to a logic circuit 61 through absolute circuit 3a, 3b the differentiation circuits 4a, 4b and limiters 5a, 5b. In the circuit 61, the transient part of the color difference signal is determined in conformity to a logic diagram shown in a figure. Namely, it is detected that one of two color difference signal is the transient part. Further, the output of the circuit 61 is inverted by an inverter 62, and multiplied by the primary derivative signal of the color difference signal by multiplication circuits 7a, 7b, and a contour corrected signal is obtained. This signal passes through coefficient multipliers 8a, 8b, and is mixed by adders 10a, 10b together with the color difference signal adjusted at its timing by delay circuits 9a, 9b, and becomes the contour corrected color difference signal.

47. 发明专利

JPH0296493A SIGNAL DELAY PROCESSING CIRCUIT FOR VTR 失效
公开(公告)号：JPH0296493A
公开(公告)日：1990-04-09
申请号：JP24734488
申请日：1988-10-03
申请人： HITACHI LTD
发明人： TAKAHASHI SUSUMU , OKU MASUO , IMAMURA OSAMU , ABE HIROCHIKA , FUJII YUKIO
IPC分类号： H04N9/83
摘要： PURPOSE:To evade the gravity dislocation addition of a signal at the time of double dubbing and to prevent the deterioration of a picture quality by providing a mode discrimination delay means which provides a one-horizontal scanning time difference between the time difference between a luminance signal and a chrominance signal at a reproduced output terminal in a first mode and the same time difference in a second mode. CONSTITUTION:The luminance signal selected by a switch 8 is FM-modulated by an FM-modulator 6, and the chrominance signal selected by a switch 9 is converted into low frequencies by a frequency low range converter 7, and they are added by an adder 5. Thereafter, the signals are amplified by a recording amplifier 4, and recorded on a magnetic tape which is not shown in a figure by magnetic hands 2 and 2'. At the time of reproducing, the recording signals on the tape is alternately reproduced by reproducing heads 3 and 3', amplified by reproducing amplifiers 14 and 14., then linked by a switcher 15, the luminance signal is frequency-compensated by an equalizing circuit 16, and demodulated by an FM demodulator 18. The low-frequency-converted chrominance signal is fetched by a low pass filter 17, and restored to the original frequencies by a frequency high range converter 21.

48. 发明专利

JPH0271689A HIGH DEFINITION VIDEO DISK PLAYER 失效
公开(公告)号：JPH0271689A
公开(公告)日：1990-03-12
申请号：JP22233488
申请日：1988-09-07
申请人： HITACHI LTD
发明人： OKU MASUO , ONISHI KUNIKAZU , KISHI YUJI , FUJII YUKIO , SASAKI TORU
IPC分类号： H04N5/76 , G11B7/00 , G11B7/004 , G11B20/02 , H04N5/93
摘要： PURPOSE:To obtain a high definition video disk player by providing a means reproducing simultaneously 1st and 2nd video signals recorded on the same or other disks and a means synthesizing both signals and decoding a video signal with high definition. CONSTITUTION:The same reference code generator 111 is used for the reproduction of a video disk 101a and a digital audio disk 101b and the synchronizing operation is attained. A detection circuit 116 discriminates information whether it is audio information or high definition information given to the disk 101a. In the information is the audio information, a switch 118 gives reproduction information to a DA converter and an analog signal is sent a terminal B and in the latter case, high definition information is added to the reproduction signal of the disk 101a at a synthesis circuit 121 via a buffer memory 119 and a decoder 120 and the result is sent to a terminal A and a high definition picture is decoded.

49. 发明专利

JPH0265392A VIDEO SIGNAL REPRODUCING DEVICE 失效
公开(公告)号：JPH0265392A
公开(公告)日：1990-03-06
申请号：JP21496088
申请日：1988-08-31
申请人： HITACHI LTD
发明人： KUDO YOSHIMICHI , SAITO ISAO , SATO YASUHIRO , OKU MASUO , FUJII YUKIO
IPC分类号： H04N5/21 , H04N9/87
摘要： PURPOSE:To attain the noise suppression of less after-image generation, etc., by providing an arithmetic circuit to suppress the noise, which is included in a signal based on difference with a signal almost before one field, independently to a luminance signal and a carrier chrominance signal concerning a signal which is separated to the luminance signal and carrier chrominance signal. CONSTITUTION:Data selectors 14 and 21 and switches 27 and 28 are connected to an N-side in a figure. Then, the output of an arithmetic circuit 9 is induced through the data selector 14 to an adder circuit 15 and the output of an arithmetic circuit 17 is induced through a chrominance modulating circuit 22 and the data selector 21 to the adder circuit 15 respectively. Thus, a video signal, for which a noise component is suppressed, is obtained. In a subtracting circuit 10a, the noise component extracted in a coefficient circuit 11 is subtracted from the luminance signal, which is separated in a Y/C separating circuit 8, and the output of the subtracting circuit 10a, namely, the output of the arithmetic circuit 9 obtains the luminance signal, for which the noise component is suppressed. On the other hand, the suppression of the noise component is executed in the arithmetic circuit 17 wholly samely as the luminance signal concerning the chrominance signal. However, concerning the chrominance signal, the carrier chrominance signal separated in the Y/C separating circuit 8 is converted to two color difference signals, for which time-division multiplexing is executed, in a chrominance demodulating circuit 16.

50. 发明专利

JPH01166689A SIGNAL PROCESSING CIRCUIT FOR VIDEO DISK PLAYER 失效
公开(公告)号：JPH01166689A
公开(公告)日：1989-06-30
申请号：JP32395387
申请日：1987-12-23
申请人： HITACHI LTD
发明人： KUDO YOSHIMICHI , OKU MASUO , SAITO ISAO , FUJII YUKIO
IPC分类号： H04N9/77
摘要： PURPOSE:To facilitate the synthesis of a reproduced video signal with an external video signal by inputting the reproduced video signal to a field memory, synchronizing the phases of the external video signal or vertical and horizontal synchronizing signals and a color subcarrier and outputting the result. CONSTITUTION:The reproduced video signal is written in the field memory 5 via an FM demodulator 1, a CCD 2 for time axis correction and an A/D converter 4. A signal read from the field memory 5 is outputted via a SYNC conversion circuit 8 and a D/A converter 9. A write address and readout address are controlled in the field memory 5 so that the reproduced video signal is outputted while synchronizing its phase with that of the external video signal or the vertical and horizontal synchronizing signals and the color subcarrier.

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