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31. 发明专利

JP2000347051A OPTICAL/ELECTRICAL WIRING BOARD, ITS MANUFACTURING METHOD AND PACKAGE BOARD 失效
公开(公告)号：JP2000347051A
公开(公告)日：2000-12-15
申请号：JP2000087195
申请日：2000-03-27
申请人： TOPPAN PRINTING CO LTD
发明人： TSUKAMOTO TAKETO , KUMAI KOICHI , HIRAYAMA SHIGERU
IPC分类号： G02B6/122 , G02B6/13 , H05K1/02
摘要： PROBLEM TO BE SOLVED: To provide an optical/electrical wiring board which is capable of high-density mounting or miniaturization and which enables the mounting of optical parts to be performed in the same method as that of electrical parts. SOLUTION: The device is an optical/electrical wiring board having an optical wiring layer 13, which is provided with a core 1 for propagating light and with a clad 2 for burying the core 1, on the electrical wiring 10 of a wiring base plate 9; it is equipped with a mirror 3 installed in a part of the core 1, a pad 5 installed for the purpose of soldering optical components on the periphery immediately above the mirror 3, and a via hole 12 for electrically connecting the pad 5 to the electrical wiring of the base plate 9. For aligning at the time of the manufacturing, it is desirable to use an alignment mark 4.

32. 发明专利

JP2000047024A HEAT-RESISTANT COLOR FILTER AND ITS PRODUCTION 失效
公开(公告)号：JP2000047024A
公开(公告)日：2000-02-18
申请号：JP32809498
申请日：1998-11-18
申请人： TOPPAN PRINTING CO LTD
发明人： HIROTA IKUO , KITAZAWA KAZUSHIGE , TSUKAMOTO TAKETO
IPC分类号： G02B5/20 , G02F1/1335 , G02B1/10
摘要： PROBLEM TO BE SOLVED: To provide a heat-resistant color filter having excellent smoothness in which the electrode pattern layer is not corroded by a developer by successively forming an electrode pattern layer, first overcoat layer having light- transmitting property, color pattern layer, and second overcoat layer having light-transmitting property on a transparent substrate. SOLUTION: This heat-resistant color filter is produced by successively forming an electrode pattern layer, first overcoat layer 5 having light- transmitting property, color pattern layer 6 and second overcoat layer 7 having light-transmitting property on a transparent substrate (glass substrate 1). In this process, the electrode pattern consists of laminated layers of an ITO pattern layer 2 and Ag pattern layer 3. Instead of ITO, SnO can be used, and instead of Ag, Cr/Cu/Cr or the like can be used. Or, the first overcoat layer 5 is formed not only on the electrode pattern layer but on all over the face except for the electrode terminal part. Further, the second overcoat layer 7 is formed on the color pattern layer 6 formed on the first overcoat layer 5.

33. 发明专利

JPH1065343A MULTILAYER WIRING BOARD AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH1065343A
公开(公告)日：1998-03-06
申请号：JP21825496
申请日：1996-08-20
申请人： TOPPAN PRINTING CO LTD
发明人： KOKUBO KAZUHIRO , TSUKAMOTO TAKETO , OFUSA TOSHIO
IPC分类号： H05K3/22 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a multilayer wiring board which is superior in horizontal accuracy and has a fine circuit pattern, and a manufacturing method of a multilayer wiring board which enables the manufacture of the multilayer wiring board efficiently and at a low cost. SOLUTION: The manufacturing method of a multilayer wiring board comprises the step of smoothing a conductive pattern forming surface in which on one side of a substrate 10, a conductive pattern 2 is formed, its overall surface is coated, an insulating layer 5 made of a photosensitive resin almost the same as the conductive pattern 2 in thickness, is formed and the insulating layer 5 of the part which bulges, correspondingly to the conductive pattern 2 is selectively removed by photo-etching, and the step of forming insulating films in which insulating layer 5 made of a photosensitive resin is formed overall on the conductive pattern forming surface. Then, by repeating at least once the step of smoothing the conductive pattern forming surface and by repeating the step of forming the insulating film a predetermined number of times less than the repetition of the step for smoothing the conductive pattern forming surface by one process, a multilayer wiring board is manufactured.

34. 发明专利

JPH0897330A CHIP CARRIER AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH0897330A
公开(公告)日：1996-04-12
申请号：JP15473195
申请日：1995-06-21
申请人： TOPPAN PRINTING CO LTD
发明人： TSUKAMOTO TAKETO , SEKINE HIDEKATSU , OFUSA TOSHIO
IPC分类号： H05K1/02 , H01L23/12 , H05K1/05 , H05K3/00 , H05K3/42 , H05K3/46
摘要： PURPOSE: To provide a new BGA type chip carrier having higher radiation property and connection reliability than a conventional BGA type semiconductor device using a base material made mainly of resin. CONSTITUTION: In a chip carrier using, as a base, a metal plate in which plural holes are formed substantially in a matrix form, a through-hole 2 in a metal plate 1 is tapered in advance, and three-layer films composed of copper foils 3a, 3b, polyimide films 4a, 4b and polyimide adhesives 5a, 5b are bonded together from both sides of the through-hole. Hole parts 22, 36 for via-holes are formed by laser beam processing, and copper layers 23, 38 are formed by electroless plating and electroplating, thus producing via-holes 24, 37. Then, wiring patterns 25, 39 and an external connection electrode 26 are formed by sequential patterning. Finally, a semiconductor chip 18 is mounted and a solder pad 19 is formed.

35. 发明专利

JPH0823067A LEAD FRAME 失效
公开(公告)号：JPH0823067A
公开(公告)日：1996-01-23
申请号：JP15388994
申请日：1994-07-05
申请人： TOPPAN PRINTING CO LTD
发明人： SEKINE HIDEKATSU , TSUKAMOTO TAKETO , UEDA RYUJI , OKANO TATSUHIRO , MOTOYOSHI TOSHIFUMI , KANAZAWA KENJI
IPC分类号： H01L21/60 , H01L23/50
摘要： PURPOSE:To provide a lead frame which is excellent in heat dissipating and wire bonding properties and protected against a useless short circuit. CONSTITUTION:A first lead frame member 11 equipped with leads and a second lead frame member 12 equipped with an island 14 on which a semiconductor integrated circuit is mounted are bonded together for the formation of a lead frame, wherein either of the lead frame members 11 and 12 is set thin-walled by half etching at a part of the lead frame where the frame members 11 and 12 are kept, separate from each other.

36. 发明专利

JPH07283336A CHIP CARRIER 失效
公开(公告)号：JPH07283336A
公开(公告)日：1995-10-27
申请号：JP6715494
申请日：1994-04-05
申请人： TOPPAN PRINTING CO LTD
发明人： OFUSA TOSHIO , TSUKAMOTO TAKETO , TOKI SOTARO
IPC分类号： H01L23/12
摘要： PURPOSE:To improve cooling property and connection reliability by providing a spherical pad for making connection to an external circuit at each end. CONSTITUTION:A lead member 20 is aligned and overlapped on the surface at the side of an insulation base (adhesive sheet) 12 provided at a metal plate 11 for mounting a chip and both are heated to 180 deg.C and are laminated while applying 2-5kg/cm pressure and are cooled after approximately 30 minutes and then are taken out. A hole 30 for connection is formed in advance at a part where the lead member 20 and the conductor part of the metal plate 11 for mounting a chip need to be electrically connected, both are laminated, a conductive paste including copper powder is filled into the hole 30, and the conductive paste is heated at 150 deg.C for 30 minutes to cure the paste. The electrode on the chip and the lead member 20 are electrically connected by a wire bonder with a gold wire whose diameter is 30mum. The ground electrode on the chip is connected to the conductor member of the metal plate 11 for mounting the chip.

37. 发明专利

JPH07249724A CONNECTING STRUCTURE BETWEEN LEAD FRAME AND EXTERNAL CIRCUIT 失效
公开(公告)号：JPH07249724A
公开(公告)日：1995-09-26
申请号：JP6568094
申请日：1994-03-09
申请人： TOPPAN PRINTING CO LTD
发明人： SEKINE HIDEKATSU , TSUKAMOTO TAKETO , OKANO TATSUHIRO , SASAKI ATSUSHI
IPC分类号： H05K1/18 , H01L23/50 , H05K1/02 , H05K3/34
摘要： PURPOSE:To provide a connecting structure between lead frame and external circuit in which the lead frame can serve as a ground layer and thereby the pin count of lead frame can be decreased while furthermore the degree of freedom can be increased in the design of circuit board while enhancing heat dissipation properties. CONSTITUTION:The lead frame electrically connects the inner frame with the internal circuit of a package 1 and connects the outer lead with the signal pad 8 of an external circuit board 5. The lead 2 is covered at least partially with a dielectric layer 3 which is further covered with a conductive layer 4 of the lead frame connected with a ground pad 6 arranged on the external circuit board 5. A thermal via 7 is provided under the ground pad 6 arranged on the external circuit board 5.

38. 发明专利

JPH07211848A LEAD FRAME AND SEMICONDUCTOR DEVICE USING THIS LEAD FRAME 失效
公开(公告)号：JPH07211848A
公开(公告)日：1995-08-11
申请号：JP435694
申请日：1994-01-20
申请人： TOPPAN PRINTING CO LTD
发明人： OTAKI HIROKO , TSUKAMOTO TAKETO
IPC分类号： H01L21/60 , H01L23/50
摘要： PURPOSE:To provide a semiconductor device which depends upon the external shape of a bonding capillary (pin) to be used, is restricted concerning the flat width of an inner lead and the distance between adjacent bondings, and copes with multipin, narrow pitch, and multielectrode on a semiconductor integrated circuit. CONSTITUTION:An inner lead tip part 1 is connected with an electrode 6 formed on a semiconductor integrated circuit, not by wire bonding but by using a part member for connection having an electrically continuous hole filled with conductor.

39. 发明专利

JPH07202113A LEAD FRAME AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH07202113A
公开(公告)日：1995-08-04
申请号：JP33638293
申请日：1993-12-28
申请人： TOPPAN PRINTING CO LTD
发明人： OFUSA TOSHIO , TSUKAMOTO TAKETO , OKANO TATSUHIRO , TOKI SOTARO , KOKUBO KAZUHIRO
IPC分类号： H01L23/28 , H01L23/50
摘要： PURPOSE:To prevent the trouble caused by a loosened lead by firmly fixing the lead by a method wherein a plurality of leads, to be connected to the electrode of a semiconductor integrated circuit, are fixed by resin and the surface of each lead and the surface of a resin part are formed with each other. CONSTITUTION:Lead frames are formed in such a manner that the surface of a plurality of inner leads 2, to be connected to the electrode of a semiconductor integrated circuit, and the surface of a resin part 4 are made even with each other. The resin part 4 is filled up so that each inner lead 2 is connected in such a manner that it becomes thicker than the depth of recessed parts, and the lead frames 2, which are in the state that each inner lead 2 is fixed, are obtained. Accordingly, as the resin 4 for fixing the inner leads, is not protuberated on the inner leads of the completed lead frame, the resin 4 does not interfere the performance in the following processes; the resin 4 is not cracked, the inner leads are firmly fixed; and the trouble caused by a loosened lead can be prevented.

40. 发明专利

JPH07115170A MULTI-CHIP MODULE 失效
公开(公告)号：JPH07115170A
公开(公告)日：1995-05-02
申请号：JP5302294
申请日：1994-02-25
申请人： TOPPAN PRINTING CO LTD
发明人： SHIBAYAMA TAKAHIRO , TSUKAMOTO TAKETO
IPC分类号： H01L25/18 , H01L25/04
摘要： PURPOSE:To avoid an uneven temperature distribution on a printed wiring board and avoid the exfoliation of sealing resin. CONSTITUTION:A multi-chip module has a printed wiring board 4 which has wiring patterns 6 at least on its one surface, a plurality of IC chips 2 mounted on the printed wiring board 4, a lead frame 5 with which the printed wiring board 4 is electrically connected to an external circuit and sealing resin 1 which covers at least the surface of the printed wiring board 4 on which the IC chips 2 are mounted. A heat conducting metal layer 8 is formed on the printed wiring board 4 as its uppermost layer which is brought into contact with the sealing resin 1. It is recommended that the metal layer 8 is made of material same as the wiring patterns 6 are made of. It is also recommended that the surface of the metal layer 8 is roughened by a surface treatment to improve the adhesion strength between the sealing resin 1 and itself.

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