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31. 发明专利

JPS58111107A MAGNETIC RECORDER 失效
公开(公告)号：JPS58111107A
公开(公告)日：1983-07-02
申请号：JP20915781
申请日：1981-12-25
申请人： HITACHI LTD
发明人： KITAZAWA KEIJI , OONUMA KUNIHIKO , SUZUKI KUNIO
IPC分类号： G06F3/06 , G11B19/04 , G11B20/18
摘要： PURPOSE:To suppress the continuous destruction of recording data which may be generated due to the malfunction or failure of a controlling device to its minimum: one sector, by incorporating a writing malfunction preventing control part in a disc controlling device. CONSTITUTION:When a writing signal 6 is on at the timing when a sector pulse 3 is turned on, the output terminal Q of an error detecting J-K flip-flop which is off in initial state is inverted and turned on. Said state is discriminated as malfunction and an output signal 13 from the output Q is fed back to the controlling device as a signal to start error processing. A writing signal 6 is turned off at a gate by an error discriminating output signal 13 independently of the error processing so as not to be outputted to a disc device 10. Even if the writing signal is turned off, the error processing of the controlling device is ended and the writing operation is not restarted until a clear signal 15 of the flip- flop 14 is turned on.

32. 发明专利

JPS5537628A BUS MULTIIJUMP SYSTEM 失效
公开(公告)号：JPS5537628A
公开(公告)日：1980-03-15
申请号：JP10970778
申请日：1978-09-08
申请人： HITACHI LTD
发明人： OONUMA KUNIHIKO , MAEJIMA HIDEO
IPC分类号： G06F9/22 , G06F3/00 , G06F7/00
摘要： PURPOSE:To realize multi-jump branch operation to various subroutines within an executive routine of instruction at a time, by using part or all of data on a data bus as an element (address of ROM) for the multi-jump operation. CONSTITUTION:A control structure part is provided with jump data latch register 303 connected to data bus 201. With flag register 305 set, the contnets of register 303 are inputted to microprogram address generator 203A by data selector 304 to generate an address of jump data in register 303 and with register 305 reset, the contents of instruction register 202 are inputted by selector 304 to generate an address of an instruction in register 202. In this way, ROM address register 205 can set the contents of bus 201 and multi-jump operation corresponding to the contents of data on bus 201 becomes possible.

33. 发明专利

JPS5513443A INTERFACE CONTROLLER 失效
公开(公告)号：JPS5513443A
公开(公告)日：1980-01-30
申请号：JP8516978
申请日：1978-07-14
申请人： HITACHI LTD
发明人： MAEJIMA HIDEO , OONUMA KUNIHIKO
IPC分类号： G06F13/42 , G06F3/00 , G06F13/00 , G06F15/00
摘要： PURPOSE:To decrease the number of the input/output pin by memorizing the interface control which controls both the main memory and the input/output unit of the data processor along with decision of the wake-up to the main memory or the input/ output unit within the microprocessor. CONSTITUTION:Microprocessor 100 delivers interface signal 1b and 1c which are action-decoded via the clock given from clock generation circuit 101 and then separates those interface signals into the decode clock stop signal, main memory start 1e, input/output unit start signal 1f and permission signal 1g of DMA each through decoder 102. With encoding of the interface signals within processor 100, the microreader is supplied to the wake-up of main memory 103 and input/output unit 104 plus to decision circuits 500-502 of permitted by DMA. The decision output activates one of flip-flops 503-505, and the encoded signals 1b and 1c receive the output control by signal 5e of CMA request synchronization 506 and are delivered outside.

34. 发明专利

JPS5431242A DATA PROCESSOR 失效
公开(公告)号：JPS5431242A
公开(公告)日：1979-03-08
申请号：JP9696877
申请日：1977-08-15
申请人： HITACHI LTD
发明人： NISHIDA TAKEHIKO , OONUMA KUNIHIKO
IPC分类号： G06F7/00 , G06F5/00 , G06F5/01 , G06F7/76
摘要： PURPOSE:To shorten the calculation process by carrying out the repetion of the shift action occurring in the process of the calculation process in a cycle via the bit array converter which is controlled by the bit array selection circuit provided to the input side of the register of one side.

35. 发明专利

JPS5326547A REGISTER TRACK MEMORY DEVICE 失效
公开(公告)号：JPS5326547A
公开(公告)日：1978-03-11
申请号：JP10052776
申请日：1976-08-25
申请人： HITACHI LTD
发明人： NISHIDA TAKEHIKO , OONUMA KUNIHIKO
IPC分类号： G06F11/28 , G06F7/00
摘要： PURPOSE:To realize a register track memory device which can trace a register without especially leading out many specific signal lines only for this purpose and influencing an instruction execution time at all.

36. 发明专利

JPS5268340A DATA PROCESSING UNIT 失效
公开(公告)号：JPS5268340A
公开(公告)日：1977-06-07
申请号：JP14403575
申请日：1975-12-05
申请人： HITACHI LTD
发明人： ASADA KAZUYOSHI , YASUDA HAJIME , OONUMA KUNIHIKO
IPC分类号： G05B15/02 , G05B19/05 , G06F9/30 , G06F15/00
摘要： PURPOSE:To make one unit of processing unit serve for both computer and sequency by switching operation mode of the processing unit.

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