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31. 发明专利

JPS5478960A PHASE COMPARISON CIRCUIT 失效
公开(公告)号：JPS5478960A
公开(公告)日：1979-06-23
申请号：JP14605477
申请日：1977-12-07
申请人： HITACHI LTD
发明人： NAKAGAWA HIMIO , MIZUTANI KEIICHI
IPC分类号： H03K7/02 , H03D3/02 , H03D13/00 , H03K5/26 , H03L7/085 , H03L7/091
摘要： PURPOSE:To prevent sag, by providing the gate between the reference voltage point and the load resistor and turning on or off in synchronizing with the phase comparison circuit, in the current Miller circuit type phase comparison circuit. CONSTITUTION:The saw tooth signal b' is inputted to the base of transistor TrQ8, and the reference signal pulse c' is inputted to the terminal 1. When the pulse c' is at high level, TrQ14 is conductive, current flows to Q13, and differential amplifiers Q8 and Q9 are operatd. The current e is outputted from the current Miller circuits Q10 and Q11 with the phase of the saw tooth wave b', and the gate circuits Q17 and Q18 are turned on, and the load resistor R4 is connected to the reference voltage Vo. While the gate is turned on, the charging and discharging charge of the capacitors C4 and C5 is zeroed. While the pulse c' is low, the differential amplifier is not operated, the gate is off, and no charge and discharge is made to C4 and C5. Thus, the output voltage f' is a given voltage DELTAV which is the difference of the reference voltage Vo and the collector voltage of TrQo, causing no sag.

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