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31. 发明专利

JPH08305678A PARALLEL SORT SYSTEM 失效
公开(公告)号：JPH08305678A
公开(公告)日：1996-11-22
申请号：JP10521195
申请日：1995-04-28
申请人： FUJITSU LTD
发明人： OGIWARA KAZUTAKA , TAKE RIICHIRO
IPC分类号： G06F15/16 , G06F7/24 , G06F15/173
摘要： PURPOSE: To shorten the time required for parallel sort by limiting the exchange of sort elements between processors to the exchange required for transposition of a matrix as the result to reduce not only the communication volume between processors but also input data for merging. CONSTITUTION: This processor consists of a sort element storage means 1, a transposition means 2, a merging sort means 3, and a control means 4. For example, when an already sorted sort array is stored in the sort element storage means 1, the processing where four processings, namely, the primary transposition processing in the transposition means 2, the partial merging sort processing in the merging sort means 3, the secondary transposition processing in the transposition means 2, and the all element merging sort processing in the merging sort means 3 are successively executed is repeated to perform the paralle sort of sort object elements. Since there is no probability that data first stored in the sort element storage means 1 is already sorted, internal sort is first executed in an internal sort means 5.

32. 发明专利

JPH07152712A MULTIPROCESSOR FOR EXECUTING BARRIER SYNCHRONIZATION 失效
公开(公告)号：JPH07152712A
公开(公告)日：1995-06-16
申请号：JP29967793
申请日：1993-11-30
申请人： FUJITSU LTD
发明人： TAKE RIICHIRO , HAGIWARA TSUNEKO
IPC分类号： G06F15/173 , G06F9/52 , G06F15/16
摘要： PURPOSE:To speed up barrier synchronization by connecting a prescribed number of processing means through a multi-stage connection network of prescribed stages and switching a switch connection state on a message passing route in accordance with control information located on the end of a message. CONSTITUTION:The multi-stage connection network 120 connects each N processing means 110 and respective processing means 110 previously set up the connection states of respective switch boxes 121 in the network 120 by respective initial state setting means 111. When each processing means 110 arrives at a barrier, its corresponding message sending means 112 successively sends log N messages, and at the time of receiving log N messages, a judging means 113 judges the arrival of all the processing means 110 at the barrier. In each switch box 121, only a route connected to an I/O terminal on message routes is switched in accordance with a succeeding message based upon control information included in the end of a message passing the switch box 121 itself.

33. 发明专利

JPH06131156A PARALLEL SORTING SYSTEM 失效
公开(公告)号：JPH06131156A
公开(公告)日：1994-05-13
申请号：JP28328592
申请日：1992-10-21
申请人： FUJITSU LTD
发明人： AKABOSHI NAOTERU , NOGUCHI YASUO , TAKE RIICHIRO , YOKOTA HARUO
IPC分类号： G06F7/24 , G06F15/16 , G06F15/173 , G06F15/80
摘要： PURPOSE:To curtail traffic between processors so as to improve the throughput of sorting processing by executing the exchange/combination processing of a sorted element by internal processing by a comparing and exchanging means in each processor. CONSTITUTION:In N-units (=2 ) of respective processors 2-1, 2-2,...2-N connected to a network 1, the element vector of a stored object is stored in sorted element storage means 3-1, 3-2,...3-N, and the element vector stored in the sorted element storage means 3-1, 3-2,...3-N is sorted by internal sorting means 4-1, 4-2,...4-N. Transposing means 5-1, 5-2,...5-N send the element stored in the sorted element storage means 3-1, 3-2,...3-N to the position of transposition between N-units of the processors 2-1, 2-2,...2-N, and the comparing and exchanging means 6-1, 6-2,...6-N compare two groups of the sorted element vectors stored in the stored element storage means 3-1, 3-2,...3-N, and exchange their order.

34. 发明专利

JPH03116357A PARALLEL PROCESSING SYSTEM 失效
公开(公告)号：JPH03116357A
公开(公告)日：1991-05-17
申请号：JP25497689
申请日：1989-09-29
申请人： FUJITSU LTD
发明人： TAKE RIICHIRO , HARA HIROTAKA
IPC分类号： G06F15/16 , G06F15/173 , G06F15/80
摘要： PURPOSE:To efficiently perform the information processing which requires communication processing of a mesh or torus pattern by mapping a model of the mesh or torus pattern on respective processors of a parallel computer. CONSTITUTION:With respect to a mesh pattern 3 and a torus pattern 8 having nXn nodes, n processors 1 ((n) is the square root of the number of nodes) and a universal communication coupling network 2 are used to generate n/2 loops or X-shaped patterns including 2n nodes without overlapping. Every two processors are selected from n processors without overlapping and are assigned to n/2 loops or X-shaped patterns, and two assigned processors are alternately assigned to successive nodes in each loop or X-shaped pattern. Thus, the informa tion processing requiring the communication processing of the mesh or torus pattern is efficiently performed.

35. 发明专利

JPH03105550A PARALLEL COMPUTER 失效
公开(公告)号：JPH03105550A
公开(公告)日：1991-05-02
申请号：JP24231289
申请日：1989-09-20
申请人： FUJITSU LTD
发明人： NOGUCHI YASUO , TAKE RIICHIRO
IPC分类号： G06F15/16 , G06F15/173 , G06F15/80
摘要： PURPOSE:To compute the data scattered to each cell over all cells and sending these computing results back to all cells at a high speed by using a distribution device which divides a single input into two outputs, a computing order deciding device, an arithmetic unit, and a storage to form a process unit part of a process means. CONSTITUTION:A process unit part of a process means consists of a distribution device 1 which divides a signal input into two outputs, a computing order deciding device 2 which decides the computing number and the number to be computed when the data on its own cell and the data received from the cell of the remote side, an arithmetic unit 3 which computes the two inputs and outputs this computing result, and a storage 4 which stores the data received from the remote side cell or the computing result. In such the constitution, the data scattered to each cell are computed over all cells and the computing result can be sent back to all cells at a high speed with use of only a supercubic communication network which is capable of the bidirectional communication as a communication means and with no use of a cell CPU as long as the operation satisfies a coupling rule and not an exchange rule.

36. 发明专利

JPS63129428A LOCK MANAGEMENT CONTROL SYSTEM 失效
公开(公告)号：JPS63129428A
公开(公告)日：1988-06-01
申请号：JP27574386
申请日：1986-11-19
申请人： FUJITSU LTD
发明人： TAKE RIICHIRO
IPC分类号： G06F9/46 , G06F9/52 , G06F15/16 , G06F15/177
摘要： PURPOSE:To perform the processing of lock management at high speed, by distributing and allotting the lock management of plural common resources to plural managing processes, and deciding the managing process with takes in charge of the resource based on a value obtained by a hash function from the identification name of the resource. CONSTITUTION:The process 1 that is a lock request origin finds a function value by a prescribed hash function evaluating part 3 from the identification name 2 of a required resource 6 at the time of requesting lock. The process indexes the hash table 4 of a system based on the function value, and obtains the identifier of a required managing process 5, and calls the managing process 5 by the identifier, and requests the lock management by the identification name 2. The managing process 5 processes the lock management of a designated resource as usual by the identification name of the resource designated by the request. In such way, it is possible to distribute the resource 6 to the plural managing processes 5 and allot management, and to call a required managing process classified by every resource after identifying the managing process easily, and to improve processing efficiency.

37. 发明专利

JP2002207614A DEVICE AND METHOD FOR GATHERING STATISTIC INFORMATION 失效
公开(公告)号：JP2002207614A
公开(公告)日：2002-07-26
申请号：JP2001004533
申请日：2001-01-12
申请人： FUJITSU LTD
发明人： TAMURA MASATOSHI , TAKE RIICHIRO
IPC分类号： G06F11/34
摘要： PROBLEM TO BE SOLVED: To make a counter continue to count how many times respective events occurs without stopping even if reaching its maximum value when statistic information on events occurring in time series is gathered. SOLUTION: When how many times the events occurring in time series occur is counted, the count value of the counter for the events is corrected according to the count time of the events when necessary and the count value of the counter having been corrected at need is counted up when the events occurs to judge whether or not the maximum count value of the counter is exceeded, when it is judged that the count value exceeds the maximum count value, counting-up operation is performed after the count value is decreased through specific operation, but when not, the counting-up operation is performed without performing the specific operation.

38. 发明专利

JP2001075945A STATISTICAL PROCESSOR AND RECORDING MEDIUM 失效
公开(公告)号：JP2001075945A
公开(公告)日：2001-03-23
申请号：JP25100599
申请日：1999-09-06
申请人： FUJITSU LTD
发明人： AKABOSHI NAOTERU , HARADA RIRIAN , TAKE RIICHIRO
IPC分类号： G06F17/18 , G06F17/00 , G06F19/00 , G06Q10/00 , G06Q30/02 , G06Q50/00 , G06Q50/10
摘要： PROBLEM TO BE SOLVED: To efficiently generate a statistic at high speed by performing statistical processing concerning an attribute contained in transaction data which contain all items of respective item sets. SOLUTION: An item set group generating part 20 finds corresponding relations between respective items and transaction ID groups, which contain these items, from transaction ID and transaction data groups, which contain items, stored in a magnetic disk device 5 as a data base and generates the item set group corresponding to each of transaction ID from the item sets in the data base. Then, the data of this item set group are outputted to a statistical processing part 21. The statistical processing part 21 performs statistical outputting concerning the attribute in the transaction data group containing all the items for each item.

39. 发明专利

JP2000181763A CACHE CONTROLLER WHICH DYNAMICALLY MANAGES DATA BETWEEN CACHE MODULES AND ITS CONTROL METHOD 失效
公开(公告)号：JP2000181763A
公开(公告)日：2000-06-30
申请号：JP35862598
申请日：1998-12-17
申请人： FUJITSU LTD
发明人： TAKE RIICHIRO , OGIWARA KAZUTAKA , NOGUCHI YASUO , NAGAHASHI KENJI
IPC分类号： G06F12/00 , G06F12/08 , G06F12/12
摘要： PROBLEM TO BE SOLVED: To perform an optimum page allocation as a whole system in a storage system consisting of a storage module and a cache module. SOLUTION: A managing means 1 manages the location of data which a cache module 4 manages. A move-out means 2 moves part of data to a cache module 5 when an idle area is to be secured in the cache module 4. A move-in means 3 moves data into the cache module 4 from the cache module 5 when data which have been moved out is required.

40. 发明专利

JP2509947B2 失效
公开(公告)号：JP2509947B2
公开(公告)日：1996-06-26
申请号：JP20541687
申请日：1987-08-19
申请人： FUJITSU LTD
发明人： TAKE RIICHIRO
IPC分类号： G06F15/173 , H04L12/50

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