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    • 32. 发明专利
    • Receiving circuit
    • JP3577541B2
    • 2004-10-13
    • JP22370099
    • 1999-08-06
    • 株式会社日立製作所
    • 隆志 佐瀬文夫 村林睦 菊地
    • H04L25/03H04L25/02
    • Y02D50/10
    • PROBLEM TO BE SOLVED: To obtain a circuit by which capacitance is reduced in an AC connection capacitor and edge information is obtained by means of an optical operation level by providing pair of resistor networks, a pair of AC connections circuits, a pair of converters and an RS filp-flop for reproducing a digital signal corresponding to the received signals at the ends of CANH and CANL with the outputs of the converters as an input signal. SOLUTION: The pair of resistor networks 10a and 10b respectively divide the voltages of the received signals at the ends of buses CANH and CANL. The pair of AC connection circuits respectively generate edge information from the output signals of the pair of resistor networks 10a and 10b. The pair of converters execute comparison through the use of the pair of output signals from the pair of AC connection circuits, one detects a rising edge and the other detects a falling edge. The RS flip flop FF reproduces the digital signals corresponding to the received signals at the ends of CANH and CANL by adopting one output of the pair of converters as a set input signal and the other output as a reset input signal.