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21. 发明专利

JPH04132045A CD-ROM HOST INTERFACE DEVICE 失效
公开(公告)号：JPH04132045A
公开(公告)日：1992-05-06
申请号：JP25286390
申请日：1990-09-21
申请人： TOSHIBA CORP
发明人： KOBAYASHI AKIRA
IPC分类号： G06F3/08 , G11B20/10
摘要： PURPOSE:To synchronize block data transferring timing and reproducing timing with each other, and to obtain the stable reproduced sound of high quality by comparing the phases of timing signals generated by two timing signal generating means. CONSTITUTION:The timing signal of each data transfer starting time is generated by a second timing signal generating means 31 to 33 from a data transfer request signal to be supplied every time the digital audio data of a block unit is transferred from a CD-ROM disk reader. Next, the phases of the timing signals generated by a first and the second timing signal generating means 13', 31 to 33 respectively are compared by a phase comparing means 34, and this phase difference is sent to a clock signal generating means 36, and a clock signal is generated in frequency corresponding to the phase difference, and this clock signal is made up the system clock of the first timing signal generating means 13'. Thus, the block data transferring timing and the reproducing timing from the CD-ROM disk reader can be synchronized with each other, and the periodical break of the reproduced sound is eliminated, and the good reproduced sound can be obtained.

22. 发明专利

JPH04119564A CD-ROM DISK READER 失效
公开(公告)号：JPH04119564A
公开(公告)日：1992-04-21
申请号：JP23928790
申请日：1990-09-10
申请人： TOSHIBA CORP
发明人： KOBAYASHI AKIRA
IPC分类号： G06F3/08 , G11B20/10
摘要： PURPOSE:To enable high-speed data transfer by adding a synchronous pattern data generated by a synchronous pattern data generating circuit to a CD-ROM data read out from a buffer memory in the time division multiple manner when transferring data to an external device. CONSTITUTION:A buffer memory 15 is provided to store the data read out from a CD-ROM disk 1, a synchronous pattern generating circuit 17 is provided to generate the synchronous pattern data according to a CD-ROM standard, and a multiplexer 18 is provided to add the generated synchronous pattern data to the data in the buffer memory 15 in the time division multiple manner. When transferring the data to the external device, the synchronous pattern data generated by the synchronous pattern data generating circuit 17 is added to the CD-ROM data read out from the buffer memory 15 in the time division multiple manner. Therefore, the CD-ROM standard data containing the synchronous pattern can be continuously transferred by a hardware. Thus, high-speed data transfer is enabled.

23. 发明专利

JPH03285474A ELECTRONIC CAMERA SYSTEM 失效
公开(公告)号：JPH03285474A
公开(公告)日：1991-12-16
申请号：JP8294590
申请日：1990-03-31
申请人： TOSHIBA CORP
发明人： IRIE HIDEYUKI , KOBAYASHI AKIRA , MIMURA HIDENORI
IPC分类号： H04N5/225 , H04N5/272 , H04N9/75 , H04N9/79
摘要： PURPOSE:To enable the various types of picture work by replacing the same part as a registered color among pictures stored in a frame memory with an arbitrary video signal. CONSTITUTION:Photographing, the decision of which part of the front picture read out from a memory card is replaced with the background picture, or setting is executed and when the photographed background picture or the background picture from the memory card is inputted and a signal coincident with a registered chrominance signal exists among signals read out from a frame memory 15, the area of the frame memory 15 storing the signal is reloaded to the signal of the background picture.

24. 发明专利

JPS62231468A SUBCODE DATA DEMODULATOR 失效
公开(公告)号：JPS62231468A
公开(公告)日：1987-10-12
申请号：JP7293886
申请日：1986-03-31
申请人： TOSHIBA CORP
发明人： KOBAYASHI AKIRA
IPC分类号： G11B7/00 , G11B7/005 , G11B20/10 , G11B27/10
摘要： PURPOSE:To facilitate extremely handling without the need for manual logic conversion by discriminating the logic of received subcode data and a synchronizing signal, applying a logical conversion in response to the result of discrimination and inputting the subcode data and the synchronizing signal after logical conversion to a demodulation circuit. CONSTITUTION:A subcode frame synchronizing signal S SYNC inputted to a logical discrimination circuit 46 is converted by a buffer 40 to be at V CC level when logic level is 'H' at to be 0 level when 'L' level, then the result is integrated by a low-pass filter comprising a resistor 41 and a capacitor 44 and compared with a reference voltage by a comparator 45. When the result of discrimination S CONT of the circuit 46 is at 'L', a logical conversion circuit 51 acts as a non-inverting buffer. When the S CONT is at 'H', a logical conversion circuit 51 acts as an inverting buffer. Thus, reception data and the synchronizing signal S SYNC, S DAT, S CK and S BCK are converted into positive logic by EX-OR circuits 47-50 and sent to a demodulation circuit 16.

25. 发明专利

JPS6275586A COLOR GRAPHIC DISPLAY CONTROLLER 失效
公开(公告)号：JPS6275586A
公开(公告)日：1987-04-07
申请号：JP21660885
申请日：1985-09-30
申请人： TOSHIBA CORP
发明人： KOBAYASHI AKIRA
IPC分类号： G09G5/06 , G09G1/28

26. 发明专利

JPS6222277A DISC REPRODUCING DEVICE 失效
公开(公告)号：JPS6222277A
公开(公告)日：1987-01-30
申请号：JP16150185
申请日：1985-07-22
申请人： TOSHIBA CORP
发明人： KOBAYASHI AKIRA
IPC分类号： G11B27/10 , G11B7/00 , G11B7/004 , G11B20/10
摘要： PURPOSE:To attain an easy-to-see demodulated screen of graphic picture data by masking code data corresponding to the graphic picture data among sub-code data outputted externally when the state is set to a state other than the normal reproducing state to output the result. CONSTITUTION:The sub-code data obtained by coding control data, prescribed display data and graphic picture data is recorded on a digital audio disc together with main information data. A signal read by a pickup 15 is fed to an EFM demodulation sub-code extraction circuit 19. When the mode is set to a state other than the normal reproducing mode, a signal SPLAY outputted from a system control 29 goes to an L level. Thus, the code data corresponding to the graphic picture data among the sub-code outputted from the circuit 19 is masked by a AND gate buffer 32 and the result is fed to a sub-code demodulator 36 as zero data. Thus, when the graphic picture data is demodu lated, a displeasant screen is prevented.

27. 发明专利

JPS59107453A Disk record reproducer 失效
标题翻译：磁盘录像机
公开(公告)号：JPS59107453A
公开(公告)日：1984-06-21
申请号：JP21571282
申请日：1982-12-09
申请人： Toshiba Corp
发明人： KOBAYASHI AKIRA
IPC分类号： G11B19/22 , G11B19/20
CPC分类号： G11B19/20
摘要： PURPOSE:To stop quickly the revolutions of a disk and to improve the operability of a disk record reproducer by varying the output period of a brake pulse which is supplied to a disk driving motor in response to the number of revolutions of the disk. CONSTITUTION:The output of a limiter amplifier 35 is supplied to a cycle/voltage converter 41. The output voltage of the converter 41 is gradually reduced as the cycle of the input pulse becomes longer when a control input terminal is set at a high level. Then the output level of the converter 41 is held and then supplied to a brake pulse generating circuit 31. A comparator 311 of the circuit 31 supplies the brake pulse to a motor 12 via a motor driving circuit 30 for a prescribed period during which the signal Si supplied to a non-inverse terminal exceeds the reference voltage VTH. As a result, the output period of the brake pulse is varied in response to the number of revolutions of the corresponding motor 12 of that time point when a pickup 13 is positioned with a distance gamma apart from the center of a disk 11. Thus the brake torque is given to the motor 12 in response to its number of revolutions.
摘要翻译：目的：快速停止磁盘的转动，并通过响应于盘的转数改变提供给磁盘驱动电机的制动脉冲的输出周期来提高磁盘记录再现器的可操作性。构成：限幅放大器35的输出被提供给周期/电压转换器41.当控制输入端子被设定在高电平时，转换器41的输出电压随着输入脉冲的周期变长而逐渐减小。然后转换器41的输出电平被保持，然后提供给制动脉冲发生电路31.电路31的比较器311经由马达驱动电路30将电机12的制动脉冲提供给电动机12，在此期间，信号提供给非反相端子的Si超过参考电压VTH。结果，制动脉冲的输出周期响应于拾取器13定位在距离盘11的中心距离γ的距离处的那个时间点的对应的电动机12的转数而变化。因此，响应于其转数给予电动机12的制动转矩。

28. 发明专利

JPS5952457A Motor controller of digital disc reproducer 失效
标题翻译：数码复印机电机控制器
公开(公告)号：JPS5952457A
公开(公告)日：1984-03-27
申请号：JP16125182
申请日：1982-09-16
申请人： Toshiba Corp
发明人： KOBAYASHI AKIRA
IPC分类号： G11B19/28 , G11B19/20
CPC分类号： G11B19/20
摘要： PURPOSE:To attain quickly the shift of mode from the non-reproducing state to the reproducing state of a disc, by providing a means for controlling a disc driving motor so that the line velocity of the disc is constant with respect to the pickup at the reproducing state and a means for controlling the rotating speed at a prescribed angular velocity at the non-reproducing state. CONSTITUTION:When a system control circuit 32 detects that a pause state is continued for a prescribed period, a voltage corresponding to the synchronism of an output signal of a photosensor 41 is stored in a sampling and holding circuit 44 to turn off a pickup power supply 14 and to turn on an analog switch 45. In this case, the digital data is not read out, an HF signal detector 18 resets the 1st frequency divider 23, inhibits the operation of a phase comparison circuit 26 and turns on an analog switch 315. Thus, a disc driving motor 12 drives the disc 11 at a prescribed angular velocity corresponding to the pickup position stopped at the pause mode without being effected by the fluctuation in the load torque and the temperature change.
摘要翻译：目的：通过提供一种用于控制盘驱动电动机的装置，使得盘的线速度相对于拾音器的速度恒定，从而快速地实现模式从非再现状态转换到盘的再现状态再现状态和用于在非再现状态下以规定角速度控制转速的装置。构成：当系统控制电路32检测到暂停状态持续规定期间时，对应于光电传感器41的输出信号的同步的电压被存储在取样保持电路44中以关闭拾取电源在这种情况下，数字数据不被读出，HF信号检测器18复位第一分频器23，禁止相位比较电路26的操作并接通模拟开关315 因此，盘驱动电动机12以与暂停模式下停止的拾取位置相对应的规定角速度驱动盘11，而不受负载转矩和温度变化的波动的影响。

29. 发明专利

JP2010199434A Method for manufacturing semiconductor device 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：JP2010199434A
公开(公告)日：2010-09-09
申请号：JP2009044623
申请日：2009-02-26
申请人： Toshiba Corp , 株式会社東芝
发明人： ISHIMURA MUNIO , KOBAYASHI AKIRA , NARITA MASAKI
IPC分类号： H01L21/027 , H01L21/3065 , H01L21/768
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor device, the method forming patterns with smaller spaces than an exposable limit dimension.
SOLUTION: The method for manufacturing the semiconductor device includes the steps of: forming a resist film 23 on a film 11 to be processed, formed on a substrate 10; exposing and developing the resist film and extending it in a first direction to form an opening pattern 31A having a constricted part in a second direction perpendicular to the first direction; depositing a deposit 24 containing elements that compose gas, on the resist film in a gas existing atmosphere to form a film pattern 25 connecting the bottom part of the opening pattern at the constricted part in the second direction by the deposit; and etching the film to be processed, by a dry etching method to transfer the film pattern.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种制造半导体器件的方法，该方法形成具有比可曝光极限尺寸小的空间的图案。解决方案：制造半导体器件的方法包括以下步骤：在基板10上形成待加工的膜11上形成抗蚀剂膜23; 曝光和显影抗蚀剂膜并沿第一方向延伸以形成在垂直于第一方向的第二方向上具有缩颈部分的开口图案31A; 在气体存在的气氛中在抗蚀剂膜上沉积含有构成气体的元素的沉积物24，以形成通过沉积物在第二方向连接开口图案在第二方向上的开口图案的底部的膜图案25; 并通过干蚀刻方法蚀刻待处理的膜以转印膜图案。版权所有（C）2010，JPO＆INPIT

30. 发明专利

JP2003018551A Data processing apparatus and data processing method 审中-公开
标题翻译：数据处理设备和数据处理方法
公开(公告)号：JP2003018551A
公开(公告)日：2003-01-17
申请号：JP2001202873
申请日：2001-07-04
申请人： Toshiba Corp , 株式会社東芝
发明人： KOBAYASHI AKIRA
IPC分类号： G06F3/06 , G06F5/00 , G06F5/06 , H04N5/937
摘要： PROBLEM TO BE SOLVED: To provide an excellent data processing apparatus and a data processing method capable of simplifying control in buffering a plurality of data being different in code length. SOLUTION: In the data processing apparatus and the data processing method, a buffer memory manager 9 separates a memory region 10Ma of a buffer memory 10 into a plurality of FIFO type memory regions 10Ma1-10Ma4, the memory capacity of at least one memory region in the plurality of memory regions is set at a value which is an integer multiple of a least common multiple of a first code length and a second code length, and the region is controlled so that first data with the first code length and second data with the second code length are written into this region.
摘要翻译：要解决的问题：提供一种能够简化缓冲代码长度不同的多个数据的控制的优良数据处理装置和数据处理方法。解决方案：在数据处理装置和数据处理方法中，缓冲存储器管理器9将缓冲存储器10的存储区域10Ma分离成多个FIFO型存储区域10Ma1-10Ma4，至少存储区域的存储器容量将多个存储区域设置为第一码长度和第二码长度的最小公倍数的整数倍的值，并且控制该区域，使得具有第一码长度的第一数据和具有第一码长度的第二数据第二个代码长度被写入该区域。

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