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21. 发明专利

JP2000200220A ADDRESS CONVERTING DEVICE 失效
公开(公告)号：JP2000200220A
公开(公告)日：2000-07-18
申请号：JP87499
申请日：1999-01-06
申请人： HITACHI LTD
发明人： NAGASUGA HIROFUMI , KIYOI MASAHIRO , HIRAIWA YURI , AKIBA CHIEKO , SAKURABA TATSUTOSHI
IPC分类号： G06F12/10
摘要： PROBLEM TO BE SOLVED: To effectively use an actual storage device of a large capacity and to speed up the processes by regarding an address obtained by address conversion using an address conversion table as an actual address when a flag indicates a system common area. SOLUTION: A segment table entry 310 has a common bit 312 and a page table origin 315. When the common bit 312 is ON, it means that an object area is the system common area. In this case, an invalidation judging means 500 invalidates a section identifier stored in a control register 2110 and sets the high-order 32 bits 610 of an actual address to zero. Therefore, the same virtual address can be specified and accessed from different spaces and the system common area where a program to be shared is arranged can be arranged. Then actual address representation of 63-bit size using the high-order 32 bits and low-order 31 bits of 64 bits is enabled through address conversion.

22. 发明专利

JPH10320218A AUTOMATIC STARTING METHOD FOR COOPERATIVE JOB IN DATA TRANSFER PROCESSING 失效
公开(公告)号：JPH10320218A
公开(公告)日：1998-12-04
申请号：JP12828397
申请日：1997-05-19
申请人： HITACHI LTD
发明人： KIYOI MASAHIRO , YOSHIOKA SHIYOUICHIROU
IPC分类号： G06F9/46
摘要： PROBLEM TO BE SOLVED: To shorten processing time by starting a job to be cooperated at the time of receiving a processing request for a job of which execution is precedently started in the case of speeding up data trasnfer processing between plural jobs by using pipe cooperation so as to evade a state that data transfer processing can not be started because the job to be cooperated is not started. SOLUTION: An open control part 202 started at the time of receiving a pipe cooperation processing request from a requesting source job 103 having started its execution at first refers to a pipe cooperation definition table 209 storing the information of pipe cooperation processing to be executed by a computer 101 and retrieves a job to be cooperated to start a corresponding requested job 104. The open control part 202 started again at the time of receiving a pipe cooperation processing request from the job 104 having started its execution informs the job 103 of the start of the job to be cooperated.

23. 发明专利

JP2003216491A HIERARCHICAL CACHE CONTROL METHOD 审中-公开
公开(公告)号：JP2003216491A
公开(公告)日：2003-07-31
申请号：JP2002013647
申请日：2002-01-23
申请人： HITACHI LTD
发明人： FUTASE KENTA , NAGASUGA HIROFUMI , KIYOI MASAHIRO , MIYATA KAZUHISA
IPC分类号： G06F12/08 , G06F12/00
摘要： PROBLEM TO BE SOLVED: To avoid a data overlap between caches and improve utilization efficiency of a cache storage in a computer system having a plurality of cache storages. SOLUTION: A high-order cache staging means carries out staging of data read from a disk unit into a high-order cache and it instructs destaging of data read into a low-order cache. A high-order cache destaging means writes data for destaging in the disk unit, it instructs staging of data written in the low-order cache, and it carries out destaging of data from the high-order cache. A low-order cache staging means carries out staging of data written out of the high-order cache destaging means into the low-order cache. A low-order cache destaging means carries out destaging of the data instructed by the high- order cache staging means from the low-order cache. COPYRIGHT: (C)2003,JPO

24. 发明专利

JP2002259201A METHOD FOR STARTING COMPUTER SYSTEM 失效
公开(公告)号：JP2002259201A
公开(公告)日：2002-09-13
申请号：JP2001057650
申请日：2001-03-02
申请人： HITACHI LTD
发明人： KIYOI MASAHIRO , NAGASUGA HIROFUMI , ICHIKAWA MASAYA , OTSUJI AKIRA
IPC分类号： G06F12/12 , G06F1/00 , G06F1/24 , G06F9/00 , G06F9/24 , G06F11/00 , G06F11/14 , G06F12/00 , G06F12/10 , G06F15/177
摘要： PROBLEM TO BE SOLVED: To solve the problem that the initialization time of a main memory and the reconstruction time of a space for utilizing the main memory are extended at the time of restarting a computer system due to system failure occurrence when the capacity of a main storage device on which the computer system can be mounted is increased. SOLUTION: The main storage device is divided into an area to be initialized and an area not to be initialized when the computer system is restarted. A table for managing the utilization condition of the main memory and the utilization condition of the space is allocated to a main memory area not to be initialized. After restart, the main memory area not to be initialized is allocated to a request from a virtual space that should succeed contents and also to an address conversion table corresponding to the virtual space. The main memory area to be initialized is allocated to a request from any virtual space other than the virtual space that should succeed the contents. When the computer system is restarted, only the area to be initialized is initialized, and in the table for managing the utilization condition of the main memory, only a part corresponding to the area to be initialized is initialized.

25. 发明专利

JP2002099465A CACHE CONTROL METHOD 失效
公开(公告)号：JP2002099465A
公开(公告)日：2002-04-05
申请号：JP2000295441
申请日：2000-09-25
申请人： HITACHI LTD
发明人： NAGASUGA HIROFUMI , OTSUJI AKIRA , AKIBA CHIEKO , KIYOI MASAHIRO , ICHIKAWA MASAYA
IPC分类号： G06F12/08 , G06F3/06 , G06F12/00 , G06F15/16
摘要： PROBLEM TO BE SOLVED: To improve a response time of a database system and improve a throughput with efficient using of a hierarchical cache area. SOLUTION: In a computer system with the hierarchical cache are, a cache area for use is decided by file according to an access characteristic of data.

26. 发明专利

JP2000215067A INTERRUPTION PROCESSOR 失效
公开(公告)号：JP2000215067A
公开(公告)日：2000-08-04
申请号：JP1662799
申请日：1999-01-26
申请人： HITACHI LTD
发明人： KIYOI MASAHIRO , NAGASUGA HIROFUMI , OCHI FUTOSHI
IPC分类号： G06F12/02 , G06F9/46 , G06F9/48 , G06F12/06
摘要： PROBLEM TO BE SOLVED: To arrange a program area in arbitrary actual addresses and to effectively use the storage device by accepting an interruption initiated during the execution of a program allocated to arbitrary addresses (actual address) on a main storage and executing the interruption processing routine corresponding to the kind of the initiated interruption. SOLUTION: When the interruption is initiated, a computer system stores the contents of a PSW 102 in corresponding old PSWs 105 to 110 for interruption, stores the contents of an EXR register 103 in corresponding old EXRs 117 to 122 for interruption, and writes the contents of corresponding new PSWs 111 to 116 for interruption to the PSW 102 and clear the EXR register 103 to 0. Consequently, even when the program being executed at the time of the initiation of the interruption and an interruption processing routine are arranged in different actual storage sections, the process can normally be carried on. Thus, the interruption processing in the allocated program execution is enabled.

27. 发明专利

JPH11237996A METHOD FOR LINKING DATA BETWEEN COMPUTERS 失效
公开(公告)号：JPH11237996A
公开(公告)日：1999-08-31
申请号：JP4162198
申请日：1998-02-24
申请人： HITACHI LTD
发明人： KIYOI MASAHIRO , SAKURABA TATSUTOSHI , YAMAKAWA TAKAYASU
IPC分类号： G06F15/16 , G06F9/46
摘要： PROBLEM TO BE SOLVED: To execute pipe type link processing between a computer that has a remote file access function and a computer that does not have it by providing a pipe relaying part which receives a processing request from a 2nd job and links it with a 1st job in accordance with its content. SOLUTION: Although an OS 103 managing a 1st computer 101 can not access a file of another computer through a network, an OS 105 managing a 2nd computer 102 can execute a network file access to the other computer through the network. A pipe relaying part 114 compensates the OS 103, receives a pipe type data link request from a 2nd job 111 and realizes a pipe type data link with a 1st job 110. While the jobs 110 and 111 are activated by respective users, the part 114 is preliminarily activated by a system manager almost at the same time with when the execution of the computer 101 is started.

28. 发明专利

JPH07282024A COMMUNICATION CONTROLLER 失效
公开(公告)号：JPH07282024A
公开(公告)日：1995-10-27
申请号：JP9561994
申请日：1994-04-08
申请人： HITACHI LTD
发明人： NAGASUGA HIROFUMI , TANAKA TOSHIHARU , KIYOI MASAHIRO , OYAMA SOICHI , KINOSHITA TOSHIYUKI
IPC分类号： G06F15/173 , G06F15/163 , H04L12/18
摘要： PURPOSE:To efficiently perform processing to confirm that all transmission has been completed in a multi-address communication from a transmission processor to the other processors. CONSTITUTION:A transmission means 310 stores transfer data in a data storage area 332 with the multi-address communication request of the transmission processor 100 as a turning point, and turns on a communication completion information storage area 331-1. A notice means 341 executes interruption for causing the reception processors 210 and 220 of a reception processor group 200 to request reception. When the respective reception processors 210 and 220 request reception, a transfer means 341 transfers data in a data storage area 332 to the respective reception processors 210 and 220, and turns ON communication completion information storage areas 331-2 and 3 corresponding to the processors receiving data. When the whole communication completion information storage area 331 is turned on, a communication completion notice means 360 executes interruption for communication completion notice to the transmission processor 100.

29. 发明专利

JPH07114514A METHOD FOR DATA TRANSFER BETWEEN COMPUTERS 失效
公开(公告)号：JPH07114514A
公开(公告)日：1995-05-02
申请号：JP26063493
申请日：1993-10-19
申请人： HITACHI LTD
发明人： KIYOI MASAHIRO , ARAI TOSHIAKI , INOUE MASAYUKI , NAGASUGA HIROFUMI
IPC分类号： G06F9/48 , G06F9/46 , G06F9/52 , G06F15/16 , G06F15/167
摘要： PURPOSE:To shorten the process time of data transfer by executing a group of jobs which hand over intermediate data on the computers in parallel. CONSTITUTION:A data transfer decision part 6 finds a process where data can be handed over between the computers based on a file access history obtained by system operation information acquisition parts 8 and 9, and a batch process conversion part 7 generates a batch process for the data transfer between the computers based on the result. Job schedulers 10 and 11 executes the batch process for the data transfer between the computers and input/output management parts 12 and 13 perform synchronous control among input/output jobs to execute the jobs which perform the data transfer process between the different computers in parallel.

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