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21. 发明专利

JPH10135369A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JPH10135369A
公开(公告)日：1998-05-22
申请号：JP28477196
申请日：1996-10-28
申请人： HITACHI LTD
发明人： NOSE FUJIAKI , WATANABE YUJI , YAMAGUCHI EIJI , KIKUCHI TAKU , MIWA TAKASHI
IPC分类号： H01L21/60 , H01L23/12
摘要： PROBLEM TO BE SOLVED: To decrease the rigidity of an element mounting portion of an element mounting board, so as to reduce the stress applied onto a bump connection part of a semiconductor element and improve connection reliability of the bump connection part of the semiconductor element, by forming the element mounting portion of the element mounting board with a thickness smaller than that of a non-element mounting portion. SOLUTION: In an element mounting board 2 for supporting a semiconductor chip 1, an element mounting portion 2a is formed with a thickness smaller than that of a non-element mounting portion 2b. Thus, the rigidity of the element mounting portion 2 in the element mounting board 2 may be decreased. Therefore, when BGA is heated or cooled to cause the element mounting board 2 to expand or contract, the element mounting portion 2a may be deformed in accordance with the degree of deformation of the semiconductor chip 1, since the element mounting portion 2a having a coefficient of thermal expansion greater than that of the semiconductor chip 1 has flexibility. As a result, the stress applied onto a bump connection part 3a may be reduced, and connection reliability of the bump connection part 3a may be improved.

22. 发明专利

JPH10125720A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JPH10125720A
公开(公告)日：1998-05-15
申请号：JP27464096
申请日：1996-10-17
申请人： HITACHI LTD
发明人： WATANABE YUJI , YAMAGUCHI EIJI , NOSE FUJIAKI , KIKUCHI TAKU , MIWA TAKASHI
IPC分类号： H01L21/60 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To improve a connection life of bumps. SOLUTION: The semiconductor integrated circuit device includes an element mounting substrate 2 for mounting a semiconductor chip thereon, a sealing material 3 for sealing the semiconductor chip and its periphery, and a thermoset resin layer 6 whose thickness is slightly smaller than a diameter of bumps 4, provided between the adjacent bumps 4 and bonded by bonding onto a bump mounting surface 2a of the substrate 2. By controlling the thickness of the thermoset resin layer 6, a connection height 4a of the bumps 4 when a ball-grid- array type semiconductor device is mounted on the substrate 5 can be adjusted.

23. 发明专利

JPH08264569A MANUFACTURE OF RESIN SEALED SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08264569A
公开(公告)日：1996-10-11
申请号：JP6296995
申请日：1995-03-22
申请人： HITACHI LTD , HITACHI HOKKAI SEMICONDUCTOR
发明人： NOSE FUJIAKI , SAITO YOSHIKI , WATANABE YUJI , KIKUCHI TAKU , HOZOJI HIROYUKI , HONDA ATSUSHI
IPC分类号： H01L23/29 , H01L21/56 , H01L23/31
摘要： PURPOSE: To prevent short circuit of adjacent bonding wires and breakage of bonding wire caused by deformation of inner lead or variation of a tab by applying resin to a semiconductor pellet by potting prior to resin sealing the semiconductor pellet by transfer molding. CONSTITUTION: A semiconductor pellet 2 is mounted on the pellet mounting face at the tab 1C of a lead frame and an inner lead 1A of the lead frame is connected electrically with an outer terminal of the semiconductor pellet 2 by means of a bonding wire 3. A first resin 4 is then applied by potting to the semiconductor pellet 2 and to one side of the bonding wire 3 connected with the outer terminal thereof. Subsequently, the inner lead 1A, the tab 1C, the semiconductor pellet 2 and the bonding wire 3 are set in the cavity of a molding die and sealed with a second resin 5 by transfer molding.

24. 发明专利

JPH08204064A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH08204064A
公开(公告)日：1996-08-09
申请号：JP958895
申请日：1995-01-25
申请人： HITACHI LTD
发明人： WATANABE YUJI , NOSE FUJIAKI , KIKUCHI TAKU , SAITO YOSHIKI , HOZOJI HIROYUKI , HONDA ATSUSHI
IPC分类号： H01L23/28 , H01L21/56 , H01L23/50
摘要： PURPOSE: To remarkably improve heat radiation property of a semiconductor chip by releasing the heat generated on a semiconductor chip into the open air without passing a package. CONSTITUTION: A semiconductor device 1 is located at the center of a semiconductor chip 2, mounted on a die pad 3 and is bonded thereto. Moreover, a plurality of leads 4 are provided as the leadout electrodes near the external circumference of the semiconductor chip 2 and the leads 4 and electrodes of semiconductor chip 2 are electrically connected with a bonding wire 5. Moreover, in the package 6 of the semiconductor device 1, the die pad 3 located at the center of the package 6 is not sealed with the molding resin, a heat radiating hole 7 is provided in the package 6 and the rear surface of the die pad 3 is exposed to the open air. Therefore, the rear surface of the die pad 3 exposed to the open air can release the heat of the semiconductor chip 2 directly to the open air wihtout passing the package 6 having a lower thermal conductivity.

25. 发明专利

JPH0837273A LEAD FRAME AND RESIN-SEALED SEMICONDUCTOR DEVICE EQUIPPED THEREWITH 失效
公开(公告)号：JPH0837273A
公开(公告)日：1996-02-06
申请号：JP17075194
申请日：1994-07-22
申请人： HITACHI LTD , HITACHI HOKKAI SEMICONDUCTOR
发明人： WATANABE YUJI , HONDA ATSUSHI , KITAMURA TERUO , HOZOJI HIROYUKI , NOSE FUJIAKI , TSUTSUMI YASUOTO , SATO KENJI , YAMAGUCHI EIJI
IPC分类号： H01L21/60 , H01L23/50
摘要： PURPOSE:To provide a lead frame which is so formed as to be used for various kinds of semiconductor pellets in common to cope with a diversity of the semiconductor pellets in size and a semiconductor device where inner leads which are apt to be easily deformed in a manufacturing process are prevented from being deformed when the above lead frame is used for the formation of the semiconductor device. CONSTITUTION:A lead frame 1 has such a structure that a square tab 2 of Fe-Ni alloy or the like on which a semiconductor pellet is mounted and leads 3 of Fe-Ni alloy or the like which are electrically connected to the electrode of the semiconductor pellet are formed into one piece through the intermediary of an insulator 4 formed of adhesive tape bonded along the four sides of the square tab 2.

26. 发明专利

JPH07312376A METHOD OF MANUFACTURING RESIN SEALING TYPE SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH07312376A
公开(公告)日：1995-11-28
申请号：JP10507994
申请日：1994-05-19
申请人： HITACHI LTD , HITACHI HOKKAI SEMICONDUCTOR
发明人： TSUTSUMI YASUKI , HONDA ATSUSHI , KITAMURA TERUO , HOZOJI HIROYUKI , SATO KENJI , NOSE FUJIAKI , YAMAGUCHI EIJI , WATANABE YUJI
IPC分类号： H01L21/56
摘要： PURPOSE:To enhance manufacturing yield in an assembling process by a method where the sealing part of a tab and a tab suspending lead, a sealing part of a lead, a semiconductor pellet and a bonding wire are arranged within the cavity of a molding die, and then resin is filled. CONSTITUTION:When a region arranging each of tape dams 3D of a tab suspending lead 3B and a lead 3C is interposed between an upper die 6A and a lower die 6B of a molding die 6, it is possible to prevent the location slippage of the tab 3A caused by the bend of the tab suspending lead 3B due to the elastic force of the tape dam 3D by using a support member 5. Accordingly, it is possible to prevent the generation of the difference in speeds between the flowing speed of resin 1A flowing on a main surface of a semiconductor pellet 2 and a flowing speed of resin 1A flowing on the rear surface of the tab 3A. As a result, as it is possible to prevent a short-circuit between bonding wires due to wire flowing or the generation of voids due to enfolding of bubbles, it is possible to increase manufacturing yield in an assembling process of a resin sealing type semiconductor device.

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