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21. 发明专利

JPS59131177A Detector for fault position of power-transmission line 失效
标题翻译：电力传输线故障位置检测器
公开(公告)号：JPS59131177A
公开(公告)日：1984-07-27
申请号：JP703683
申请日：1983-01-17
申请人： Mitsubishi Electric Corp
发明人： ADACHI KAZUO , YAMAUCHI TOSHITANE
IPC分类号： H02H7/26 , G01M11/00 , G01R31/08
CPC分类号： Y04S10/522
摘要： PURPOSE: To spot accurately a fault point by connecting a power-transmission fault detector installed on a steel tower to an optical fiber fault locator through an optical fiber, and monitoring remotely its operation state.
CONSTITUTION: The power-transmission line fault detector 22 consists of an optical fiber breaker 31, optical fiber excessive-length storage part 32, and a power-transmission line fault detection part 33. If a fault occurs to a power- transmission line 1, the power-transmission line fault detection part 33 of the power-transmission line fault detector 22 installed on each steel tower which is closest to the fault point operates and the optical fiber breaker 31 operates associatively to disconnect the optical path of the optical fiber 32 combined with an overhead earth wire. Every power-transmission line fault detector 22 is monitored by the optical fiber fault locator 24 through the optical fiber 23, so the position of the fault point is spotted accurately.
COPYRIGHT: (C)1984,JPO&Japio
摘要翻译：目的：通过将钢塔上安装的输变电故障检测器与光纤故障定位器连接，通过光纤进行远程监控，从而准确识别故障点。构成：输电线路故障检测器22由光纤断路器31，光纤过长存储部32和输电线路故障检测部33组成。如果输电线路1发生故障，安装在最靠近故障点的每个钢塔上的输电线路故障检测器22的输电线路故障检测部分33工作，并且光纤断路器31相关联地操作以将光纤32的光路分离用架空地线。每个输电线路故障检测器22由光纤故障定位器24通过光纤23进行监控，因此故障点的位置被精确地发现。

22. 发明专利

JPS5637748A CODING METHOD 失效
公开(公告)号：JPS5637748A
公开(公告)日：1981-04-11
申请号：JP11365379
申请日：1979-09-04
申请人： MITSUBISHI ELECTRIC CORP
发明人： YAMAUCHI TOSHITANE
IPC分类号： H03M13/00 , H04L1/00
摘要： PURPOSE:To increase the coding efficiency at the inferior transmission circuit and also securing high reliability, by converting the information word of the CRC coding method into the matrix and then giving the parity check code to the matrix. CONSTITUTION:For example, the undetected error rate PB is reduced by adding the internal coding of the information length R bit to the (n, R, 4) CRC (Cyclic Redundancy Check) coding of the code length (n) bit, the information R bit and the intercode distance 4. Then the R bit has constitution (R=aXb) of the row (a) and the column (b) each, and the data obtained by calculating the parity of each row direction of the row (a) and the column (b-1) up to the (b-1) column, i.e., the composite coding method having the horizontal parity code is adopted for the column (b) data of the final column. The figure shows the matrix in which the information word of (k) bit is set for the row (a) and the column (b) each, and the (r) bit is the CRC check bit, i.e., the redundant bit which means the residual obtained by dividing the equation aXb=k by the grown polynomial g(x).

23. 发明专利

JPS55105724A CONNECTION CONTROL UNIT FOR DATA PROCESSING SYSTEM 失效
公开(公告)号：JPS55105724A
公开(公告)日：1980-08-13
申请号：JP1239279
申请日：1979-02-05
申请人： MITSUBISHI ELECTRIC CORP
发明人： IKEDA TAKEO , HIRASAWA MOICHI , MATSUMOTO MASAHIRO , YAMAUCHI TOSHITANE , FUJIWARA KENICHI
IPC分类号： G06F13/36 , G06F3/00
摘要： PURPOSE:To make easy in common use of input and output unit and to increase the transfer speed of data, by simply connecting the two data processing systems. CONSTITUTION:The data processing systems 5-1 and 5-2 are individually operated up to the time t1 and no data exchange is made between the both. At the time t1, CPU1-1 outputs the transfer request signal b and waits for the output of the operation signal from the connection control unit 8. At the time t2, since the signal a is outputted, the data of the system 5-1 is transferred to the system 5-2 via the connection control unit. That is, the data is read out from the memory 1-1 with the CPU1-1 and is written in the memory 2-2. At the time t3, when the transfer of data is finished, the transfer end signal c is outputted. Thus, the unit 8 makes low the signal a at the time t4 to inform the separation of the systems 5-1 and 5-2 to CPU1-1.

24. 发明专利

JPS54159803A MULTIPLE ADDRESS DATA TRANSFER SYSTEM 失效
公开(公告)号：JPS54159803A
公开(公告)日：1979-12-18
申请号：JP6907678
申请日：1978-06-07
申请人： MITSUBISHI ELECTRIC CORP
发明人： YAMAUCHI TOSHITANE
IPC分类号： G06F13/38 , G06F12/06 , H04L12/18
摘要： PURPOSE:To prevent the drop-out of data receiving by making transfer possible after confirming that all units which should receive multiple address data are in a receiving permission state, in the system where data of same contents is transferred to plural decentralized units. CONSTITUTION:This system is constituted by multiple address data originating unit T, which consists of multiple address data source Ta, multiple address data receiving unit receiving permission state inspection mechanism Tb and gate circuit Tc, multiple address data receiving unit R1, which consists of a multiple address data receiving mechanism and a receiving permission state response mechanism, and multiple address data receiving unit R2 which has the same constitution as unit R1.

25. 发明专利

JPS544026A MEMORY UNIT 失效
公开(公告)号：JPS544026A
公开(公告)日：1979-01-12
申请号：JP6922677
申请日：1977-06-10
申请人： MITSUBISHI ELECTRIC CORP
发明人： YAMAUCHI TOSHITANE , SUZUKI YOSHIMI
IPC分类号： G06F12/16 , G06F11/00 , G06F11/28 , G06F13/00
摘要： PURPOSE:To increase the reliability, by connecting the common memory and the bus via the gate and by closing the signal accessing the common meomory from the processor under debugging with the gate.

26. 发明专利

JPS5235848A DIFFERENCIAL PROTECTIVE RELAY 失效
公开(公告)号：JPS5235848A
公开(公告)日：1977-03-18
申请号：JP11234675
申请日：1975-09-17
申请人： MITSUBISHI ELECTRIC CORP
发明人： SUZUKI SUNAO , YAMAUCHI TOSHITANE
IPC分类号： H02H3/28 , H02H7/22
摘要： PURPOSE:Devised is a differential protective relay which is capable of preventing any erroneous operation originating from an abnormal transmission line, etc.

27. 发明专利

JPS5211809A DATA TRANSMISSION SYSTEM 失效
公开(公告)号：JPS5211809A
公开(公告)日：1977-01-29
申请号：JP8857275
申请日：1975-07-18
申请人： MITSUBISHI ELECTRIC CORP
发明人： INOUE TOORU , HIRASAWA MOICHI , YAMAUCHI TOSHITANE
IPC分类号： G06F13/00 , H04L12/42
摘要： PURPOSE:Effective use of the data transmission circuit by quick detection of the vacant circuit.

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