专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

14. 发明专利

JPH099305A TEST SIGNAL AND TEST SIGNAL GENERATOR 失效
公开(公告)号：JPH099305A
公开(公告)日：1997-01-10
申请号：JP16237596
申请日：1996-06-03
申请人： FLUKE MFG CO JOHN
发明人： ANDOREI MANEA , TOOMASU SHIYORUTSU , JIENZU BUOORAAZU , RORUFU PUTSUTSUHOFUN
IPC分类号： H04N11/16 , H04N17/00 , H04N17/02 , H04N17/04
摘要： PROBLEM TO BE SOLVED: To solve a problem when a standard test signal is used for the performance test of a decoder using a helper line. SOLUTION: A test pattern generated by a television signal generator includes picture elements extracted at least substantially from a helper line (block H), vertical direction adjacent picture elements with different luminance substantially subtracted from a main picture line (block M) at least substantially thereby allowing an engineer to easily discriminate whether or not a helper line is decoded by visual inspection.

15. 发明专利

JP2549431B2 失效
公开(公告)号：JP2549431B2
公开(公告)日：1996-10-30
申请号：JP4818289
申请日：1989-02-28
申请人： FUJITSU KK , FUJITSU UI ERU ESU AI KK , MATSUSHITA DENKI SANGYO KK
发明人： FUJII SHIGERU , IDO TAKAAKI , SHIMIZU MASAAKI , SUZUKI KEIJI , KONO TAKASHI
IPC分类号： H04N5/06 , H03L7/08 , H03L7/095 , H04N11/16

16. 发明专利

JPH08265791A PAL ADAPTIVE COLOR DEMODULATOR 失效
公开(公告)号：JPH08265791A
公开(公告)日：1996-10-11
申请号：JP6773295
申请日：1995-03-27
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： HATANO TAKAHISA
IPC分类号： H04N9/64 , H04N9/66 , H04N9/78 , H04N11/16
摘要： PURPOSE: To demodulate an accurate color even if phase distortion is large. CONSTITUTION: This demodulator is provided with a 1H delay line 1 for delaying the chroma signals of a PAL system for one horizontal period, the 1H delay line 2 for defining the output of the 1H delay line 1 as signals under consideration and delaying the signals under consideration for one horizontal period, a color demodulation circuit 3 for offsetting hue errors by an arithmetic operation among scanning lines from the input and output of the 1H delay line 1 and performing color demodulation, the color demodulation circuit 4 for offsetting the hue errors by the arithmetic operation among the scanning lines from the input and output of the 1H delay line 2 and performing the color demodulation, a vertical correlation detection circuit 5 for detecting correlation in a vertical direction from the chroma signals of three lines and a selector 6 for selecting the output of the color demodulation circuit 3 and the color demodulation circuit 4 corresponding to the output of the vertical correlation detection circuit 5.

20. 发明专利

JPH0730860A PHASE LOCKED LOOP SYNCHRONIZATION DEVICE FOR RE-SAMPLING SYSTEM HAVING INCOMPATIBLE INPUT OUTPUT SAMPLING RATE 失效
公开(公告)号：JPH0730860A
公开(公告)日：1995-01-31
申请号：JP1469394
申请日：1994-02-08
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KEBIN JIEI SUTETSUKU , KENESU II BABURETSUKU
IPC分类号： H04L7/033 , H04N5/12 , H04N5/44 , H04N7/01 , H04N9/64 , H04N11/16 , H04N11/20
摘要： PURPOSE:To stably and easily take phase synchronization between input and output sampling clocks even between input and output signals of an incompatible sampling rate such as between a standard studio component signal such as a CCIR 601 signal and a PAL system composite signal. CONSTITUTION:A phase comparator 124 compares an output phase reference signal generated from an output signal and an input phase reference signal generated from an input signal in the phase locked loop system provided with a voltage controlled oscillator to generate a phase difference signal to control a voltage controlled oscillator 128. The voltage controlled oscillator 128 generates an output clock signal based on the phase difference signal so that the input and output sampling clock signals are phase-locked.

你已经成功收藏专利！

检索式保存成功!

IPRDB