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    • 18. 发明专利
    • DIGITAL SIGNAL DEMODULATION CIRCUIT
    • JPH01126049A
    • 1989-05-18
    • JP28301087
    • 1987-11-11
    • TOSHIBA CORP
    • YOKOI TOKIHIKOSERIZAWA MUTSUMI
    • H04L27/14
    • PURPOSE:To reduce the error rate by dividing a sent digital signal into two channels having a phase difference and sampling others and synthesizing the result at leading and trailing of one channel when the sent digital signal is demodulated. CONSTITUTION:The received RF digital input signal 1 is divided into two, they are given to multipliers 2, 3. An output of a local oscillator 5 is used and one signal is given to the multipliers 2, 3 via a 90 deg. phase shifter to obtain a signal respectively. The signals are given to LPFs 6, 7, subject to limit amplification 8, 9 to form a rectangular wave. The output of limiters 8, 9 is given to an input terminal D and a terminal CK of four D FF 10-13 as the are or inverted (14-17). In case of the input to the terminal CK, the input to the terminal D is sampled and the output from an output terminal Q is added (18) and outputted (20) through the limiter 19. Thus, even with a waveform of a low modulation index, the demodulation with less error rate is attained.