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    • 11. 发明专利
    • SEMICONDUCTOR CONTAINER
    • JPS5596658A
    • 1980-07-23
    • JP513279
    • 1979-01-19
    • NIPPON ELECTRIC CO
    • NAKASHIMA MASATO
    • H01L23/32H01L23/00
    • PURPOSE:To accurately provide a chip carrying position in a semiconductor container by providing a positioning mark for carrying the chip while positioning a semiconductor chip at the terminal and the center in a container of laminated ceramic structure for containing the chip. CONSTITUTION:Upper, middle and lower ceramic layers 12, 11, 10 are formed at a container for containing a semiconductor chip. A metallized layer is coated on the surface of the layer 10, and etched to thereby form a chip carrying pattern 15. Simultaneously, positioning mark 16 disposed at the center and standard positioning marks 17 disposed at four corners are provided by utilizing the other portion of the metallized layer. A metal pattern 13 connected to the electrode pads of the chip is extended through the external wall of the layer 10 to the bottom surface on the surface of the farme of the layer 11 having an opening. Then, the layer 12 having an opening is placed on the layer 11. After the chip is contained in the container, the container is coated with mask sheet, and the pattern 13 is connected to external lead terminal 14. In this construction, cut-off portion 18 is formed at the outer peripheral corner between the layers 12 and 11 to see the mark 16.
    • 12. 发明专利
    • SEMICONDUCTOR DEVICE
    • JPS54141596A
    • 1979-11-02
    • JP5031578
    • 1978-04-26
    • NIPPON ELECTRIC CO
    • NAKASHIMA MASATO
    • H01L29/73H01L21/331H01L29/06H01L29/861H01L29/866H01L31/10H01L31/107
    • PURPOSE:To improve dielectric strength by providing an operation region of opposite conductivity type within a semiconductor substrate of one conductivity type, encircling the outer side thereof with a first guard ring of the same conductivity type and a low impurity concentration and further encircling this with a second guard ring of the same conductivity type as that of the substrate and a low concentration. CONSTITUTION:A pi type first epitaxial layer 2 of an extremely low impurity concentration and a P type second epitaxial layer 3 of an impurity concentration slightly higher than this are epitaxially grown in lamination on a P type Si substrate 1. Next, an N type operating region 4 is diffusion formed in the layer 3 to grow a PN junction between these. Thereafter an N type first guard ring 5 is provided in contact with the surface region of the region 4 within the layer 3 and further a P type second guard ring 6 of a impurity concentration lower than that of the layer 3 is diffusion formed in contact with the outer side thereof. Next, a shallow P type channel stopper region 7 entering this ring 6 is provided on the outer side of this ring and the portions other than the region 4 are covered with a protecting film 8 such as SiO2.