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    • 11. 发明专利
    • LUMINANCE SIGNAL AND CHROMINANCE SIGNAL SEPARATING DEVICE
    • JPS62190995A
    • 1987-08-21
    • JP3458986
    • 1986-02-18
    • MATSUSHITA ELECTRIC IND CO LTD
    • NISHIKIORI YOSHIHISA
    • H04N9/78
    • PURPOSE:To reduce dot disturbance by processing only in fields if vertical and horizontal correlation are lost by providing a mixing circuit which adds two chrominance signals at a variable ratio in correspondence to the output of a correlation deciding circuit. CONSTITUTION:A composite video signal (YL+YH+C) is applied to an input terminal 1 and a high-frequency video signal (YH+C) is filtered by a HPF 3. The 1st high-frequency video signal outputted by the HPF 3 is inputted to 1H.DL4 and 1H.DL5 successively to obtain the 2nd high-frequency video signal and the 3rd high-frequency video signal. The 1st, the 2nd, and the 3rd high-frequency video signals are inputted to a correlation arithmetic circuit to calculate a value (k) indicating the correlation between the 2nd high-frequency video signal and the 1st and the 2nd high-frequency video signals. A subtracter 7 subtracts the 1st high-frequency signal from the 2nd high-frequency video signal to obtain a chrominance signal and a subtracter 8 also obtains a chrominance signal from the 2nd and the 3rd high-frequency video signals. Then, an arithmetic circuit 9 adds the chrominance signals from the subtracters 7 and 8 at a ratio corresponding to the output (k) of the correlation arithmetic circuit 6k and a multiplier 13 multiplies the result by a half, so that the correct chrominance signal is outputted from a terminal 12.
    • 12. 发明专利
    • DIGITAL PHASE SYNCHRONIZING SIGNAL GENERATOR
    • JPS62171297A
    • 1987-07-28
    • JP1257486
    • 1986-01-23
    • MATSUSHITA ELECTRIC IND CO LTD
    • NISHIKIORI YOSHIHISAIDE AKIFUMI
    • H04N19/00H03L7/06H04N11/04
    • PURPOSE:To reduce the round-off error due to operation and to generate a phase synchronizing signal with simple constitution by using a conversion table ROM so as to obtain a phase difference theta between a burst signal and a sampling clock from an arithmetic means value of plural sample values of the same phase of the burst signal. CONSTITUTION:A composite video signal inputted from a terminal 1 is sampled by a sampling clock in synchronism with a burst signal generated by a VCO 10 from an A/D converter 2 and inputted to a mean circuit 4 via a BPF 3. The circuit 4 is operated by using a pulse from a timing pulse generation circuit 12, and sample values of the burst signals having a specific phase and means value of different phase and adjacent sample points are obtained. A ROM 5 outputs the mean value of two phases of the burst signal operated by the circuit 4 while converting it into a phase difference theta between the burst signal and the sampling clock, a phase theta' inputted from a terminal 7 by an adder 6 is added to match the phase difference theta to a prescribed phase difference. A VCO 10 changes the oscillation frequency proportional to the phase difference thetato generate the clock in synchronism with the burst signal.