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11. 发明专利

JPH0629450A LEAD FRAME FOR HIGH-FREQUENCY APPLICATION 失效
公开(公告)号：JPH0629450A
公开(公告)日：1994-02-04
申请号：JP18495692
申请日：1992-07-13
申请人： HITACHI LTD
发明人： MORIGUCHI AKISADA , YUMOTO OSAMU , KANETANI TATSUNORI , TAJIRI KAZUYUKI
IPC分类号： H01L23/50
摘要： PURPOSE:To provide a low-cost lead frame by reducing the amount of noble metal used for decreasing impedance without degrading its electrical characteristics. CONSTITUTION:A lead frame 1 composed of 42 alloy has a coating 2 of a noble metal of low resistivity. The metal coating is thicker on the input end 3a than on the output end 3b.

12. 发明专利

JPH06232145A SEMICONDUCTOR MANUFACTURING DEVICE 失效
公开(公告)号：JPH06232145A
公开(公告)日：1994-08-19
申请号：JP1522493
申请日：1993-02-02
申请人： HITACHI LTD
发明人： KANETANI TATSUNORI , YUMOTO OSAMU , MORIGUCHI AKISADA , TAJIRI KAZUYUKI
IPC分类号： H01L29/73 , H01L21/331 , H01L29/732
摘要： PURPOSE:To reduce the reactive base current running in the longitudinal direction thereby realizing a high HFE lateral PNP transistor by a method wherein the PN junction between emitter and base is to be structured limiting to the initial emitter periphery only. CONSTITUTION:P-type impurities e.g. boron are implanted in a diffused emitter polysilicon 8 using implanting technology. The boron implated in the polysilicon 8 is diffused in an N-type base region 3 by heat-treating step to form a P-type emitter region 7. Next, the diffused emitter polysilicon 8 is removed using the etching technology. Later, silicon is etched away using selective dry-etching technology using emitter/base separating polysilicon oxide films 9 as masks to form a trench 13 in the emitter region 7. Next, the trench 13 is filled with a dielectric e.g. SiO2 or Si3N4. For example, an SiO2 film 15 is formed using CVD technology. Through these procedures, the reactive base current running in the longitudinal direction not contributing to the transistor actuatuin can be reduced.

13. 发明专利

JPH0594996A SEMICONDUCTOR MANUFACTURE DEVICE 失效
公开(公告)号：JPH0594996A
公开(公告)日：1993-04-16
申请号：JP25346391
申请日：1991-10-01
申请人： HITACHI LTD
发明人： KANETANI TATSUNORI , YUMOTO OSAMU , MORIGUCHI AKISADA , KABAYAMA KOJI , TAJIRI KAZUYUKI
IPC分类号： H01L29/73 , H01L21/331 , H01L29/732
摘要： PURPOSE:To enable a lateral PNP transistor to be lessened in recombination current and conductivity modulation effect and enhanced in hFE by a method wherein only an N-buried layer just under an emitter is removed in the lateral PNP transistor. CONSTITUTION:A lateral PNP transistor is provided with a region 2 where an N-buried layer 1 located just under its emitter is removed. The invalid region 4 (base + side face not in contact with active base region) of an emitter region 3 is surrounded with a high concentration (as high as the active base 5) n-type barrier layer 6. By this setup, a recombination current by holes supplied from a vertical parasitic PNP transistor and electrons of the N-bureid layer can be lessened, so that a lateral PNP transistor of high hFE can be realized. The PNP transistor concerned can be restrained from increasing in conductivity modulation effect.

14. 发明专利

JPH04130779A SEMICONDUCTOR MANUFACTURING DEVICE 失效
公开(公告)号：JPH04130779A
公开(公告)日：1992-05-01
申请号：JP25017990
申请日：1990-09-21
申请人： HITACHI LTD
发明人： KANETANI TATSUNORI , YUMOTO OSAMU , MORIGUCHI AKISADA , KABAYAMA KOJI
IPC分类号： H01L29/80
摘要： PURPOSE:To lessen the effect of a scattering of an impurity and to obtain a device having high-mobility carriers by a method wherein high-impurity semiconductor crystal thin films are jointed to each other in such a way that they are surrounded with metal films, which are different from each other in Fermi level and work function, and moreover, a metal film for making a voltage apply is jointed to the thin films in the direction perpendicular to this junction between the thin films. CONSTITUTION:High-purity semiconductor crystal thin films (such as Si thin films) 2 are made to joint to each other in such a way that they are surrounded with metal films (such as Al films) to form an active part, an electrode (a gate electrode) 5 for current control use is provided on the active part and moreover, electrodes (drain and source electrodes) 4 and 6 for bias use are respectively provided at both ends of a device via an insulating film (such as an SiO2 film) 3 and the device is constituted. An N-type impurity 8 is doped to the semiconductor parts 2 under the electrode structures at both ends of the device for reducing a contact resistance. When a bias voltage VDS is applied to the electrodes 4 and 6, a current ID is generated. Conduction electrons to contribute to this generation are electrons, which are stored in quantum wells to be formed by the junctions between the metal films and the semiconductor crystal thin films and are fed from the wells. This feed rate of the electrons, that is, the current ID is controlled by a control voltage (a gate voltage) which is applied to the electrodes 5 and 6.

15. 发明专利

JPH06113453A SIGNAL INPUT CIRCUIT 失效
公开(公告)号：JPH06113453A
公开(公告)日：1994-04-22
申请号：JP25778092
申请日：1992-09-28
申请人： HITACHI LTD
发明人： MORIGUCHI AKISADA , YUMOTO OSAMU , KANETANI TATSUNORI , TAJIRI KAZUYUKI
IPC分类号： H01L27/04 , H01L21/822 , H02J1/00
摘要： PURPOSE:To increase noise margin to deal with noise from VEE by connecting one end of the built-in junction capacitance of IC with the built-in constant- voltage power supply to increase the junction capacitance, thereby increasing the capacitance per unit area. CONSTITUTION:One end which is not the signal input terminal of the built-in junction capacitance of IC is connected with the built-in constant-voltage power supply. Since a bias applied to the junction capacitance can be reduced, the junction capacitance can be increased, and consequently the influence of noise from VEE can be reduced by passing noise through the constant-voltage power supply to improve noise margin.

16. 发明专利

JPH03250812A FLIP-FLOP CIRCUIT 失效
公开(公告)号：JPH03250812A
公开(公告)日：1991-11-08
申请号：JP4546190
申请日：1990-02-28
申请人： HITACHI LTD , HITACHI CABLE
发明人： IRIE HIRONORI , KANETANI TATSUNORI , SEKINE YASUSHI , GOTO MASAHIRO
IPC分类号： H03K3/286 , H03K3/037 , H03K19/173
摘要： PURPOSE:To improve the transmission characteristic of a laser diode (LD) drive integrated circuit and to enhance the transmission rate of the optical communication system while decreasing an external terminal number by selectively switching the function as an edge trigger flip-flop circuit or a simple gate circuit. CONSTITUTION:A flip-flop circuit FF acts like a waveform shaping flip-flop circuit by bringing a function selection signal FC to a low level, the flip-flop circuit FF acts like a gate circuit sending singly an input signal by bringing the function selection signal FC to a high level. Thus, the flip-flop circuit FF is realized, whose function is selected as the edge trigger flip-flop circuit or a single gate circuit. Thus, the effect of a parasitic capacitance or the like coupled with an external terminal is eliminated, the transmission characteristic of an LD drive integrated circuit is improved and the transmission rate of the optical communication system including the said LD drive integrated circuit is enhanced.

17. 发明专利

JPH02184050A PACKAGE AND INTEGRATED CIRCUIT DEVICE USING SAME PACKAGE AND MANUFACTURE OF SAME INTEGRATED CIRCUIT DEVICE 失效
公开(公告)号：JPH02184050A
公开(公告)日：1990-07-18
申请号：JP436989
申请日：1989-01-11
申请人： HITACHI LTD
发明人： KANETANI TATSUNORI
IPC分类号： H01L23/04 , H01L23/02 , H01L27/01
摘要： PURPOSE:To improve the operation characteristics of an integrated circuit element which is sealed in the inside by providing a transparent window part for laser which is used for trimming action in the integrated circuit element. CONSTITUTION:A cap 2a is sealed on a base 2a. A window 4 is formed of a material which is transparent for laser L used for trimming. The window 4 is coupled to the central part of the cap 2b which faces a pellet 1a in the inside in an airtight mode. The resistance value and the like at the specified circuit part of the integrated circuit element 1a in the inside of a package 2 are observed with an inspecting apparatus and the like which are provided at the outside through external connecting terminals 2c. The laser L is converged through a trimming lens optical system A comprising a specified lens group. The laser light L is projected on the resistor element constituting the intended circuit part of the integrated circuit element 1a sealed in the package 2 through the window 4 provided in the package 2. A part of said resistor element is shaped with the energy of the laser L. Thus, trimming for finely adjusting the resistance value of said resistor element is performed.

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