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1. 发明专利

JP2011103502A Orthogonal polarization signal receiving apparatus and cross polarization interference cancellation control method 审中-公开
标题翻译：正交极化信号接收装置和交叉极化干扰消除控制方法
公开(公告)号：JP2011103502A
公开(公告)日：2011-05-26
申请号：JP2009256701
申请日：2009-11-10
申请人： Fujitsu Ltd , 富士通株式会社
发明人： TAMURA TOSHIO , AIZAWA SHIGEMI , TAKAGI HIROYUKI , OIDE KENICHI
IPC分类号： H04J11/00
摘要： PROBLEM TO BE SOLVED: To effectively perform polarization interference cancellation even when detecting the failure of reception signals, relating to an orthogonal polarization signal receiving apparatus and a cross polarization interference cancellation control method.
SOLUTION: A V polarization receiving apparatus 100 and an H polarization receiving apparatus 200 output signals received by its own receiving apparatus as signals for interference cancellation to a different polarization receiving apparatus which receives the signals of the polarizations different from the signals received by its own receiving apparatus, and use the signals for the interference cancellation input from the different polarization receiving apparatus to cancel the polarization interference of the signals received by its own receiving apparatus. The V polarization receiving apparatus 100 and the H polarization receiving apparatus 200 respectively include determination parts 111 for determining the validity of the output stop of the signals for the interference cancellation when the failure of the reception signals of its own receiving apparatus is detected, and respectively include squelch parts 102 for releasing the output stop to the different polarization receiving apparatus of the signals for the interference cancellation when determined by the determination part 111 that the output stop of the signals for the interference cancellation is not valid. When the reception signals are suitable for use as the ones for polarization interference cancellation in the different polarization receiving apparatus, the V polarization receiving apparatus 100 and the H polarization receiving apparatus 200 send out the reception signals to the different polarization receiving apparatus as the signals for the interference cancellation.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：即使当检测到与正交偏振信号接收装置和交叉极化干扰消除控制方法有关的接收信号的故障时，也有效地执行极化干扰消除。解决方案：AV极化接收装置100和H极化接收装置200将由其自己的接收装置接收的信号作为用于干扰消除的信号输出到不同的极化接收装置，该极化接收装置接收与由其接收的信号不同的极化信号并且使用来自不同极化接收装置的干扰消除输入的信号来消除由其自己的接收装置接收的信号的极化干扰。 V极化接收装置100和H极化接收装置200分别包括：当检测到自身的接收装置的接收信号的故障时，确定用于干扰消除的信号的输出停止的有效性的确定部分111 包括静噪部分102，用于当由确定部分111确定干扰消除的信号的输出停止无效时，将用于干扰消除的信号的输出停止信号释放到不同的极化接收装置。当接收信号适合用作不同极化接收装置中用于极化干扰消除的接收信号时，V极化接收装置100和H极化接收装置200将接收信号发送到不同的极化接收装置，作为信号干扰消除。版权所有（C）2011，JPO＆INPIT

2. 发明专利

JPH11266219A POINTER PROCESSING MALFUNCTION PREVENTION METHOD AND RADIO EQUIPMENT COPING WITH SDH 失效
公开(公告)号：JPH11266219A
公开(公告)日：1999-09-28
申请号：JP6815198
申请日：1998-03-18
申请人： FUJITSU LTD
发明人： OIDE KENICHI , ABE SATOSHI
IPC分类号： H04J3/00 , H04J3/06 , H04J3/07 , H04J3/14 , H04J3/16 , H04Q11/04
摘要： PROBLEM TO BE SOLVED: To prevent the malfunction of a pointer processing by a burst error by dispersedly arranging pointers in the object method and the equipment. SOLUTION: In a system for transmitting and receiving an STM(synchronous transfer mode) frame with this radio equipment coping with SDH(synchronous digital hierarchy), for instance, to E1#3, D2#3, H2#3, K1#3, D5#3, D8#3 and D11#3 of an unused byte or bit or an undefined byte inside the section overhead SOH of the STM frame, AU (carriage side management unit) pointers for indicating the leading position of multiplex data within a payload are arranged dispersedly and then transmitted. At this time, a new data flag N, SS bits S, and I, D bits for forming the AU pointers are dispersedly arranged in the unused byte or the undefined byte.

3. 发明专利

JPH05219039A METHOD AND DEVICE FOR AUTOMATIC PHASE ADJUSTMENT 失效
公开(公告)号：JPH05219039A
公开(公告)日：1993-08-27
申请号：JP4203992
申请日：1992-01-31
申请人： FUJITSU LTD
发明人： OIDE KENICHI
IPC分类号： H04J3/06 , H04L7/00
摘要： PURPOSE:To provide the method and device which automatically matches monitor data from a monitor and control equipment in the phase of the clock of a main signal. CONSTITUTION:The automatic phase adjustment device of a communication system which sends the clock of the main signal from a communication device 50 to the monitor and control equipment 51, sends the data from the monitor and control equipment 51 to the communication device 50 in synchronism with the clock, and multiplexes the data with the main signal of the communication device 50 and sends them to an opposite-side communication device is equipped with a phase comparing circuit 52 which compares the phase of the clock outputted from the communication device 50 to the monitor and control equipment 51 with the phase of the data inputted from the monitor and control equipment 51 to the communication device 50 on the communication device side and a phase control circuit 53 which adjusts the phase of the clock supplied from the communication device 50 to the monitor and control equipment 51 according to the phase comparison result of the phase comparing circuit 52 so that the clock matches the data in phase on the communication device side.

4. 发明专利

JPH04291521A LINE FAULT DETECTION CIRCUIT AND LINE CHANGEOVER DEVICE 失效
公开(公告)号：JPH04291521A
公开(公告)日：1992-10-15
申请号：JP5651191
申请日：1991-03-20
申请人： FUJITSU LTD
发明人： OIDE KENICHI
IPC分类号： H04B1/74 , H04B17/00 , H04L1/22
摘要： PURPOSE:To allow the device to cope with even high speed fading quickly and with even frequent occurrence thereof with respect to the line fault detection circuit detecting a line fault due to fading or the like in a radio communication line and the line changeover device detecting the line fault to switch the line through the use of its detection signal. CONSTITUTION:A 1st fault detection means 10 outputs a 1st fault detection signal with a prescribed width by using a detection pulse as a trigger and an OR means 14 ORs the 1st fault signal and a 2nd fault detection signal outputted from a 2nd fault detection means 12 detecting a fault according to a conventional system and outputs a line fault detection signal. The line is selected by means of the nonhoming homing switching based on the line fault signals from both the lines 20,22.

5. 发明专利

JPH04220828A FAULT CLOCK LOCATING METHOD 失效
公开(公告)号：JPH04220828A
公开(公告)日：1992-08-11
申请号：JP40470390
申请日：1990-12-21
申请人： FUJITSU LTD
发明人： OIDE KENICHI
IPC分类号： H04B17/40 , H04J3/14
摘要： PURPOSE:To easily locate a fault block in a short time in the case of multi-relay in a digital multiplex radio system. CONSTITUTION:This method is provided with an intermediate repeater station and a monitoring section where after a frame detection signal is not detected from a digital signal received by a frame synchronizing signal detection circuit 2, and it sends a synchronizing step-out signal, a digital signal generating means 4 generates a digital signal including the frame synchronizing signal and sends it to a subordinate station. The intermediate repeater station is provided with a masking means 5, which sends the synchronizing step-out signal after lapse of a prescribed time as an alarming signal when the inputted out of synchronous signal is consecutive for a prescribed time or more and the monitoring section uses the inputted alarming signal to locate a fault block.

6. 发明专利

JPH08167867A RADIO RECEIVER AND METHOD FOR CONSTROLLING SWITCHING OF RECEIVING SYSTEM IN THE RADIO RECEIVING 失效
公开(公告)号：JPH08167867A
公开(公告)日：1996-06-25
申请号：JP31222494
申请日：1994-12-15
申请人： FUJITSU LTD
发明人： TAKI YOSHIHIKO , OIDE KENICHI
IPC分类号： H04B1/16 , H04B1/74
摘要： PURPOSE: To reduce a hit rate of a line by monitoring alarm predicting information as the internal information of an equalizer, predicting the abnormality of a receiving circuit before the hit rate of a line and previously switching the line. CONSTITUTION: This radio receiver is constituted of an active receiving system 1 and a stand-by receiving system 2 respectively provided with equalizers 3, 4 and a change-over switch 5 for switching both the systems 1, 2. The radio receiver is also provided with an alarm predicting information detecting means 6 for detecting alarm predicting information in respective equalizers 3, 4 and a switching control means 7 for controlling the switching state of the switch 5 based upon the alarm predicting information detected by the means 6.

7. 发明专利

JPH08102765A DECODER FOR MULTILEVEL ENCODED SIGNAL USING VITERBI DECODING SYSTEM 失效
公开(公告)号：JPH08102765A
公开(公告)日：1996-04-16
申请号：JP23719494
申请日：1994-09-30
申请人： FUJITSU LTD
发明人： TAKAHASHI KOJI , NAKAMURA TADASHI , OIDE KENICHI
IPC分类号： H04L27/00 , H03M13/23 , H03M13/41 , H04L25/08 , H04L27/38 , H03M13/12
摘要： PURPOSE: To perform acceleration and to reduce a basic cell number by achieving the functions of subtraction and multiplication by using logic for the arithmetic operation of an Euclidean distance to be obtained at the time of viterbi decoding. CONSTITUTION: For I and Q signals inputted through an FFI, the viterbi decoding and parity check calculation are performed in a branch metric calculation part C1BMC 1 for C1, a C1 decoder 2, an encoder 3, a BMC 4 for C2, a C2 decoder and a decision circuit 7 system and decoded signals and C1 re-coding are obtained. In the meantime, the I and Q signals are passed through delay circuits 11 and 12, the result of demapping them in a demapping part 6 is inputted to a correction bit number counting part 8 and compared with the result of the decision circuit and an error corrected bit number is calculated. In the CIBMC 4, a plane is divided into plural areas and the Euclidean distance of a level 1 is obtained based on respective distance calculation tables for the respective areas. For the calculation, one of the three kinds of calculation formulas is selected and the logic is obtained only by the calculation formula selection signals of two bits and the error signals of three bits without performing actual calculation.

8. 发明专利

JPH02186726A LINE SWITCHING SUPERVISORY DEVICE 失效
公开(公告)号：JPH02186726A
公开(公告)日：1990-07-23
申请号：JP700789
申请日：1989-01-12
申请人： FUJITSU LTD
发明人： OIDE KENICHI
IPC分类号： H04B1/74 , H04B3/46 , H04L29/14
摘要： PURPOSE:To immediately recognize a fault when the fault of an active line occurs without necessitating a special external measuring instrument and to improve the reliability of a system by installing switching contact points in a transmission terminal switch and a reception terminal switch. CONSTITUTION:The switching contact point 11 is provided on the transmission terminal switch 10, and the switching contact point 21 on the reception terminal switch 20. The contact point 11 normally connects a pilot signal P from a pilot signal generator 100 for supervising a standby line 0 to the transmission terminal of the active line 1 by the control signal C of fault detection. The contact point 21 normally switches the signal detector 200 of the pilot signal P on the reception side to supervise the line 0, to the reception terminal of the line 1 by the signal C, and the detector 200 goes to the detector of a line 1 supervisory signal. Consequently, the reliability of the multiplex radio system can be improved since the fault can immediately be recognized when the fault of the line 1 occurs by using the outputs of the generator 100 of the signal P which normally supervises the line 0 and the detector 200 and by the contact point 11 of the switch 10 and the contact point 21 of the switch 20 without necessitating the special external measuring instrument.

9. 发明专利

JPS61105933A Service channel signal extracting system 失效
标题翻译：服务通道信号提取系统
公开(公告)号：JPS61105933A
公开(公告)日：1986-05-24
申请号：JP22820184
申请日：1984-10-30
申请人： Fujitsu Ltd
发明人： OIDE KENICHI
IPC分类号： H04B3/06
摘要： PURPOSE: To extract stably an SC signal and to attain demodulation by incorporating a loop to a service channel (SC) signal into one and increasing the loop gain of a PLL.
CONSTITUTION: The orthogonal center tap of the Ich and Qch of a transversal filer is, e.g., eliminated to incorporate the loop to the SC signal into one and the SC signal is extracted from the PLL loop. Further, the PLL loop gain is increased to compensate the function by the loop of the orthogonal tap so as to avoid hindrance to the demodulation. In addition to the elimination above, the loop gain including, e.g., the orthogonal center tap is decreased or the frequency characteristic of the loop is set so as not to be overlapped with the frequency band of the SC signal.
COPYRIGHT: (C)1986,JPO&Japio
摘要翻译：目的：稳定地提取SC信号并通过将服务信道（SC）信号环路合并成一个并增加PLL的环路增益来获得解调。构成：横向滤波器的Ich和Qch的正交中心抽头例如被消除，以将环路与SC信号合并为一个，并且从PLL环路提取SC信号。此外，增加PLL环路增益以通过正交抽头的环路来补偿功能，以避免妨碍解调。除了上述消除之外，包括例如正交中心抽头的环路增益被减小或者环路的频率特性被设置为不与SC信号的频带重叠。

10. 发明专利

JPH01314447A HITLESS SWITCH CONTROL CIRCUIT 失效
公开(公告)号：JPH01314447A
公开(公告)日：1989-12-19
申请号：JP14602088
申请日：1988-06-14
申请人： FUJITSU LTD
发明人： OIDE KENICHI
IPC分类号： H04L1/22
摘要： PURPOSE:To realize the hitless switch of high reliability by executing phase matching in each constant period with a pulse signal from an oscillator, monitoring both reproducing clocks at such a time, detecting phase synchronization, inputting a switching instruction and switching both line data. CONSTITUTION:A pulse from an oscillator 4 is always given to a phase matching part 1 in each period (t) and control is executed so that the reproducing clock phases of both lines can be matched. Simultaneously, the both reproducing clocks are outputted to a phase difference monitor circuit 2. Since phase difference between the both reproducing clocks can be monitored by this monitor circuit 2, when the both reproducing clocks are synchronized, an operator immediately inputs the switching instruction ('L' 'H'). Thus, the switching of the line can be executed in a synchronized condition.

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