专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明专利

JPH0825082A TACK FIXABLE FLUX 失效
公开(公告)号：JPH0825082A
公开(公告)日：1996-01-30
申请号：JP18071294
申请日：1994-07-07
申请人： HARIMA CHEMICALS INC , FURUKAWA ELECTRIC CO LTD
发明人： KUMAMOTO SATOSHI , KATAYAMA NORIKO , AMANO TOSHIAKI , HIKASA KAZUTO
IPC分类号： B23K35/363 , H05K3/34
摘要： PURPOSE:To provide a tack fixable flux which has a low solid content concn. and high viscosity, has excellent tack fixability, decreases residues after reflow, makes circuits highly reliable in spite of absence of washing and features excellent cleanability to solder surfaces as a dicarboxylic acid is used as an activator. CONSTITUTION:This tack fixable flux is used for tack fixing electronic parts to a printed circuit board coated with solder and soldering these parts by the reflow. The flux contains 5 to 30wt.% ethyl cellulose, 1 to 10wt.% dicarboxylic acid as the activator and a sepn. preventive agent which are dissolved in an org. solvent.

2. 发明专利

JPH0722749A PRINTED CIRCUIT BOARD USING SOLDER LAYER AS PRE-COATING AND SOLDER PRECOATED PRINTED CIRCUIT BOARD 失效
公开(公告)号：JPH0722749A
公开(公告)日：1995-01-24
申请号：JP30940393
申请日：1993-12-09
申请人： FURUKAWA ELECTRIC CO LTD , HARIMA CHEMICALS INC
发明人： AMANO TOSHIAKI , HIKASA KAZUTO , KUMAMOTO SATOSHI , FUJIWARA TAKAHIRO
IPC分类号： B23K1/00 , H05K1/02 , H05K3/34
摘要： PURPOSE:To provide a printed circuit board using a soldering layer as pre- coating and a solder precoated circuit board where the solder layer which is pre-coated at the conductor part where a component lead is placed is uniformly thick which can make nearly uniform the thickness of the solder layer which is pre-coated at the conductor part where the component lead is placed. CONSTITUTION:A number of pads 2 for soldering a component lead are formed on an insulation printed circuit board 1 to configure a pad train 5. Then, a solder layer 3 is pre-coated on the pads 2. Each of the pads 2 is provided with a part 2A where the parts lead is placed and a component lead non-placement part 2B. Then, a wide part 2C which is wider than the width of the part 2A where the component lead is placed is formed at the component lead non- placement part 2B.

3. 发明专利

JPH06177521A PRINTED CIRCUIT SUBSTRATE 失效
公开(公告)号：JPH06177521A
公开(公告)日：1994-06-24
申请号：JP35001792
申请日：1992-12-03
申请人： FURUKAWA ELECTRIC CO LTD , HARIMA CHEMICALS INC
发明人： AMANO TOSHIAKI , KUMAMOTO SATOSHI , FUJIWARA TAKAHIRO
IPC分类号： H05K3/34 , H05K1/11
摘要： PURPOSE:To prevent the positional deviation of a part lead by a method wherein a protruding part directing toward outside is formed on the pad located on the outer end of the pad row where a number of pads are arranged at the prescribed pitch, and solder is heaped up on the protruding part. CONSTITUTION:Four pad rows 5 for a QFP type part and two pad rows 6 for a SOP type part are formed on a printed circuit substrate 1. A plurality of pads 2 are arranged on the pad rows 5 and 6 at the prescribed pitch. The characteristics of the printed circuit substrate 1 are the formation of outward protruding parts 7 formed on the pads 2a located on the outer edge of the pad rows 5 and 6. By the formation of the protruding parts 7, a heaped-up solder can be formed on the protruding parts 7 of the pad 3a located on the edge when a solder layer 3 is formed on each pad 2 by a solder precoating method. The lead 4a on the outer edge is prevented from positional deviation by the heaped-up 8 of solder, and the mounted state of parts can be stabilized.

4. 发明专利

JPH098044A SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JPH098044A
公开(公告)日：1997-01-10
申请号：JP15197495
申请日：1995-06-19
申请人： FURUKAWA ELECTRIC CO LTD , HARIMA CHEMICALS INC
发明人： HIKASA KAZUTO , AMANO TOSHIAKI , IRIE HISAO , TANAKA HIROSHI
IPC分类号： H01L21/60 , H01L21/321
摘要： PURPOSE: To form a bump with a solder rising part which is thick enough for soldering a semiconductor element to a board by extending a strip-like electrode auxiliary part in an electrode body and forming a solder bump wherein a solder layer is thicker than an electrode auxiliary part in the body. CONSTITUTION: In a semiconductor element wherein a bump 4 is formed on an electrode 1, a strip-like electrode auxiliary part 3 is extended in an electrode body 2 and a solder bump 4 wherein a solder layer is thicker than the electrode auxiliary part 3 is formed on an electrode body 2. For example, to a square electrode body 2 whose one side is about 100 to 300μm, a long side of a strip shape of the electrode auxiliary part 3 is set for 100 to 1000μm and a short side thereof is set so that difference to one side of the electrode body 2 is at least 30μm. A position to the electrode body 2 of the electrode auxiliary part 3 is on a side far from a vertical angle of the electrode body 2.

5. 发明专利

JPH06216514A PRINTED CIRCUIT BOARD 失效
公开(公告)号：JPH06216514A
公开(公告)日：1994-08-05
申请号：JP2164593
申请日：1993-01-18
申请人： FURUKAWA ELECTRIC CO LTD , HARIMA CHEMICALS INC
发明人： AMANO TOSHIAKI , HIKASA KAZUTO , KUMAMOTO SATOSHI , FUJIWARA TAKAHIRO
IPC分类号： H05K3/34 , H05K1/11
摘要： PURPOSE:To prevent the positional drift of leads due to slippage from solder layers by applying a solder precoat to the sections where the leads of the part are not to be put, except to longitudinal sections of pads where the leads of a part are to be put. CONSTITUTION:A printed circuit board 1 is one made by precoating pads 2 with solder 3. On this occasion, longitudinal sections A of pads 2 on which the leads 4 of a part are to be put are not precoated with solder, and the sections B on which the leads 4 of the part are not to be put are precoated with solder 3. To precoat the pads 2 with solder 3 partially, a solder precipitating formation is applied masking the sections A. After the solder is precipitated in the sections B by heating, the mask is removed. Flux is applied on the pads 2 precoated with the solder 3, and the leads 4 of the part are put. After that, they are heated with a reflow furnace, and the solder 3 is melted. Consequently, the solder 3 flows out to the sections A where the leads of the part are put, and solder fillets 3a are formed. And it becomes possible to solder the leads 4 and the pads 2.

6. 发明专利

JPH1022339A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH1022339A
公开(公告)日：1998-01-23
申请号：JP17486196
申请日：1996-07-04
申请人： FURUKAWA ELECTRIC CO LTD
发明人： AMANO TOSHIAKI , INADA TAKASHI , KAGA YASUHISA
IPC分类号： H01L21/60 , H01L23/12 , H01L23/28 , H05K3/34
摘要： PROBLEM TO BE SOLVED: To facilitate handling in production process by forming a conductor layer on a resin layer having bumps for external connection electrodes and connecting them to exposed connecting members on the resin layer. SOLUTION: Electrode pads 12 to be electrodes are formed on the lower face of a semiconductor chip 11 and bumps 13 to be connecting members are formed on the pads 12. A resin layer 14 is formed on the chip lower face with leaving the bumps 13 partly exposed. The resin layer 14 has bumps 14a and conductor layer 15 on the resin layer 14 including the bumps 14a to electrically connect the conductor layer 15 to the exposed bumps 13 on the resin layer 14. A solder resist layer 16 is partly formed esp. on other areas on the layer 15 than the bumps 14a. This facilitates handing in the condition of semiconductor wafers.

7. 发明专利

JPH0992679A BONDING SHEET AND BONDING METHOD USING IT 失效
公开(公告)号：JPH0992679A
公开(公告)日：1997-04-04
申请号：JP24726995
申请日：1995-09-26
申请人： FURUKAWA ELECTRIC CO LTD
发明人： AMANO TOSHIAKI
IPC分类号： H01L21/60 , H05K3/32
摘要： PROBLEM TO BE SOLVED: To form two ends composed of thermoplastic conductive adhesive inserted into through holes in positions corresponding to the pattern of electrodes in such a manner that they are protruded from the surfaces of two conductive layers in order to cope with high density mount, and make it possible to rework the mounted devices. SOLUTION: Openings 15 are formed by photolithography. Next, an adhesive layer 12 and a polyimide film 13 in the area in the opening 15 are removed by irradiating them with excimer laser to form through holes 16. Next, the through holes 16 are filled with thermoplastic conductive adhesive which contains silver filler, and the surface of the copper foil 11 is polished to smooth the surface, and terminals 17 are formed in the through holes 16. Thereafter, the terminals 17 are projected only by the thickness of the copper foil by etching off the copper foil 11. As a result, bonding can be done without forming solder bumps.

8. 发明专利

JPH0750507A MULTI-LAYERED CIRCUIT BOARD TYPE ANTENNA MODULE AND ITS MANUFACTURE 失效
公开(公告)号：JPH0750507A
公开(公告)日：1995-02-21
申请号：JP21348393
申请日：1993-08-06
申请人： FURUKAWA ELECTRIC CO LTD , FUJITSU LTD
发明人： AOKI KAZUYOSHI , KAMEI KOICHI , AMANO TOSHIAKI , INAGAKI MITSUO , AZUMAGUCHI YUTAKA , MAEDA TAKEYASU
IPC分类号： H01Q1/38 , H01Q9/28
摘要： PURPOSE:To manufacture many antenna modules at once by adopting a multi- layered circuit board for a structure of the antenna modules so as to cut off the antenna modules of the layered board. CONSTITUTION:A 1st layer metallic foil 11, a 2nd layer metallic foil 12, and a 3rd layer metallic foil 13 are conductive by a conductor 15 penetrated through a 1st layer insulation layer 21 and a 2nd layer insulation layer 22 almost at the entire width of one-side ends. Furthermore, the 2nd layer metallic foil 12 and the 3rd layer metallic foil 13 are conductive by a conductor 16 penetrated through a 2nd layer insulation layer 22 almost at the entire width of other-side ends. Moreover, the 1st layer metallic foil 11 and a 4th layer metallic foil 14 are conductive by a conductor 17 penetrated through the 1st layer insulation layer 21, the 2nd layer insulation layer 22 and a 3rd layer insulation layer 23 almost at the entire width of other-side ends. and the 1st layer metallic foil 11 and an is land part 4a of the 4th layer metallic foil 14 is conductive similarly by a conductor 18. Many antenna modules or semifinished products are manufactured by manufacturing a multiple product board for the antenna modules or the semifinished products formed in this way.

9. 发明专利

JPH0750506A MANUFACTURE OF ANTENNA MODULE AND MANUFACTURING DIE 失效
公开(公告)号：JPH0750506A
公开(公告)日：1995-02-21
申请号：JP21348293
申请日：1993-08-06
申请人： FURUKAWA ELECTRIC CO LTD , FUJITSU LTD
发明人： AOKI KAZUYOSHI , KAMEI KOICHI , AMANO TOSHIAKI , INAGAKI MITSUO , AZUMAGUCHI YUTAKA , MAEDA TAKEYASU
IPC分类号： H01Q1/24 , H01Q1/38 , H01Q9/40
摘要： PURPOSE:To manufacture stably an antenna module with high precision of dimension by preventing infiltration of a resin at a tip of an antenna element member and a ground member. CONSTITUTION:An antenna element member 8 and a ground member 9 made of a composite member consisting of metallic foil and a plastic film are set to an inside of a female die 6, and a male die 7 is combined to them, and when the antenna module is manufactured by filling a resin in the dies, extension sections 12a, 15a of the plastic film extended from the tip of the metallic foil are provided to a tip of the antenna element member 8 and the ground member 9 and a molten resin is filled while the extension is set so as to be folded along a depth face 6a of the female side die 6.

10. 发明专利

JPH0627333A METHOD FOR PACKAGING OPTICAL FIBER ONTO SUBSTRATE 失效
公开(公告)号：JPH0627333A
公开(公告)日：1994-02-04
申请号：JP20304492
申请日：1992-07-07
申请人： FURUKAWA ELECTRIC CO LTD
发明人： YAMAMOTO ICHIRO , AMANO TOSHIAKI , NISHIBASHI ATSUSHI
IPC分类号： G02B6/00
摘要： PURPOSE:To package an optical fiber onto a substrate with the same assembly procedures as to assembling electric circuits with high reliability by fixing the optical fiber into the disposing groove formed on the substrate. CONSTITUTION:Only the optical fiber disposing part on the semiconductor substrate 1 consisting of Si is exposed and the V-groove 2 is formed by dry etching the exposed part. In succession, only the electric circuit parts, i.e., the shoulder parts of the V-groove are exposed and Al patterns 3 are formed by vapor deposition with an electron beam on the exposed parts. Ti layers 4 as barrier layers for preventing solder galling are formed thereon by the vapor deposition with the electron beam. Further, Pb and Sn are alternately formed in laminar layers thereon by the vapor deposition with the electron beam and thereafter, the substrate is heated to a prescribed temp. to form solder bumps 5. The optical fiber 7 formed with an coating layer 6 by electroless plating is then disposed in the V-groove 2 and a bonding tool 8 is pressed thereto from above and is heated, by which the optical fiber 7 is soldered an packaged onto the substrate 1.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式