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1. 发明公开

EP0314211A1 Display device including lateral schottky diodes 失效
标题翻译： Wiedergabeanordnung mit lateralen肖特基二碘。
公开(公告)号：EP0314211A1
公开(公告)日：1989-05-03
申请号：EP88202200.7
申请日：1988-10-04
申请人： Philips Electronics N.V.
发明人： Martens, Jan Willem Dirk , Kuijk, Karel Elbert
IPC分类号： G02F1/133 , H01L29/48
CPC分类号： H01L29/872 , G02F1/1365
摘要： In a display device (1) including active switching units (9) lateral Schottky diodes (12) are used as switching elements. In the lateral Schottky diodes a sub-micron distance between the Schottky electrode and the other electrode contacting the semiconductor body is obtained by anodising the Schottky metal and by subsequently doping the still bare semiconductor body, for example, by means of an ion implantation.
摘要翻译：在包括有源开关单元（9）的显示装置（1）中，使用横向肖特基二极管（12）作为开关元件。在横向肖特基二极管中，通过阳极氧化肖特基金属并通过例如借助于离子注入来掺杂静止的半导体本体来获得肖特基电极和与半导体本体接触的另一电极之间的亚微米距离。

2. 发明授权

EP0034166B1 SEMICONDUCTOR EMBEDDED LAYER TECHNOLOGY 失效
标题翻译：半导体嵌入层技术
公开(公告)号：EP0034166B1
公开(公告)日：1987-04-29
申请号：EP80901688.4
申请日：1980-08-07
申请人： MASSACHUSETTS INSTITUTE OF TECHNOLOGY
发明人： BOZLER, Carl O. , ALLEY, Gary D. , LINDLEY, William T. , MURPHY, R. Allen
IPC分类号： H01L29/48 , H01L27/02 , H01L29/06 , H01L23/48
CPC分类号： H01L29/66424 , H01L21/02395 , H01L21/02532 , H01L21/02546 , H01L21/02639 , H01L21/743 , H01L23/4824 , H01L23/52 , H01L23/535 , H01L28/40 , H01L29/7722 , H01L2924/0002 , H01L2924/3011 , Y10S148/164 , H01L2924/00
摘要： A permeable base transistor (30) including a metal base layer (34) embedded in a semiconductor crystal (32) to separate collector (38) and emitter (40) regions and form a Schottky barrier with each. The metal base layer has at least one opening (37) through which the crystal semiconductor (32) joins the collector (38) and emitter (40) regions. Ohmic contacts (42, 44) are made to the emitter (40) and collector (38) regions. The width of all openings (37) in the base layer (34) is of the order of the zero bias depletion width corresponding to the carrier concentration in the opening. The thickness of the metal layer (34) is in the order of 10% if this zero bias depletion width. As a result, a potential barrier in each opening limits current flow over the lower portion of the bias range. With increasing forward base bias the potential in the openings, which is lower than along the metal of the base layer (34), is lowered sufficiently to permit substantial increase in the barrier limited current flow from the collector (38) to emitter (40). A method of fabricating this transistor as well as methods for forming integrated circuit structures are also disclosed. Metal and other layers may be selectively embedded in semiconductor crystal. Embedded metal layers may serve as interconnections between devices. Devices may be in a stacked configuration.

3. 发明授权

EP0075575B1 ELECTRONIC CIRCUIT 失效
标题翻译：电子电路
公开(公告)号：EP0075575B1
公开(公告)日：1985-10-30
申请号：EP82901043.8
申请日：1982-03-29
申请人： TOVE, Per-Arne , BOHLIN, Kjell , STOLT, Lars , NORDE, Herman
发明人： TOVE, Per-Arne , BOHLIN, Kjell , STOLT, Lars , NORDE, Herman
IPC分类号： H01L29/80 , H01L29/48
CPC分类号： H01L29/47 , H01L27/0605 , H01L29/7839 , H01L29/806 , H01L29/812
摘要： Electronic circuit, characterized by containing at least one Schottky field effect transistor with contact elements (H, L) having different Schottky barrier heights.

4. 发明公开

EP0513273A4 DIRECT THERMOCOMPRESSION BONDING FOR THIN ELECTRONIC POWER CHIPS 失效
标题翻译：直接热电偶连接电子电源
公开(公告)号：EP0513273A4
公开(公告)日：1993-04-21
申请号：EP91920068
申请日：1991-10-24
申请人： GENERAL ELECTRIC COMPANY
发明人： NEUGEBAUER, CONSTANTINE, ALOIS , GLASCOCK, HOMER, HOPSON, II , PAIK, KYUNG, WOOK , MCMULLEN, JAMES, GILBERT
IPC分类号： H01L21/60 , H01L21/603 , H01L23/482 , H01L23/48 , B23K31/02 , H01L29/46 , H01L29/48 , H01L29/52 , H01L29/54 , H01L29/64
CPC分类号： H01L24/80 , H01L23/4827 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/1301 , H01L2924/14 , H01L2924/30107 , H01L2924/00
摘要： Annealed copper foil (12) is coated with chromium film (16), followed by coating with an appropriate thickness of gold film (14) and is thermocompression bonded to an aluminum metallized substrate (18) on a silicon chip (30) to provide solderable, high current contacts to the chip. The foil is formed into appropriate electrical network-contact patterns (40) and is bonded to the silicon chip only where aluminum metallization exists on the chip. Leaf (wing) portions (46) of the foil extend beyond the boundaries of the silicon chip for subsequent retroflexing over the foil to provide electrical contact at predesignated locations (49). External contacts to the foil are made by penetrating through a ceramic lid positioned directly above the foil area. Thus, direct thermocompression bonding of a principally copper foil to aluminum semiconductor pads can replace current gold detent/pump connections by securing a copper conductor to a silicon chip through an intermetallic AuAl2 link and an aluminum stratum.

5. 发明公开

EP0031377A4 FLOATING GATE VERTICAL FET. 失效
标题翻译：纵向场效应浮栅晶体管。
公开(公告)号：EP0031377A4
公开(公告)日：1983-04-25
申请号：EP80901523
申请日：1981-01-26
申请人： WESTERN ELECTRIC CO
发明人： CHO ALFRED YI
IPC分类号： H01L29/417 , H01L21/203 , H01L21/285 , H01L21/338 , H01L29/47 , H01L29/80 , H01L29/812 , H01L29/872 , H01L29/48 , H01L29/04 , H01L29/06 , H01L29/161 , H01L29/78
CPC分类号： H01L29/66856 , H01L21/02395 , H01L21/02463 , H01L21/02546 , H01L21/02631 , H01L21/28581 , H01L29/8122
摘要： A planar field effect transistor (FET) includes a plurality of spaced-apart, floating Schottky barrier, epitaxial metal gate electrodes which are embedded within a semiconductor body. A drain electrode and a gate control electrode are formed on one major surface of the body whereas a source electrode, typically grounded, is formed on an opposite major surface of the body. The FET channel extends vertically between the source and drain, and current flow therein is controlled by application of suitable gate voltage. Two modes of operation are possible: (1) the depletion regions of the control gates and the floating gates pinch off the channel so that with zero control gate voltage no current flows from source to drain; then, forward biasing the control gate opens the channel; and (2) the depletion regions of the control gates and the floating gates do not pinch off the channel, but reverse biasing the control gate produces pinch off. Specifically described is a GaAs FET in which the floating gate electrodes are Al epitaxial layers grown by molecular beam epitaxy.

6. 发明公开

EP0036500A1 Method for making stable nitride-defined Schottky barrier diodes 失效
标题翻译： Verfahren zur Herstellung stableer，eine Nitridschicht enthaltender Schottkydioden。
公开(公告)号：EP0036500A1
公开(公告)日：1981-09-30
申请号：EP81101368.9
申请日：1981-02-25
申请人： International Business Machines Corporation
发明人： Anantha, Narasipur Gundappa , Bhatia, Harsaran Singh
IPC分类号： H01L21/60 , H01L21/31 , H01L29/48 , H01L29/91
CPC分类号： H01L29/66143 , H01L21/0337 , H01L29/872
摘要： Excessive leakage after initial forward stress, exhibited by subsequently reverse stressed nitride defined, Schottky barrier diodes is solved by the elimination of the «mouse hole» or undercut cavity in the oxide layer (3) beneath the nitride ring (4) defining the Schottky contact to the underlying silicon. The aforementioned cavity is filled by depositing chemical vapor deposited (CVD) oxide (7) onto the nitride layer (4), into the nitride ring (4) and the undercut oxide cavity beneath the ring (4) and onto the underlying silicon substrate (1) exposed through the nitride ring (4). The CVD oxide (7) is then reactively ion etched to remove it except along the vertical walls of the nitride ring (4) and the oxide cavity. The Schottky metal (9) is deposited on the silicon substrate (1) exposed by the reactive ion etching step.
摘要翻译：初始正应力之后的过度泄漏，通过随后的反向应力氮化物限定的肖特基势垒二极管表现出，通过消除氮化物环（4）下面的限定氧化物层（4）的氧化物层（3）中的“小孔”或底切腔肖特基接触到底层硅。通过将化学气相沉积（CVD）氧化物（7）沉积到氮化物层（4）上，在环（4）下方的氮化物环（4）和底切氧化物空腔中沉积到下面的硅衬底（ 1）通过氮化物环（4）暴露。然后将CVD氧化物（7）反应离子蚀刻除去，除了沿着氮化物环（4）和氧化物空腔的垂直壁。肖特基金属（9）沉积在通过反应离子蚀刻步骤暴露的硅衬底（1）上。

7. 发明公开

EP0013520A1 Procédé perfectionné de fabrication de diodes Schottky et diodes de puissance ainsi réalisées 失效
标题翻译：用于制造肖特基二极管的改进方法，并且根据该方法，功率二极管产生的。
公开(公告)号：EP0013520A1
公开(公告)日：1980-07-23
申请号：EP79401020.7
申请日：1979-12-14
申请人： LIGNES TELEGRAPHIQUES ET TELEPHONIQUES L.T.T.
发明人： Dameme, Guy Société Anonyme LIGNES TELEGRAPHIQUES , Watremez, Jean-Marie S.A. LIGNES TELEGRAPHIQUES
IPC分类号： H01L21/285 , H01L29/48
CPC分类号： H01L29/47 , H01L21/28537
摘要： Procédé de fabrication de barrière siliciure de chrome- silicium pour diode Schottky permettant un ajustement de l'enfoncement (b) de la barrière sous la surface par contrôla de l'épaisseur (c) d'une couche de chrome (14) déposée sur un pavé de silicium (10) portant une couche épitaxiée (11).
Le chrome évaporé sous vide est entièrement combiné au silicium au cours d'un traitement thermique à une température comprise entre 600° C et 700°C.
Ce procédé permet de fabriquer des diodes de puissance de caractéristiques différentes par modification de l'épaisseur de la couche de chrome.
摘要翻译：一种用于生产铬 - 硅硅化物阻挡对于肖特基二极管允许（穿透的调整（B）（14）沉积在硅块10上的表面下方的势垒，通过控制一个铬层的厚度（c）中的过程）承载在外延生长层（11）。在真空下蒸发的铬完全在600℃和700℃。这过程之间的范围内的温度，在热处理的过程中，硅组合允许生产具有不同特性的功率二极管的通过的厚度的修改铬层。

8. 发明公开

EP0579286A2 Method of fabricating a semiconductor device with Schottky barrier 失效
标题翻译：一种用于生产具有肖特基势垒层的半导体器件的过程。
公开(公告)号：EP0579286A2
公开(公告)日：1994-01-19
申请号：EP93115576.6
申请日：1989-10-31
申请人： SANKEN ELECTRIC CO., LTD.
发明人： Ohtsuka,Koji , Goto, Hirokazu
IPC分类号： H01L29/91 , H01L29/40 , H01L29/06 , H01L29/48 , H01L21/329
CPC分类号： H01L29/66143 , H01L29/475 , H01L29/872 , Y10S148/139 , Y10S148/14 , Y10S438/934
摘要： A semiconductor device such as a Schottky-barrier rectifier diode is disclosed which has a barrier electrode formed on a semiconductor substrate of gallium arsenide or the like. Formed around the barrier electrode is an annular resistive layer, typically of titanium oxide, creating a Schottky barrier at its interface with the semiconductor substrate. The resistive layer has a sheet resistance of more than 10 kilohms per square. In order to prevent preliminary breakdowns from taking place at the peripheral part of the resistive layer before final breakdown of the device, the sheet resistance of the resistive layer is made higher as it extends away from the barrier electrode. For the ease of manufacture, the resistive layer can be divided into two or more annular regions of distinctly different sheet resistances.

9. 发明公开

EP0465151A3 Semiconductor device with Shottky junction 失效
标题翻译：具有SHOTTKY JUNCTION的半导体器件
公开(公告)号：EP0465151A3
公开(公告)日：1993-05-12
申请号：EP91305868.1
申请日：1991-06-28
申请人： CANON KABUSHIKI KAISHA
发明人： Nakamura, Yoshio , Kikuchi, Shin , Nishimura, Shigeru
IPC分类号： H01L29/91 , H01L29/73 , H01L29/784 , H01L29/56 , H01L29/48 , H01L21/285 , H01L29/40
CPC分类号： H01L29/66166 , H01L21/28537 , H01L29/47 , H01L29/7308 , H01L29/7839 , H01L29/872
摘要： A semiconductor device having a Shottky junction comprises: a first semiconductor area composed of an n-type semiconductor; a second semiconductor area composed of an n-type semiconductor of a higher resistance than in said first semiconductor area; an insulation film provided adjacent to said second semiconductor area and having an aperture therein; an electrode area provided in said aperture; and a third semiconductor area composed of a p-type semiconductor provided at the junction between said insulation film and said electrode area. The electrode area is composed of a monocrystalline metal and constitutes a Shottky junction with said second semiconductor area.

10. 发明授权

EP0057135B1 Low resistance Schottky diode on polysilicon/metal-silicide 失效
标题翻译：多晶硅/金属硅化物的低电阻肖特基二极管
公开(公告)号：EP0057135B1
公开(公告)日：1985-09-04
申请号：EP82400107.7
申请日：1982-01-21
申请人： FAIRCHILD CAMERA & INSTRUMENT CORPORATION
发明人： Vora, Madhukar B. , Hingarh, Hemraj K.
IPC分类号： H01L27/12 , H01L29/48
CPC分类号： H01L29/66143 , H01L21/70 , H01L21/84 , H01L29/04 , H01L29/872

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