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1. 发明公开

EP4366232A1 SECURE AND FAST BIT UNPACKING FOR DILITHIUM 审中-公开
公开(公告)号：EP4366232A1
公开(公告)日：2024-05-08
申请号：EP22306658.0
申请日：2022-11-03
申请人： CryptoNext SAS
发明人： Faugère, Jean-Charles , Adomnicai, Alexandre
IPC分类号： H04L9/30 , H04L9/32 , H04L9/00
CPC分类号： H04L9/3247 , H04L9/3093 , H04L9/003
摘要： The disclosure relates to a cryptographic device and to a method to improve the security of the cryptographic device while minimizing the deceleration of the cryptographic device due to improving the security of the cryptographic device. The cryptographic device comprises at least one electronic chip to carry out a Dilithium operation involving a vector y of polynomials yi with coefficients yi,j. The method comprises the cryptographic device generating the vector y from a random seed and unpacking the vector y from a bit string. The method further comprises the cryptographic device reusing the random seed to randomly shuffle the unpacking of the vector y, thereby further securing the Dilithium operation while sparing a random number generation.

2. 发明授权

EP4207672B1 DUMMY PARTIAL MULTIPLICATION OF ZERO-OPERANDS AS A LOW-COST MEANS FOR REDUCING THE SUCCESS OF SCA ATTACKS AGAINST ECC 审中-公开
公开(公告)号：EP4207672B1
公开(公告)日：2024-04-17
申请号：EP22168962.3
申请日：2022-04-20
IPC分类号： H04L9/00 , H04L9/30
CPC分类号： H04L9/003 , H04L9/3066

3. 发明公开

EP3396892A1 APPARATUS AND METHOD FOR PERFORMING OPERATION BEING SECURE AGAINST SIDE CHANNEL ATTACK 审中-公开
公开(公告)号：EP3396892A1
公开(公告)日：2018-10-31
申请号：EP18154408.1
申请日：2018-01-31
申请人： Samsung SDS Co., Ltd.
发明人： CHOI, Kyu-Young , MOON, Duk-Jae , YOON, Hyo-Jin , CHO, Ji-Hoon
IPC分类号： H04L9/00 , G06F21/75 , G06F1/03 , G06F7/72 , H04L9/32
CPC分类号： H04L9/0869 , G06F1/03 , G06F7/723 , G06F7/725 , G06F21/755 , G06F2207/7219 , H04L9/003 , H04L9/0618 , H04L9/3247 , H04L9/3252 , H04L63/1441
摘要： An apparatus (100) and method for performing operation being secure against side channel attack are provided. The apparatus and method generate values equal to values obtained through an exponentiation operation or a scalar multiplication operation of a point using values extracted from previously generated parameter candidate value sets and an operation secure against side-channel attack, thereby improving security against side-channel attack without degrading performance.

4. 发明公开

EP3364592A1 METHOD FOR GENERATING A PRIME NUMBER FOR A CRYPTOGRAPHIC APPLICATION 审中-公开
公开(公告)号：EP3364592A1
公开(公告)日：2018-08-22
申请号：EP17305191.3
申请日：2017-02-21
申请人： GEMALTO SA , ISSM SAS
发明人： BERZATI, Alexandre , ROUSSELLET, Mylène
IPC分类号： H04L9/00 , H04L9/30 , G06F7/72
CPC分类号： H04L9/3033 , G06F7/72 , G06F2207/7204 , H04L9/003
摘要： The present invention relates to a method for generating a prime number and using it in a cryptographic application, comprising the steps of:
a) determining at least one binary base B with a small size b = log 2 (B) bits and for each determined base B at least one small prime p i such that B mod p i = 1, with i an integer,
b) selecting a prime candidate Y P ,
c) decomposing the selected prime candidate Y P in a base B selected among said determined binary bases : Y P = ∑ y j B i
d) computing a residue y PB from the candidate Y P for said selected base such that y PB = ∑ y j
e) testing if said computed residue y PB is divisible by one small prime p i selected among said determined small primes for said selected base B,
f) while said computed residue y PB is not divisible by said selected small prime, iteratively repeating above step e) until tests performed at step e) prove that said computed residue y PB is not divisible by any of said determined small primes for said selected base B,
g) when said computed residue y PB is not divisible by any of said determined small primes for said selected base B, iteratively repeating steps c) to f) for each base B among said determined binary bases,
h) when, for all determined bases B, said residue y PB computed for a determined base is not divisible by any of said determined small primes for said determined base B, executing a known rigorous probable primality test on said candidate Y P , and when the known rigorous probable primality test is a success, storing said prime candidate Y P and using said stored prime candidate Y P in said cryptographic application.

5. 发明授权

EP3093788B1 SNOOPING DETECTION BETWEEN SILICON ELEMENTS IN A CIRCUIT 有权
公开(公告)号：EP3093788B1
公开(公告)日：2018-06-06
申请号：EP15171304.7
申请日：2015-06-10
申请人： Winbond Electronics Corp.
发明人： Teper, Valery
IPC分类号： G01R27/26 , H04L9/10 , G06F21/75 , G06F21/85 , H01L23/00
CPC分类号： G01R27/2605 , G06F21/75 , G06F21/755 , G06F21/85 , G09C1/00 , H01L23/576 , H04L9/003 , H04L9/10 , H04L2209/12 , H04L2209/122
摘要： An electronic circuit with protection against eavesdropping, including a first circuit element embedded in the electronic circuit, a second circuit element embedded in the electronic circuit, one or more connection lines between the first circuit element and the second circuit element, a first monitoring unit in the first circuit element for measuring capacitance of at least one of the connection lines between the first circuit element and the second circuit element, wherein the first monitoring unit is configured to identify changes in capacitance of the connection lines and to initiate actions to prevent eavesdropping in response to identifying changes.

6. 发明公开

EP3291478A1 SOFTWARE PROTECTION AGAINST DIFFERENTIAL FAULT ANALYSIS 审中-公开
标题翻译：软件对差分故障分析的保护
公开(公告)号：EP3291478A1
公开(公告)日：2018-03-07
申请号：EP17188390.3
申请日：2017-08-29
申请人： NXP B.V.
发明人： RIOU, Sebastien
IPC分类号： H04L9/00
CPC分类号： H04L9/004 , G06F21/14 , H04L9/003 , H04L9/005 , H04L9/0618 , H04L9/0631 , H04L2209/046 , H04L2209/12 , H04L2209/125
摘要： An encryption module and method for performing an encryption/decryption process executes two cryptographic operations in parallel in multiple stages. The two cryptographic operations are executed such that different rounds of the two cryptographic operations are performed in parallel by the same instruction or the same finite state machine (FSM) state for hardware implementation.
摘要翻译：用于执行加密/解密处理的加密模块和方法以多个阶段并行地执行两个密码操作。执行两个密码操作，使得两个密码操作的不同轮次通过用于硬件实现的相同指令或相同有限状态机（FSM）状态并行执行。

7. 发明授权

EP3126959B1 ELLIPTIC CURVE POINT MULTIPLICATION PROCEDURE RESISTANT TO SIDE-CHANNEL INFORMATION LEAKAGE 有权
标题翻译：椭圆曲线点乘法程序抗侧信道信息泄漏
公开(公告)号：EP3126959B1
公开(公告)日：2018-02-28
申请号：EP15717339.4
申请日：2015-03-31
申请人： Qualcomm Incorporated
发明人： JACOBSON, David Merrill , BRUMLEY, Billy Bob
IPC分类号： G06F7/72 , H04L9/00
CPC分类号： H04L9/3066 , G06F7/725 , G06F2207/7257 , H04L9/003 , H04L2209/24 , H04L2209/72
摘要： One feature pertains to elliptic curve (EC) point multiplication for use in generating digital signatures. In one aspect, a scalar multiplier (k) of a base point (P) of order (n) is selected on an elliptic curve for use with EC point multiplication. An integer value (r) is then randomly generated from within a range of values constrained so that, regardless of the particular value of (r) obtained within the range, EC point multiplication procedures performed using the scalar multiplier (k) summed with a product of the integer multiplier (r) and the order (n) consume device resources independent of the value of the scalar multiplier (k) to thereby reduce or eliminate side-channel leakage. This may be achieved by determining the range of values for r so that the bit position of the most significant bit of k+(r*n) will be even and fixed for a particular elliptic curve.

8. 发明公开

EP3274899A1 CUSTOM PROTECTION AGAINST SIDE CHANNEL ATTACKS 审中-公开
标题翻译：定制防止侧通道攻击
公开(公告)号：EP3274899A1
公开(公告)日：2018-01-31
申请号：EP16769246.6
申请日：2016-02-23
申请人： Intel Corporation
发明人： CAPRIOLI, Paul
IPC分类号： G06F21/56 , G06F21/55 , H04L9/00
CPC分类号： H04L63/1416 , G06F21/125 , G06F21/556 , G06F21/60 , G06F21/71 , G06F21/72 , H04L9/003 , H04L63/1441 , H04L63/162
摘要： Embodiments of an invention for custom protection against side channel attacks are disclosed. In one embodiment, a processor includes instruction hardware and execution hardware. The instruction hardware is to receive an instruction to provide for shielding code against side channel attacks, wherein the instruction includes a first operand to specify one of a plurality of levels of protection. The execution hardware is to execute the instruction, wherein execution of the instruction includes configuring the processor to provide a specified level of protection.

9. 发明公开

EP3264668A1 A PROTECTION METHOD AND DEVICE AGAINST A SIDE-CHANNEL ANALYSIS 有权
标题翻译：一种防止边道分析的保护方法和装置
公开(公告)号：EP3264668A1
公开(公告)日：2018-01-03
申请号：EP16176721.5
申请日：2016-06-28
申请人： ESHARD
发明人： WURCKER, Antoine , THIEBEAULD DE LA CROUEE, Hugues
IPC分类号： H04L9/00
CPC分类号： H04L9/003 , G09C1/00 , H04L2209/046 , H04L2209/12
摘要： The invention relates to a method for executing by a circuit a bit permutation operation (OPR) by which bits of an input data are mixed to obtain an output data comprising at least two words, the method comprising: generating a first mask set (U) comprising mask parameters (U[I]), the mask set comprising one word column (Ui) per word of the input data, each word column comprising a same number of occurrences of all possible values of one input data word in relation with a size of the input data word; generating an input set (PX) by combining the input data with each mask parameter of the first mask set by Exclusive OR (XOR) operations (⊕); and computing an output set (PR) comprising output data resulting from the application of the bit permutation operation to each data in the input set, the first mask set being generated such that the output set comprises columns of output words, each output word column comprising a same number of occurrences of all possible values of one output word in relation with a size of the output word.
摘要翻译：本发明涉及一种由电路执行比特置换操作（OPR）的方法，通过该比特置换操作（OPR）将输入数据的比特混合以获得包括至少两个单词的输出数据，所述方法包括：生成第一掩模集合（U）包括掩码参数（U [I]），所述掩码集包括输入数据的每个字的一个字列（Ui），每个字列包括与一个输入数据字的大小相关的一个输入数据字的所有可能值的相同出现次数的输入数据字; 通过将输入数据与通过异或（XOR）运算（⊕）设置的第一掩码的每个掩码参数组合来生成输入集合（PX）; 并且计算输出集合（PR），该输出集合包括通过对输入集合中的每个数据应用比特置换操作而得到的输出数据，第一掩码集合被生成为使得输出集合包括输出字的列，每个输出字列包括一个输出字的所有可能值的出现次数与输出字的大小相同。

10. 发明授权

EP2858295B1 Hardening data transmissions against power side channel analysis 有权转让
标题翻译：针对功率端信道分析加强数据传输
公开(公告)号：EP2858295B1
公开(公告)日：2017-12-13
申请号：EP14178647.5
申请日：2014-07-25
申请人： Intel Corporation , Schoinas, Ioannis T.
发明人： Schoinas, Ioannis T , Mevergnies, Michael N De , Sastry, Manoj
IPC分类号： H04L9/00
CPC分类号： H04L63/1475 , H04L9/003 , H04L2209/34
摘要： Embodiments of an invention for hardening data transmissions against power side channel attacks are disclosed. In one embodiment, a system includes a first agent and a second agent. The first agent is to transmit an encoded datum through an interface in a plurality of encoded packets. The second agent is to receive each of the plurality of encoded packets from the interface and decode each of the encoded packets to generate a plurality of decoded packets. Each of the encoded packets has the same Hamming weight. The Hamming distance between any two consecutively transmitted encoded packets is constant.

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