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1. 发明授权

EP1931030B1 Préamplificateur de courant et comparateur de courant associé 有权
标题翻译：前置放大器和相关的电流比较器
公开(公告)号：EP1931030B1
公开(公告)日：2009-09-02
申请号：EP07122105.5
申请日：2007-12-03
申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE
发明人： Tchagaspanian, Michael
IPC分类号： H03K5/02 , G01R19/00
CPC分类号： H03K5/023 , H03F1/223 , H03F3/082 , H03F3/45475 , H03F2200/78 , H03F2200/91 , H03F2203/45136

2. 发明授权

EP0605233B1 Input amplifier circuit 失效
标题翻译：输入放大器电路
公开(公告)号：EP0605233B1
公开(公告)日：1998-03-04
申请号：EP93310546.2
申请日：1993-12-24
申请人： NEC CORPORATION
发明人： Uriya, Susumu
IPC分类号： H03K5/24 , H03F3/72
CPC分类号： H03K5/023 , H03F1/303

3. 发明授权

EP0565240B1 Differential signal receiver circuit and method 失效
标题翻译：差分信号和接收方法电路
公开(公告)号：EP0565240B1
公开(公告)日：1997-08-13
申请号：EP93301876.4
申请日：1993-03-11
申请人： ADVANCED MICRO DEVICES, INC.
发明人： Wincn, John Michael
IPC分类号： H03K5/19 , H03K5/153
CPC分类号： H03K5/023 , H03K5/13 , H03K5/1534 , H03K5/156 , H03K19/018578 , H04L25/02 , H04L25/0272 , H04L25/0292 , H04L25/08 , H04L25/085 , H04L25/4904

4. 发明授权

EP0328814B1 Microwave tube modulator 失效
标题翻译：微波管调制器。
公开(公告)号：EP0328814B1
公开(公告)日：1995-02-01
申请号：EP88310281.6
申请日：1988-11-01
申请人： Sierra Technologies, Inc.
发明人： Ehrenhalt, Dan , Giles, George Rodney
IPC分类号： H03C1/28 , H03K5/02
CPC分类号： H03K5/023 , H03C1/28 , H03K3/57 , H03K17/691

5. 发明公开

EP0605233A3 Input amplifier circuit 失效
标题翻译：输入放大器电路。
公开(公告)号：EP0605233A3
公开(公告)日：1994-08-24
申请号：EP93310546.2
申请日：1993-12-24
申请人： NEC CORPORATION
发明人： Uriya, Susumu
IPC分类号： H03K5/24 , H03F3/72
CPC分类号： H03K5/023 , H03F1/303
摘要： An input amplifier circuit including a gate circuit for amplifying such as a NAND (2) circuit or a NOR circuit. in which a signal to be amplified is input from a first input terminal (IN1) and an operating state or an unoperating state is selected by an enable signal input (EN, EN ¯ ) to a second input terminal (IN2,EN). and a switch circuit (M1,M2) including a resistance part, which is connected between the first input terminal (IN1) and the output terminal (OUT) of the NOR (2) circuit and is controlled by the enable signal. A first MOS transistor (M11) is connected between a direct current power source (VDD) and the first input terminal (IN1) and is controlled by the enable signal and a second MOS transistor (M12) is connected between the first input terminal (IN1) and ground and is controlled by the enable signal. Hence, a time required for raising from the unoperating state up to the operating state can be reduced.
摘要翻译：一种包括用于放大诸如NAND（2）电路或NOR电路的门电路的输入放大器电路。其中要从第一输入端子（IN1）输入要被放大的信号，并且通过使能信号输入（EN，EN）选择操作状态或者非操作状态到第二输入端子（IN2，EN）。以及包括电阻部分的开关电路（M1，M2），其连接在NOR（2）电路的第一输入端子（IN1）和输出端子（OUT）之间，并由使能信号控制。第一MOS晶体管（M11）连接在直流电源（VDD）和第一输入端子（IN1）之间，并由使能信号控制，第二MOS晶体管（M12）连接在第一输入端子）并接地，并由使能信号控制。因此，可以减少从非操作状态升高到操作状态所需的时间。

6. 发明公开

EP0486550A4 SINGLE ENDED SENSE AMPLIFIER WITH IMPROVED DATA RECALL FROM VARIABLE BIT LINE CURRENT 失效
标题翻译：具有改进数据的单端SENSE放大器可从变化的线路电流
公开(公告)号：EP0486550A4
公开(公告)日：1993-02-03
申请号：EP90911927
申请日：1990-08-10
申请人： SIMTEK CORPORATION
发明人： HIROSE, RYAN, T.
IPC分类号： G11C17/00 , G11C7/06 , G11C16/06 , H03K5/02 , H03K19/007 , H03K19/094
CPC分类号： H03K5/023 , G11C7/067

7. 发明授权

EP0199374B1 High-speed CMOS buffer with controlled slew rate 失效
标题翻译：高速CMOS缓冲器具有控制的高速率
公开(公告)号：EP0199374B1
公开(公告)日：1992-08-05
申请号：EP86200167.4
申请日：1986-02-06
申请人： LSI LOGIC CORPORATION
发明人： Wong, Anthony Y. , Walker, Robert M., III
IPC分类号： H03K19/094
CPC分类号： H03K19/00361 , H03K5/023 , H03K19/09429

8. 发明公开

EP0493659A2 PMOS wordline boost circuit for dram 失效
标题翻译： PMOS-WortleitungSpeisespannungsverstärkungsschaltungfürDRAM。
公开(公告)号：EP0493659A2
公开(公告)日：1992-07-08
申请号：EP91118320.0
申请日：1991-10-28
申请人： International Business Machines Corporation
发明人： Dhong, Sang Hoo , Hwang, Wei , Taira, Yoichi
IPC分类号： G11C11/408 , G11C8/00
CPC分类号： H03K5/023 , G11C11/4085
摘要： A wordline driver circuit is shown for a DRAM, the circuit comprising a PMOS transistor structure (58) having one contact coupled to a wordline (60), a second contact coupled to a negative voltage supply and a gate coupled to a control input, the transistor having an N-well (64) about the gate, first and second contacts. An isolating structure (66) is positioned about the N-well (64) to enable it to be a separately controlled from surrounding N-well structures (64). Pulse circuits (52) are coupled to the transistor (58) for applying, when activated, a potential that enables the wordline (60) to transition to a more negative potential. A bias circuit is also provided for biasing the N-well (64) at a first potential and a second lower potential, the second lower potential applied when the pulse circuits (52) are activated. As a result, body effects in the PMOS transistor (58) are minimized while at the same time enabling a boost potential to be applied to the wordline (60).
摘要翻译：示出了用于DRAM的字线驱动器电路，该电路包括具有耦合到字线（60）的一个触点的PMOS晶体管结构（58），耦合到负电压源的第二触点和耦合到控制输入的栅极晶体管具有围绕栅极，第一和第二触点的N阱（64）。隔离结构（66）围绕N阱（64）定位，以使其能够与周围的N阱结构（64）分开控制。脉冲电路（52）耦合到晶体管（58），用于在激活时施加使字线（60）转变到更负的电位的电位。还提供偏置电路用于使N阱（64）偏置在第一电位和第二较低电位，当脉冲电路（52）被激活时施加的第二较低电位。结果，使PMOS晶体管（58）中的身体效应最小化，同时能够将升压电位施加到字线（60）。

9. 发明公开

EP0488506A2 Differential receiver for detecting and correcting polarity inversion 失效
标题翻译：差动接收器，用于检测和反极性的校正。
公开(公告)号：EP0488506A2
公开(公告)日：1992-06-03
申请号：EP91308684.9
申请日：1991-09-24
申请人： ADVANCED MICRO DEVICES, INC.
发明人： Blumenthal, Jeffrey M. , Wincn, John M. , Vijeh, Nader , Crayford, Ian S.
IPC分类号： H04L25/02
CPC分类号： H03K5/023 , H03K5/13 , H03K5/1534 , H03K5/156 , H03K19/018578 , H04L25/02 , H04L25/0272 , H04L25/0292 , H04L25/08 , H04L25/085 , H04L25/4904
摘要： A differential receiver incorporated into a MAU which receives both Manchester packets and linkpulses according to the IEEE 802.3 10Base-T standard has polarity detection and correction circuit for automatically detecting a reversed polarity for RD input lines. The differential receiver samples incoming pulses for time, amplitude and pulse width qualification and makes a preliminary polarity determination based upon polarity of such qualified pulses. This preliminary polarity allows a linktest state machine to transition to a link_pass state, enabling output drivers of the MAU. Additionally, the linkpulse polarity information initially makes a polarity determination for the entire differential receiver which asserts a FIX POLARITY signal. The FIX POLARITY signal controls a correction circuit which internally remedies reversed input lines. Preferably, the correction circuit internally reroutes the signals. An ETD polarity circuit makes polarity determinations from any ETD information received, as effected by the correction circuit. The ETD polarity circuit independently controls the linkpulse polarity determinations and conflicting determinations are resolved in favor of the ETD polarity circuit. Upon detecting two consecutive, consistent valid ETDs, the ETD polarity circuit locks-in the polarity determinations until a reset or a linkfail condition. The correction circuit effects both Manchester packets and linkpulses, so an incorrectly locked polarity will produce inverted linkpulses which will not allow the MAU to remain in the link_pass state. In the linkfail state, the MAU may reestablish the correct polarity.
摘要翻译：并入到MAU，其接收两个曼彻斯特数据包和链路脉冲gemäß到IEEE 802.3 10BASE-T标准的差分接收机具有极性检测和校正电路，用于自动检测为RD输入线相反的极性。差分接收器的样品输入脉冲为时间，振幅和脉冲宽度资格和使得基于寻求合格脉冲的极性的极性的初步确定。这个初步极性允许链路测试状态机转换到状态link_pass，使MAU的输出驱动器。另外，所述链接脉冲的极性信息INITIALLY为整个差动接收器，其断言FIX极性信号的极性确定。 FIX的极性信号控制哪个补救内部反转输入线的校正电路。优选地，所述校正电路在内部重新路由信号。一个ETD极性电路使从任何ETD信息极性确定接收，由校正电路实现。所述ETD极性电路unabhängig控制链路脉冲极性确定和冲突的判定赞成ETD极性电路的方式进行解决。在检测到两个连续的，一致的有效的ETD，所述ETD极性电路锁式的极性确定，直到复位或链接故障条件。校正电路的效果这两种曼彻斯特数据包和链路脉冲，以便不正确地锁定极性会产生反转脉冲链路whichwill不允许MAU保持在link_pass状态。在链接工作状态时，MAU可以重新建立正确的极性。

10. 发明公开

EP0467583A1 Repeater 失效
标题翻译： Wiederholer。
公开(公告)号：EP0467583A1
公开(公告)日：1992-01-22
申请号：EP91306261.8
申请日：1991-07-10
申请人： ADVANCED MICRO DEVICES, INC.
发明人： Vijeh, Nader , Staab, David
IPC分类号： H04L12/44
CPC分类号： H03K5/023 , H03K5/156 , H03K19/018578 , H04L12/44 , H04L25/0272 , H04L25/08 , H04L25/085 , H04L25/4904
摘要： A discrete repeater (50) having a predetermined number of ports (60,62,100) includes an expansion port (100) permitting connection of one or more of similar devices to produce a single repeater unit having an increased number of ports. The expansion port (100) includes two bidirectional channels, an output channel and two input channels. An arbiter function connects to each discrete repeater to assert appropriate signals to permit the discrete repeaters making up a repeater unit to exchange data and collision information. This exchange of data is used in a state machine of the discrete repeaters (50) to provide a repeater unit with distributed repeater and relay functions.
摘要翻译：具有预定数量的端口（60,62,100）的离散中继器（50）包括允许一个或多个类似设备的连接以产生具有增加的端口数量的单个中继器单元的扩展端口（100）。扩展端口（100）包括两个双向通道，一个输出通道和两个输入通道。仲裁器功能连接到每个离散中继器以断言适当的信号，以允许构成中继器单元的离散中继器交换数据和冲突信息。这种数据交换在离散中继器（50）的状态机中使用，以提供具有分布式中继器和中继功能的中继器单元。

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