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2. 发明公开

EP0810661A2 Microelectronic packaging using arched solder columns 失效
标题翻译： Mikroelektronische Packung mitgewölbtenLöthöckern
公开(公告)号：EP0810661A2
公开(公告)日：1997-12-03
申请号：EP97303591.8
申请日：1997-05-27
申请人： MCNC
发明人： Rinne, Glenn A. , Deane, Philip A.
IPC分类号： H01L25/065 , H01L25/10
CPC分类号： H01L21/44 , H01L23/48 , H01L24/10 , H01L24/13 , H01L24/16 , H01L24/81 , H01L25/065 , H01L25/0652 , H01L25/0657 , H01L25/105 , H01L2224/13 , H01L2224/13099 , H01L2224/16105 , H01L2224/16108 , H01L2225/06513 , H01L2225/0652 , H01L2225/06551 , H01L2225/06555 , H01L2225/06572 , H01L2225/1058 , H01L2225/1064 , H01L2225/107 , H01L2924/00011 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01087 , H01L2924/01322 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1423 , H01L2924/15787 , H05K3/306 , H01L2924/00 , H01L2224/81805
摘要： Microelectronic packages are formed wherein solder bumps (310a in Fig 3B) on one or more substrates (100) are expanded, to thereby extend and contact the second substrate (200) and form a solder connection (320). The solder bumps are preferably expanded by reflowing additional solder (300) into the plurality of solder bumps. The additional solder may be reflowed from an elongated, narrow solder-containing region (106, 206) adjacent the solder bump, into the solder bump. After reflow, the solder bump which extends across a pair of adjacent substrates forms an arched solder column (320) or partial ring of solder between the two substrates.
摘要翻译：形成微电子封装，其中在一个或多个衬底（100）上的焊料凸块（图3B中的310a）被扩展，从而延伸并接触第二衬底（200）并形成焊接连接（320）。焊料凸起优选通过将附加焊料（300）回流到多个焊料凸块来扩展。另外的焊料可以从邻近焊料凸点的细长的含焊料区域（106,206）回流到焊料凸块中。在回流之后，延伸穿过一对相邻基板的焊料凸块在两个基板之间形成拱形焊料柱（320）或部分焊料环。

3. 发明授权

EP2126969B1 PROCEDE D'INTERCONNEXION DE TRANCHES ELECTRONIQUES 有权
标题翻译：方法连接电子WAFER
公开(公告)号：EP2126969B1
公开(公告)日：2012-06-27
申请号：EP08708288.9
申请日：2008-01-28
申请人： 3D Plus
发明人： VAL, Christian
IPC分类号： H01L21/60 , H01L23/48 , H01L25/065 , H01L21/98
CPC分类号： H01L24/81 , H01L23/481 , H01L25/50 , H01L2224/05001 , H01L2224/05009 , H01L2224/05144 , H01L2224/05147 , H01L2224/05568 , H01L2224/05647 , H01L2224/16105 , H01L2224/16108 , H01L2224/16146 , H01L2224/81224 , H01L2224/8184 , H01L2225/06513 , H01L2225/06541 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01058 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1461 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , Y10T29/49126 , Y10T29/49165 , Y10T29/49167 , H01L2924/00 , H01L2924/00014
摘要： The invention relates to a method of interconnecting electronic components of a first wafer (T1) with electronic components of a second wafer (T2), each wafer comprising metallized vias (1) which pass through the thickness of the wafer. The method comprises the following steps of: Depositing a drop (3) of conducting ink containing solvents and nanoparticles of metal onto each via (1) of the first wafer (T1), stacking the second wafer (T2) on the first in such a way that the vias (1) of the second wafer (T2) are substantially overlaid on the vias (1) of the first wafer (T1). Eliminating 50 to 90% of the solvents contained in the drops (3) by heating or vacuum treatment so as to obtain a pasty ink, sintering the drops (3) of pasty ink by laser so as to produce electrical connections (31) between the overlaid metallized vias (1).

4. 发明公开

EP1025587A1 SEMICONDUCTOR FLIP-CHIP PACKAGE AND METHOD FOR THE FABRICATION THEREOF 失效
标题翻译：半导体FLIPCHIPPACKUNG及其制造方法
公开(公告)号：EP1025587A1
公开(公告)日：2000-08-09
申请号：EP98935858.5
申请日：1998-07-21
申请人： Aguila Technologies, Inc.
发明人： CAPOTE, M., Albert , ZHOU, Zhiming , ZHU, Xiaoqi , ZHOU, Ligui
IPC分类号： H01L23/48
CPC分类号： H01L24/81 , B23K35/025 , B23K35/3613 , B23K35/3618 , B32B7/12 , C09J4/00 , H01L21/563 , H01L23/293 , H01L23/4334 , H01L23/49827 , H01L23/49883 , H01L24/11 , H01L24/29 , H01L24/83 , H01L2224/0401 , H01L2224/06102 , H01L2224/1147 , H01L2224/1148 , H01L2224/1182 , H01L2224/13099 , H01L2224/13111 , H01L2224/1403 , H01L2224/16105 , H01L2224/16108 , H01L2224/16225 , H01L2224/274 , H01L2224/27436 , H01L2224/27602 , H01L2224/27614 , H01L2224/27618 , H01L2224/29 , H01L2224/29082 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/2929 , H01L2224/29299 , H01L2224/29562 , H01L2224/2969 , H01L2224/32225 , H01L2224/73104 , H01L2224/73204 , H01L2224/81011 , H01L2224/81024 , H01L2224/8121 , H01L2224/81815 , H01L2224/83101 , H01L2224/83191 , H01L2224/83192 , H01L2224/83193 , H01L2224/83856 , H01L2924/00013 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01018 , H01L2924/0102 , H01L2924/01023 , H01L2924/01025 , H01L2924/01027 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01322 , H01L2924/01327 , H01L2924/014 , H01L2924/0665 , H01L2924/0781 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/1579 , H01L2924/3511 , H05K1/095 , H05K3/321 , C08F222/1006 , C08F222/20 , H01L2924/00 , H01L2924/01028 , H01L2924/3512 , H01L2924/00014 , H01L2924/00012 , H01L2224/29099 , H01L2224/29199
摘要： A simplified process for flip-chip attachment of a chip to a substrate is provided by pre-coating the chip with an encapsulant underfill material having separate discrete solder columns therein to eliminate the conventional capillary flow underfill process. Such a structure permits incorporation of remeltable layers for rework, test, or repair. It also allows incorporation of electrical redistribution layers. In one aspect, the chip and pre-coated encapsulant are placed at an angle to the substrate and brought into contact with the pre-coated substrate, then the chip and pre-coated encapsulant are pivoted about the first point of contact, expelling any gas therebetween until the solder bumps on the chip are fully in contact with the substrate. There is also provided a flip-chip configuration having a complaint solder/flexible encapsulant understructure that deforms generally laterally with the substrate as the substrate undergoes expansion or contraction. With this configuration, the complaint solder/flexible encapsulant understructure absorbs the strain caused by the difference in the thermal coefficients of expansion between the chip and the substrate without bending the chip and substrate.

6. 发明公开

EP2958732A1 VERFAHREN UND VORRICHTUNG ZUM HERSTELLEN UND FÜLLEN VON BEHÄLTERN 有权
标题翻译： VERFAHREN UND VORRICHTUNG ZUM HERSTELLEN UNDFÜLLENVONBEHÄLTERN
公开(公告)号：EP2958732A1
公开(公告)日：2015-12-30
申请号：EP14711679.2
申请日：2014-02-17
申请人： KHS GmbH
发明人： CLÜSSERATH, Ludwig
IPC分类号： B29C49/42 , B29C49/46 , B29C49/14 , B29C49/16
CPC分类号： B29C49/4252 , B23K1/0016 , B23K1/0056 , B23K26/1462 , B23K2201/42 , B29C49/14 , B29C49/16 , B29C49/46 , B29C2049/465 , B29C2049/4682 , B29C2791/006 , B29C2791/007 , B29K2067/003 , B29L2031/7158 , B65B3/022 , B65B3/10 , B65B31/025 , B65B55/08 , B65B55/10 , H01L24/16 , H01L24/75 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L2224/13101 , H01L2224/16057 , H01L2224/16105 , H01L2224/16108 , H01L2224/16225 , H01L2224/16227 , H01L2224/75252 , H01L2224/75263 , H01L2224/75745 , H01L2224/81121 , H01L2224/81192 , H01L2224/81193 , H01L2224/81194 , H01L2224/81224 , H01L2224/81986 , H01L2225/06551 , H01L2924/014 , H01L2924/00014
摘要： The invention relates to a method for producing containers from preforms (5), said containers being filled with liquid contents, in particular for producing plastic containers such as PE-, PP- or PET bottles, PET kegs or similar. The preform (5) is formed hydraulically or hydrodynamically during a form-and-fill phase in a blow mould by the pressure of the contents (20) as they are fed into the container. Said preform is evacuated (30) at least once prior to the start of the form-and-fill phase and after said evacuation is pressure-balanced and/or rinsed using a sterilization agent (40), in particular steam and/or a mixture of gas and steam.
摘要翻译：一种用于将预成型坯转换成填充有液体填充材料的容器的装置包括形成模具头的模具，灭菌系统，一组模具头共同的腔室，连接到腔室的抽空系统，以及导管线，其中每一个将模头连接到腔室。灭菌系统在与模头密封接合的同时对预成型件的内部进行灭菌。抽空系统在预制件中产生真空。液体填充材料在压力下进入预成型件并使其变成容器。

7. 发明公开

EP0818813A1 Système de composants à hybrider et procédé d'hybridation autorisant des dilatations thermiques 失效
标题翻译：用于粘合和粘结的方法，其特征在于，热膨胀也是可能的组分体系
公开(公告)号：EP0818813A1
公开(公告)日：1998-01-14
申请号：EP97401098.5
申请日：1997-05-16
申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE
发明人： Marion, François , Chantre, Chantal
IPC分类号： H01L21/60 , H01L23/485
CPC分类号： B81C3/002 , B81C2203/032 , H01L24/11 , H01L24/13 , H01L24/81 , H01L2224/05647 , H01L2224/13099 , H01L2224/13116 , H01L2224/16108 , H01L2224/81801 , H01L2924/0001 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/0102 , H01L2924/01029 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/01058 , H01L2924/01061 , H01L2924/01073 , H01L2924/01077 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/351 , H01L2924/381 , H05K3/3436 , H05K2201/09427 , H05K2203/0465 , Y02P70/613 , Y10T29/49144 , Y10T29/49147 , Y10T29/49151 , H01L2924/00014
摘要： L'invention concerne un système de composants à hybrider comprenant au moins un premier composant (110) avec des premiers plots (114a), et présentant un premier coefficient de dilatation et au moins un deuxième composant (112) avec des deuxièmes plots (114b) et présentant un deuxième coefficient de dilatation. Conformément à l'invention, à une température d'hybridation Th les plots sont sensiblement superposables et à une température ambiante Ta, les plots sont mutuellement décalés d'une distance de compensation d'une dilatation différentielle des premier et deuxième composants.
Application à la fabrication de dispositifs électroniques et optiques.

8. 发明公开

EP2126969A1 PROCEDE D'INTERCONNEXION DE TRANCHES ELECTRONIQUES 有权
标题翻译：方法连接电子WAFER
公开(公告)号：EP2126969A1
公开(公告)日：2009-12-02
申请号：EP08708288.9
申请日：2008-01-28
申请人： 3D Plus
发明人： VAL, Christian
IPC分类号： H01L21/60 , H01L23/48 , H01L25/065 , H01L21/98
CPC分类号： H01L24/81 , H01L23/481 , H01L25/50 , H01L2224/05001 , H01L2224/05009 , H01L2224/05144 , H01L2224/05147 , H01L2224/05568 , H01L2224/05647 , H01L2224/16105 , H01L2224/16108 , H01L2224/16146 , H01L2224/81224 , H01L2224/8184 , H01L2225/06513 , H01L2225/06541 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01019 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01058 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/1461 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30107 , Y10T29/49126 , Y10T29/49165 , Y10T29/49167 , H01L2924/00 , H01L2924/00014
摘要： The invention relates to a method of interconnecting electronic components of a first wafer (T1) with electronic components of a second wafer (T2), each wafer comprising metallized vias (1) which pass through the thickness of the wafer. The method comprises the following steps of: Depositing a drop (3) of conducting ink containing solvents and nanoparticles of metal onto each via (1) of the first wafer (T1), stacking the second wafer (T2) on the first in such a way that the vias (1) of the second wafer (T2) are substantially overlaid on the vias (1) of the first wafer (T1). Eliminating 50 to 90% of the solvents contained in the drops (3) by heating or vacuum treatment so as to obtain a pasty ink, sintering the drops (3) of pasty ink by laser so as to produce electrical connections (31) between the overlaid metallized vias (1).

9. 发明公开

EP0700581A1 PROCEDE DE REALISATION D'UN CORDON D'ETANCHEITE ET DE TENUE MECANIQUE ENTRE UN SUBSTRAT ET UNE PUCE HYBRIDEE PAR BILLES SUR LE SUBSTRAT 失效
标题翻译：之间的衬底和芯片机械固封BY BALLS的方式方法MOUNTED这是
公开(公告)号：EP0700581A1
公开(公告)日：1996-03-13
申请号：EP94917059.0
申请日：1994-05-26
申请人： COMMISSARIAT A L'ENERGIE ATOMIQUE
发明人： CAILLAT, Patrice
IPC分类号： H01L21 , H01L23
CPC分类号： H01L24/81 , H01L23/10 , H01L2224/13109 , H01L2224/16108 , H01L2224/29011 , H01L2224/29013 , H01L2224/291 , H01L2224/73103 , H01L2224/73203 , H01L2224/81143 , H01L2224/81191 , H01L2224/81193 , H01L2224/81801 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01049 , H01L2924/0105 , H01L2924/01057 , H01L2924/01058 , H01L2924/01061 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/00012
摘要： Process for the production of a seal providing mechanical strength between a substrate and a chip hybridized by beads on the substrate. The invention concerns a process for producing an encapsulating seal for sealing a chip (1) hybridized by beads on a substrate (5) and providing said chip with mechanical strength. The process consists in, parallel to the production of hybridation beads (9) on the chip or substrate underside (1a) using a first fusible material: (a) depositing, on the substrate or on the underside of the electronic component, a seal (13) made of a second fusible material; (b) placing the underside of the chip on the substrate so as to provide connections between the chip and the substrate by means of the first fusible material; and (c) heating the whole so formed at a temperature at least equal to the highest melting temperature of the first and second fusible materials, so as to produce hybridation beads using the first material and the seal using the second material. The height (h) and width (d) of the seal are based on the expressions (I) where α is a shape factor and D is the largest dimension of the electronic component.
摘要翻译：过程用于生产基板和由在基板凸块杂交的芯片之间的密封和机械强度的环。本发明提供用于在封装环（13）产生确保芯片（1）的通过凸块上的基板杂交的密封和机械强度的处理（5）。更具体地，同时具有由第一可熔性材料，密封和机械强度环生产在芯片的下表面（1a）的杂交凸块（9）或所述基板的，通过沉积在衬底上或下表面上形成所述电子部件的第二可熔材料制成的环（13）。芯片然后被放置在基片上，以便通过所述第一可熔性材料的装置来产生所述芯片和所说基片之间的连接，以及由此形成的组件的下表面被加热至温度至少等于最高熔点第一和第二可熔材料的，为了同时产生第一材料和第二材料的密封环的杂交凸块。所述环的尺寸设置成具有高度（h）和在雅舞蹈的宽度（d）与下面的等式：其中的α是一个系数的形状因子和D是电子部件的大最大尺寸。

10. 发明公开

EP3176814A1 PHOTODETECTOR-ARRAYS AND METHODS OF FABRICATION THEREOF 有权转让
标题翻译：光电检测器阵列及其制造方法
公开(公告)号：EP3176814A1
公开(公告)日：2017-06-07
申请号：EP16201313.0
申请日：2016-11-30
申请人： Semi-Conductor Devices-Elbit Systems - Rafael Partnership
发明人： KARNI, Yoram , LUKOMSKY, Inna , AVNON, Eran
IPC分类号： H01L21/60 , H01L27/146 , H01L23/485
CPC分类号： H01L27/1469 , H01L23/544 , H01L23/562 , H01L24/06 , H01L24/13 , H01L24/14 , H01L24/16 , H01L24/81 , H01L25/0657 , H01L25/50 , H01L27/14634 , H01L27/14636 , H01L2223/5442 , H01L2223/54426 , H01L2223/54473 , H01L2224/06131 , H01L2224/13109 , H01L2224/14131 , H01L2224/16105 , H01L2224/16108 , H01L2224/81048 , H01L2224/81122 , H01L2224/81129 , H01L2224/8113 , H01L2224/81132 , H01L2224/81194 , H01L2224/81815 , H01L2224/81948 , H01L2225/06513 , H01L2225/06593 , H01L2924/351 , H01L2924/381 , H01L2924/014
摘要： A photodetector-array and a method for fabricating the same are disclosed. The photodetector-array includes: a first semiconductor structure having an active region including plurality of active photodetectors defining light sensitive regions; and a second semiconductor structure defining a plurality of active readout integrated circuit pixels (RICPs) having electric contacts electronically connectable to electric contacts of respective active photodetectors of the first semiconductor structure, for carrying out respective read out operations from the active photodetectors. The first and second semiconductor structures are respectively made according to a first and second semiconductor technologies (e.g. different semiconductor materials/composition) associated with respectively different first and second coefficients of thermal expansion (CTEs). The pitch distances of the electric contacts of the active photodetectors and the pitch distances of the respective electric contacts of the active RICPs are configured in accordance with a difference between the first and second CTEs such that at high temperatures, at which the electrical coupling between the first and second semiconductor structures is performed, the electric contacts of the active photodetectors overlap with electric contacts of their respective RICPs. Accordingly, in the photodetector-array, the first and second semiconductor structures are assembled and bonded together such that the electric contacts of at least 99.5% of the active photodetector substantially overlap with the respective electric contacts of the RICPs associated therewith.
摘要翻译：公开了一种光电探测器阵列及其制造方法。该光电探测器阵列包括：第一半导体结构，具有包括限定光敏区域的多个有源光电探测器的有源区域; 以及限定多个有源读出集成电路像素（RICP）的第二半导体结构，所述有源读出集成电路像素具有可电连接到第一半导体结构的各个有源光电检测器的电触点的电触点，用于从有源光电检测器执行各自的读出操作。第一和第二半导体结构分别根据与分别不同的第一和第二热膨胀系数（CTE）相关联的第一和第二半导体技术（例如，不同的半导体材料/组分）制成。根据第一CTE与第二CTE之间的差异来配置有源光电检测器的电触点的节距和有源RICP的相应电触点的节距，使得在高温下，在所述高温下，执行第一和第二半导体结构，有源光电检测器的电触点与它们各自的RICP的电触点重叠。因此，在光电探测器阵列中，第一和第二半导体结构被组装并结合在一起，使得有源光电探测器的至少99.5％的电触点基本上与与其相关联的RICP的相应电触点重叠。

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