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1. 发明公开

EP1282133A4 SEMICONDUCTOR MEMORY 审中-公开
标题翻译： HALBLEITERSPEICHER
公开(公告)号：EP1282133A4
公开(公告)日：2007-12-19
申请号：EP01912146
申请日：2001-03-07
申请人： NEC ELECTRONICS CORP
发明人： TAKAHASHI HIROYUKI , INABA HIDEO , SONODA MASATOSHI , KATO YOSHIYUKI , NAKAGAWA ATSUSHI
IPC分类号： G11C11/403 , G11C11/401 , G11C11/406 , G11C11/407 , G11C11/408 , G11C29/04 , G11C11/40
CPC分类号： G11C11/406 , G11C11/4087
摘要： A semiconductor memory the cycle time of which is shortened by accelerating the address access. A first address decoder (2) and a first refresh address decoder (5) decode an external address (Xn) fed from outside of the semiconductor memory and a refresh address (RXn) used for refresh in the semiconductor memory, respectively. A multiplexer (8) selects either a decode signal (XnDm) on the external address side or a decode signal (XnRm) on the refresh address side according to an external address transmission signal (EXTR) and a refresh address transmission signal (RFTR) so that a refresh and a Read/Write may be continuously performed in one memory cycle, and outputs the selected one as a decode signal (XnMm). A word driver (10) decodes the decode signals (XnMm, XpMq) selected by the multiplexer (8) and so forth so as to activate a word line (WLmq).
摘要翻译：通过加速地址访问来缩短其周期时间的半导体存储器。第一地址解码器（2）和第一刷新地址解码器（5）分别解码从半导体存储器外部馈送的外部地址（Xn）和半导体存储器中用于刷新的刷新地址（RXn）。多路复用器（8）根据外部地址发送信号（EXTR）和刷新地址发送信号（RFTR），选择外部地址侧的解码信号（XnDm）或刷新地址侧的解码信号（XnRm）可以在一个存储周期内连续执行刷新和读/写，并且将所选择的一个作为解码信号（XnMm）输出。字驱动器（10）对由复用器（8）等选择的解码信号（XnMm，XpMq）进行解码以激活字线（WLmq）。

2. 发明公开

EP1300881A3 Method of manufacturing semiconductor packaging 审中-公开
标题翻译：一种用于制造半导体封装过程
公开(公告)号：EP1300881A3
公开(公告)日：2006-11-29
申请号：EP02022450
申请日：2002-10-04
申请人： NEC ELECTRONICS CORP
发明人： KISHI KAZUHIRO
IPC分类号： H01L21/50 , H01L23/34 , H01L21/48 , H01L21/52 , H01L23/02 , H01L23/367
CPC分类号： H01L21/4882 , H01L21/52 , H01L23/3675 , H01L2224/48091 , H01L2224/48247 , H01L2224/73265 , H01L2924/16195 , H01L2924/00014

3. 发明授权

EP1235132B1 Reference current circuit 有权
标题翻译：电流基准电路
公开(公告)号：EP1235132B1
公开(公告)日：2006-09-06
申请号：EP02090058
申请日：2002-02-13
申请人： NEC ELECTRONICS CORP
发明人： KIMURA KATSUJI
IPC分类号： G05F3/24 , G05F3/26 , G05F3/30
CPC分类号： G05F3/267 , G05F3/262 , G05F3/265 , G05F3/30 , Y10S323/907

4. 发明公开

EP1367593A4 SEMICONDUCTOR MEMORY AND METHOD FOR ENTERING ITS OPERATION MODE 审中-公开
标题翻译：半导体存储器方法发生在其工作模式
公开(公告)号：EP1367593A4
公开(公告)日：2007-07-11
申请号：EP02710406
申请日：2002-01-30
申请人： NEC ELECTRONICS CORP
发明人： TAKAHASHI HIROYUKI , SHIMOYAMA TAKATO , KUSAKARI TAKASHI
IPC分类号： G11C7/10 , G11C11/401 , G11C11/403 , G11C11/406
CPC分类号： G11C7/1045
摘要： A semiconductor memory the operation mode of which can be entered during the operation while effectively suppressing entry errors without needing any special timing specifications and a method for entering its operating mode are disclosed. A request to enter an operating mode is received in a read cycle when read cycles of reading addresses continue (step S1, step S2). In a write cycle subsequent to the read cycles, an operation mode to be entered is defined on the basis of externally specified data. In the first write cycle, the kind of the operating mode is determined, and in the next write cycle, the condition of the operating mode is determined. Thus, the operating mode of a semiconductor memory is entered.

5. 发明授权

EP1249936B1 Lock detection circuit 无效
标题翻译：锁定检测
公开(公告)号：EP1249936B1
公开(公告)日：2007-05-09
申请号：EP02007351
申请日：2002-04-05
申请人： NEC ELECTRONICS CORP
发明人： HIRAI YOSHITAKA
IPC分类号： H03L7/095 , H03L7/089 , H03L7/18
CPC分类号： H03L7/0891 , H03L7/095 , H03L7/18

6. 发明公开

EP1437768A4 PLASMA CLEANING GAS AND PLASMA CLEANING METHOD 有权
标题翻译：等离子清洗气体和等离子体清洗工艺
公开(公告)号：EP1437768A4
公开(公告)日：2007-03-21
申请号：EP02758871
申请日：2002-08-26
申请人： NAT INST OF ADVANCED IND SCIEN , ANELVA CORP , ULVAC INC , KANTO DENKA KOGYO KK , SANYO ELECTRIC CO , SHOWA DENKO KK , SONY CORP , DAIKIN IND LTD , TOKYO ELECTRON LTD , NEC ELECTRONICS CORP , HITACHI INT ELECTRIC INC , MATSUSHITA ELECTRIC IND CO LTD , RENESAS TECH CORP , ASAHI GLASS CO LTD
发明人： SEKIYA A , MITSUI Y , OHIRA Y , YONEMURA T
IPC分类号： C23C16/44 , B08B7/00 , H01L21/3065
CPC分类号： C23C16/4405 , B08B7/0035 , H01L21/3065 , Y10S438/905
摘要： A CVD chamber-use plasma cleaning gas which is used to clean silicon-containing deposits accumulated on the inner-wall surface of a CVD chamber and on the surfaces of members disposed in the CVD chamber after a film is formed on a substrate by a plasma CVD device, characterized in that the cleaning gas is a 100 vol.% of fluorine gas that generates plasma by discharging. When plasma generated by discharging from a 100 vol.% in concentration of fluorine gas is used as a cleaning gas, a very excellent etching speed is available, plasma can be generated constantly even at a total gas flow rate of 1000 sccm and under a chamber pressure of 400 Pa, and a uniform cleaning can be ensured under the above conditions. The 100% concentration does not complicate the device to provide an excellent practical use.

7. 发明公开

EP1351250A4 SEMICONDUCTOR MEMORY DEVICE AND REFRESH CONTROL CIRCUIT 审中-公开
标题翻译： HALBLEITERSPEICHERBAUSTEIN UND AUFFRISCHSTEUERSCHALTUNG
公开(公告)号：EP1351250A4
公开(公告)日：2005-12-21
申请号：EP01270215
申请日：2001-12-06
申请人： NEC ELECTRONICS CORP
发明人： TAKAHASHI HIROYUKI , KUSAKARI TAKASHI
IPC分类号： G11C11/403 , G11C11/406
CPC分类号： G11C11/40615 , G11C11/406 , G11C2211/4067
摘要： There are solved problems that a normal access is influenced by refresh and that the refresh cannot be done by continuous write. A semiconductor memory device in which a clock signal used as a reference of the time interval of a refresh of the addresses of one row is generated as a refresh clock signal, a change in an access address 'Adress', fed from the outside, to a memory cell is detected to generate a detection signal, and a memory cell corresponding to the refresh address is refreshed by using the detection signal as a trigger to make an access to the memory cell designated by the access address. A write enable signal (/WE) is used, when inputted, as a trigger to effect refresh and the write. Refresh triggered by an access address change detection signal is suspended for a predetermined period based on the refresh clock signal.
摘要翻译：防止刷新对正常访问产生影响并且写操作的继续禁止刷新的问题。在半导体存储器件中，产生基于对应于单行的地址的刷新操作的时间间隔的时钟信号作为刷新时钟信号。检测从外部提供并对应于存储器单元的访问地址“地址”的转换，从而通过在访问存储器之前触发该检测信号的产生来对与刷新地址相对应的存储单元执行刷新操作进行由访问地址指定的单元，其中在写使能信号/ WE的输入时，在执行写入操作之前触发该信号来执行刷新，并且通过触发生成访问地址的刷新操作被中断基于刷新时钟信号的预定时间段。

8. 发明公开

EP1267355A4 ONE-SHOT SIGNAL GENERATING CIRCUIT 审中-公开
标题翻译：发生电路单SIGNALS
公开(公告)号：EP1267355A4
公开(公告)日：2005-03-02
申请号：EP01912147
申请日：2001-03-07
申请人： NEC ELECTRONICS CORP
发明人： TAKAHASHI HIROYUKI , INABA HIDEO , SONODA MASATOSHI
IPC分类号： G11C11/41 , G11C8/18 , H03K3/033 , H03K5/00 , H03K5/1534 , H03K5/13
CPC分类号： H03K5/1534 , G11C8/18 , H03K2005/00293
摘要： A one-shot signal generating circuit facilitated in pulse width regulation and in handling skew variations of ATD signals, and capable of dwarfing a chip area. A timing specifying unit (100) is reset by the edge of a first detection signal out of a plurality of address transition detection signals (ATD signals) arrived within the skew period of an address signal, measures a first specified time with the edge of a second detection signal as a starting point, and outputs a signal DST reflecting the measurement result. A timing specifying unit (110) measures a second specified time with the edge of the first detection signal as a starting point, and outputs a signal PG reflecting the measurement result. An LC generating circuit (14) outputs a one-shot signal (LC) specified at its starting point by the signal PG and at its end point by the signal DST.

9. 发明公开

EP1335383A4 SEMICONDUCTOR STORAGE AND ITS REFRESHING METHOD 审中-公开
标题翻译：半导体存储确保两刷新过程
公开(公告)号：EP1335383A4
公开(公告)日：2004-09-15
申请号：EP01961213
申请日：2001-08-30
申请人： NEC ELECTRONICS CORP
发明人： TAKAHASHI HIROYUKI , NAKAGAWA ATSUSHI , KATOU YOSHIYUKI , INABA HIDEO , KOMATSU NORIAKI , HIROTA TAKUYA , YOSHIDA MASAHIRO
IPC分类号： G11C11/406 , G11C11/408
CPC分类号： G11C11/406
摘要： A semiconductor storage which can much reduce power consumption on refreshing time more than a conventional semiconductor storage. A cell array (S0) is divided into four blocks (B0-B03),and a cell array (S1) is divided into four blocks (B10-B13). On normal read-out/write-in time, one cell array is selected by address data for specifying a word line, and one block of a selected cell array is selected as well as one word line in the block. On refreshing time, the other cell array is selected, and the four blocks of the selected cell array are refreshed simultaneously. That is, one word line is selected from each of the four blocks, and the selected word line is refreshed. Thus, power consumption is much reduced more than where a plurality of cell arrays are refreshed simultaneously.

10. 发明公开

EP2197024A4 METHOD FOR PRODUCING HYDROPHOBILIZED POROUS FILM 审中-公开
标题翻译：用于生产防水剂的多孔膜
公开(公告)号：EP2197024A4
公开(公告)日：2010-09-29
申请号：EP08836263
申请日：2008-09-29
申请人： NEC ELECTRONICS CORP , ULVAC INC
发明人： CHIKAKI SHINICHI , NAKAYAMA TAKAHIRO
IPC分类号： H01L21/316 , H01L21/3105 , H01L21/312 , H01L21/768 , H01L23/522
CPC分类号： H01L21/3122 , H01L21/02126 , H01L21/02203 , H01L21/02337 , H01L21/02359 , H01L21/31058 , H01L21/31695 , H01L21/76826 , H01L23/5329 , H01L2924/0002 , H01L2924/00

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